forked from Minki/linux
ASoC: cs42l42: Allow time for HP/ADC to power-up after enable
After enabling the HP or ADC by writing the corresponding PDN=0, it takes around 20 milliseconds for it to power up and the midrail supply to be stable. Add this wait into a DAPM widget callback. If HP and ADC are both powering up in a DAPM sequence, there's no need to do the wait twice. The widget will perform one wait in the POST_PMU if there was a PRE_PMU for one or both. Signed-off-by: Richard Fitzgerald <rf@opensource.cirrus.com> Link: https://lore.kernel.org/r/20211015133619.4698-13-rf@opensource.cirrus.com Signed-off-by: Mark Brown <broonie@kernel.org>
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@ -435,10 +435,36 @@ static const struct snd_kcontrol_new cs42l42_snd_controls[] = {
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0x3f, 1, mixer_tlv)
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};
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static int cs42l42_hp_adc_ev(struct snd_soc_dapm_widget *w,
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struct snd_kcontrol *kcontrol, int event)
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{
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struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
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struct cs42l42_private *cs42l42 = snd_soc_component_get_drvdata(component);
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switch (event) {
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case SND_SOC_DAPM_PRE_PMU:
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cs42l42->hp_adc_up_pending = true;
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break;
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case SND_SOC_DAPM_POST_PMU:
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/* Only need one delay if HP and ADC are both powering-up */
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if (cs42l42->hp_adc_up_pending) {
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usleep_range(CS42L42_HP_ADC_EN_TIME_US,
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CS42L42_HP_ADC_EN_TIME_US + 1000);
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cs42l42->hp_adc_up_pending = false;
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}
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break;
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default:
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break;
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}
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return 0;
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}
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static const struct snd_soc_dapm_widget cs42l42_dapm_widgets[] = {
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/* Playback Path */
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SND_SOC_DAPM_OUTPUT("HP"),
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SND_SOC_DAPM_DAC("DAC", NULL, CS42L42_PWR_CTL1, CS42L42_HP_PDN_SHIFT, 1),
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SND_SOC_DAPM_DAC_E("DAC", NULL, CS42L42_PWR_CTL1, CS42L42_HP_PDN_SHIFT, 1,
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cs42l42_hp_adc_ev, SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU),
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SND_SOC_DAPM_MIXER("MIXER", CS42L42_PWR_CTL1, CS42L42_MIXER_PDN_SHIFT, 1, NULL, 0),
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SND_SOC_DAPM_AIF_IN("SDIN1", NULL, 0, SND_SOC_NOPM, 0, 0),
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SND_SOC_DAPM_AIF_IN("SDIN2", NULL, 1, SND_SOC_NOPM, 0, 0),
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@ -448,7 +474,8 @@ static const struct snd_soc_dapm_widget cs42l42_dapm_widgets[] = {
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/* Capture Path */
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SND_SOC_DAPM_INPUT("HS"),
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SND_SOC_DAPM_ADC("ADC", NULL, CS42L42_PWR_CTL1, CS42L42_ADC_PDN_SHIFT, 1),
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SND_SOC_DAPM_ADC_E("ADC", NULL, CS42L42_PWR_CTL1, CS42L42_ADC_PDN_SHIFT, 1,
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cs42l42_hp_adc_ev, SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU),
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SND_SOC_DAPM_AIF_OUT("SDOUT1", NULL, 0, CS42L42_ASP_TX_CH_EN, CS42L42_ASP_TX0_CH1_SHIFT, 0),
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SND_SOC_DAPM_AIF_OUT("SDOUT2", NULL, 1, CS42L42_ASP_TX_CH_EN, CS42L42_ASP_TX0_CH2_SHIFT, 0),
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@ -761,6 +761,7 @@
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#define CS42L42_CLOCK_SWITCH_DELAY_US 150
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#define CS42L42_PLL_LOCK_POLL_US 250
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#define CS42L42_PLL_LOCK_TIMEOUT_US 1250
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#define CS42L42_HP_ADC_EN_TIME_US 20000
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static const char *const cs42l42_supply_names[CS42L42_NUM_SUPPLIES] = {
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"VA",
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@ -794,6 +795,7 @@ struct cs42l42_private {
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u8 hs_bias_ramp_time;
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u8 hs_bias_sense_en;
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u8 stream_use;
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bool hp_adc_up_pending;
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};
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#endif /* __CS42L42_H__ */
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