drm/amd/amdgpu: psp program IH_RB_CTRL on sienna_cichlid
[Why] IH_RB_CNTL is blocked by PSP so we need to ask psp to help config it. [How] Move psp ip block before ih, and use psp to program IH_RB_CNTL under sriov. Reviewed-by: Chen, Horace <Horace.Chen@amd.com> Signed-off-by: YuBiao Wang <YuBiao.Wang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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drivers/gpu/drm/amd/amdgpu
@ -151,7 +151,15 @@ static int navi10_ih_toggle_ring_interrupts(struct amdgpu_device *adev,
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/* enable_intr field is only valid in ring0 */
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if (ih == &adev->irq.ih)
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tmp = REG_SET_FIELD(tmp, IH_RB_CNTL, ENABLE_INTR, (enable ? 1 : 0));
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WREG32(ih_regs->ih_rb_cntl, tmp);
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if (amdgpu_sriov_vf(adev) && amdgpu_sriov_reg_indirect_ih(adev)) {
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if (psp_reg_program(&adev->psp, ih_regs->psp_reg_id, tmp)) {
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DRM_ERROR("PSP program IH_RB_CNTL failed!\n");
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return -ETIMEDOUT;
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}
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} else {
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WREG32(ih_regs->ih_rb_cntl, tmp);
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}
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if (enable) {
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ih->enabled = true;
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@ -261,7 +269,15 @@ static int navi10_ih_enable_ring(struct amdgpu_device *adev,
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tmp = REG_SET_FIELD(tmp, IH_RB_CNTL, WPTR_OVERFLOW_ENABLE, 0);
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tmp = REG_SET_FIELD(tmp, IH_RB_CNTL, RB_FULL_DRAIN_ENABLE, 1);
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}
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WREG32(ih_regs->ih_rb_cntl, tmp);
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if (amdgpu_sriov_vf(adev) && amdgpu_sriov_reg_indirect_ih(adev)) {
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if (psp_reg_program(&adev->psp, ih_regs->psp_reg_id, tmp)) {
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DRM_ERROR("PSP program IH_RB_CNTL failed!\n");
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return -ETIMEDOUT;
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}
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} else {
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WREG32(ih_regs->ih_rb_cntl, tmp);
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}
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if (ih == &adev->irq.ih) {
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/* set the ih ring 0 writeback address whether it's enabled or not */
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@ -871,9 +871,15 @@ int nv_set_ip_blocks(struct amdgpu_device *adev)
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case CHIP_SIENNA_CICHLID:
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amdgpu_device_ip_block_add(adev, &nv_common_ip_block);
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amdgpu_device_ip_block_add(adev, &gmc_v10_0_ip_block);
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amdgpu_device_ip_block_add(adev, &navi10_ih_ip_block);
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if (likely(adev->firmware.load_type == AMDGPU_FW_LOAD_PSP))
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amdgpu_device_ip_block_add(adev, &psp_v11_0_ip_block);
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if (!amdgpu_sriov_vf(adev)) {
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amdgpu_device_ip_block_add(adev, &navi10_ih_ip_block);
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if (likely(adev->firmware.load_type == AMDGPU_FW_LOAD_PSP))
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amdgpu_device_ip_block_add(adev, &psp_v11_0_ip_block);
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} else {
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if (likely(adev->firmware.load_type == AMDGPU_FW_LOAD_PSP))
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amdgpu_device_ip_block_add(adev, &psp_v11_0_ip_block);
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amdgpu_device_ip_block_add(adev, &navi10_ih_ip_block);
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}
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if (adev->firmware.load_type == AMDGPU_FW_LOAD_PSP &&
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is_support_sw_smu(adev))
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amdgpu_device_ip_block_add(adev, &smu_v11_0_ip_block);
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