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drm/i915/gvt: fix wrong offset when loading RCS mocs

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Fix the wrong offset of the RCS specific mocs

Fixes: 1786571393 ("drm/i915/gvt: vGPU context switch")

Signed-off-by: Chuanxiao Dong <chuanxiao.dong@intel.com>
Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
This commit is contained in:
Chuanxiao Dong 2017-03-21 09:32:19 +08:00 committed by Zhenyu Wang
parent 975629c3f7
commit 4a53148868
1 changed files with 1 additions and 1 deletions
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2
drivers/gpu/drm/i915/gvt/render.c
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@ -207,7 +207,7 @@ static void load_mocs(struct intel_vgpu *vgpu, int ring_id)
l3_offset.reg = 0xb020;
for (i = 0; i < 32; i++) {
gen9_render_mocs_L3[i] = I915_READ(l3_offset);
I915_WRITE(l3_offset, vgpu_vreg(vgpu, offset));
I915_WRITE(l3_offset, vgpu_vreg(vgpu, l3_offset));
POSTING_READ(l3_offset);
l3_offset.reg += 4;
}