forked from Minki/linux
Merge branch 'net-phy-broadcom-Cleanups-and-APD'
Florian Fainelli says: ==================== net: phy: broadcom: Cleanups and APD This patch series cleans up the brcmphy.h header and its numerous unused phydev->dev_flags, fixes the RXC/TXC clock disabling bit and allows the BCM54210E PHY to utilize APD. Changes in v2: - dropped the patch that attempted to fix a possible discrepancy between the datasheet and the actual hardware - added a patch to remove a forward declaration - do additional flags cleanup ==================== Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
David S. Miller
commit
4a408a8add
@ -26,44 +26,6 @@ MODULE_DESCRIPTION("Broadcom PHY driver");
|
||||
MODULE_AUTHOR("Maciej W. Rozycki");
|
||||
MODULE_LICENSE("GPL");
|
||||
|
||||
static int bcm54xx_config_clock_delay(struct phy_device *phydev);
|
||||
|
||||
static int bcm54210e_config_init(struct phy_device *phydev)
|
||||
{
|
||||
int val;
|
||||
|
||||
bcm54xx_config_clock_delay(phydev);
|
||||
|
||||
if (phydev->dev_flags & PHY_BRCM_EN_MASTER_MODE) {
|
||||
val = phy_read(phydev, MII_CTRL1000);
|
||||
val |= CTL1000_AS_MASTER | CTL1000_ENABLE_MASTER;
|
||||
phy_write(phydev, MII_CTRL1000, val);
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int bcm54612e_config_init(struct phy_device *phydev)
|
||||
{
|
||||
int reg;
|
||||
|
||||
bcm54xx_config_clock_delay(phydev);
|
||||
|
||||
/* Enable CLK125 MUX on LED4 if ref clock is enabled. */
|
||||
if (!(phydev->dev_flags & PHY_BRCM_RX_REFCLK_UNUSED)) {
|
||||
int err;
|
||||
|
||||
reg = bcm_phy_read_exp(phydev, BCM54612E_EXP_SPARE0);
|
||||
err = bcm_phy_write_exp(phydev, BCM54612E_EXP_SPARE0,
|
||||
BCM54612E_LED4_CLK125OUT_EN | reg);
|
||||
|
||||
if (err < 0)
|
||||
return err;
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int bcm54xx_config_clock_delay(struct phy_device *phydev)
|
||||
{
|
||||
int rc, val;
|
||||
@ -105,6 +67,42 @@ static int bcm54xx_config_clock_delay(struct phy_device *phydev)
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int bcm54210e_config_init(struct phy_device *phydev)
|
||||
{
|
||||
int val;
|
||||
|
||||
bcm54xx_config_clock_delay(phydev);
|
||||
|
||||
if (phydev->dev_flags & PHY_BRCM_EN_MASTER_MODE) {
|
||||
val = phy_read(phydev, MII_CTRL1000);
|
||||
val |= CTL1000_AS_MASTER | CTL1000_ENABLE_MASTER;
|
||||
phy_write(phydev, MII_CTRL1000, val);
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int bcm54612e_config_init(struct phy_device *phydev)
|
||||
{
|
||||
int reg;
|
||||
|
||||
bcm54xx_config_clock_delay(phydev);
|
||||
|
||||
/* Enable CLK125 MUX on LED4 if ref clock is enabled. */
|
||||
if (!(phydev->dev_flags & PHY_BRCM_RX_REFCLK_UNUSED)) {
|
||||
int err;
|
||||
|
||||
reg = bcm_phy_read_exp(phydev, BCM54612E_EXP_SPARE0);
|
||||
err = bcm_phy_write_exp(phydev, BCM54612E_EXP_SPARE0,
|
||||
BCM54612E_LED4_CLK125OUT_EN | reg);
|
||||
|
||||
if (err < 0)
|
||||
return err;
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
/* Needs SMDSP clock enabled via bcm54xx_phydsp_config() */
|
||||
static int bcm50610_a0_workaround(struct phy_device *phydev)
|
||||
{
|
||||
@ -195,6 +193,7 @@ static void bcm54xx_adjust_rxrefclk(struct phy_device *phydev)
|
||||
if (BRCM_PHY_MODEL(phydev) != PHY_ID_BCM57780 &&
|
||||
BRCM_PHY_MODEL(phydev) != PHY_ID_BCM50610 &&
|
||||
BRCM_PHY_MODEL(phydev) != PHY_ID_BCM50610M &&
|
||||
BRCM_PHY_MODEL(phydev) != PHY_ID_BCM54210E &&
|
||||
BRCM_PHY_MODEL(phydev) != PHY_ID_BCM54810 &&
|
||||
BRCM_PHY_MODEL(phydev) != PHY_ID_BCM54811)
|
||||
return;
|
||||
@ -229,9 +228,10 @@ static void bcm54xx_adjust_rxrefclk(struct phy_device *phydev)
|
||||
val |= BCM54XX_SHD_SCR3_DLLAPD_DIS;
|
||||
|
||||
if (phydev->dev_flags & PHY_BRCM_DIS_TXCRXC_NOENRGY) {
|
||||
if (BRCM_PHY_MODEL(phydev) == PHY_ID_BCM54810 ||
|
||||
BRCM_PHY_MODEL(phydev) == PHY_ID_BCM54811)
|
||||
val |= BCM54810_SHD_SCR3_TRDDAPD;
|
||||
if (BRCM_PHY_MODEL(phydev) == PHY_ID_BCM54210E ||
|
||||
BRCM_PHY_MODEL(phydev) == PHY_ID_BCM54810 ||
|
||||
BRCM_PHY_MODEL(phydev) == PHY_ID_BCM54210E)
|
||||
val |= BCM54XX_SHD_SCR3_RXCTXC_DIS;
|
||||
else
|
||||
val |= BCM54XX_SHD_SCR3_TRDDAPD;
|
||||
}
|
||||
@ -383,10 +383,21 @@ static int bcm5481_config_aneg(struct phy_device *phydev)
|
||||
return ret;
|
||||
}
|
||||
|
||||
struct bcm54616s_phy_priv {
|
||||
bool mode_1000bx_en;
|
||||
};
|
||||
|
||||
static int bcm54616s_probe(struct phy_device *phydev)
|
||||
{
|
||||
struct bcm54616s_phy_priv *priv;
|
||||
int val, intf_sel;
|
||||
|
||||
priv = devm_kzalloc(&phydev->mdio.dev, sizeof(*priv), GFP_KERNEL);
|
||||
if (!priv)
|
||||
return -ENOMEM;
|
||||
|
||||
phydev->priv = priv;
|
||||
|
||||
val = bcm_phy_read_shadow(phydev, BCM54XX_SHD_MODE);
|
||||
if (val < 0)
|
||||
return val;
|
||||
@ -409,7 +420,7 @@ static int bcm54616s_probe(struct phy_device *phydev)
|
||||
* 1000BASE-X configuration.
|
||||
*/
|
||||
if (!(val & BCM54616S_100FX_MODE))
|
||||
phydev->dev_flags |= PHY_BCM_FLAGS_MODE_1000BX;
|
||||
priv->mode_1000bx_en = true;
|
||||
|
||||
phydev->port = PORT_FIBRE;
|
||||
}
|
||||
@ -419,10 +430,11 @@ static int bcm54616s_probe(struct phy_device *phydev)
|
||||
|
||||
static int bcm54616s_config_aneg(struct phy_device *phydev)
|
||||
{
|
||||
struct bcm54616s_phy_priv *priv = phydev->priv;
|
||||
int ret;
|
||||
|
||||
/* Aneg firstly. */
|
||||
if (phydev->dev_flags & PHY_BCM_FLAGS_MODE_1000BX)
|
||||
if (priv->mode_1000bx_en)
|
||||
ret = genphy_c37_config_aneg(phydev);
|
||||
else
|
||||
ret = genphy_config_aneg(phydev);
|
||||
@ -435,9 +447,10 @@ static int bcm54616s_config_aneg(struct phy_device *phydev)
|
||||
|
||||
static int bcm54616s_read_status(struct phy_device *phydev)
|
||||
{
|
||||
struct bcm54616s_phy_priv *priv = phydev->priv;
|
||||
int err;
|
||||
|
||||
if (phydev->dev_flags & PHY_BCM_FLAGS_MODE_1000BX)
|
||||
if (priv->mode_1000bx_en)
|
||||
err = genphy_c37_read_status(phydev);
|
||||
else
|
||||
err = genphy_read_status(phydev);
|
||||
|
||||
@ -61,19 +61,14 @@
|
||||
#define PHY_BCM_OUI_5 0x03625e00
|
||||
#define PHY_BCM_OUI_6 0xae025000
|
||||
|
||||
#define PHY_BCM_FLAGS_MODE_COPPER 0x00000001
|
||||
#define PHY_BCM_FLAGS_MODE_1000BX 0x00000002
|
||||
#define PHY_BCM_FLAGS_INTF_SGMII 0x00000010
|
||||
#define PHY_BCM_FLAGS_INTF_XAUI 0x00000020
|
||||
#define PHY_BRCM_WIRESPEED_ENABLE 0x00000100
|
||||
#define PHY_BRCM_AUTO_PWRDWN_ENABLE 0x00000200
|
||||
#define PHY_BRCM_RX_REFCLK_UNUSED 0x00000400
|
||||
#define PHY_BRCM_STD_IBND_DISABLE 0x00000800
|
||||
#define PHY_BRCM_EXT_IBND_RX_ENABLE 0x00001000
|
||||
#define PHY_BRCM_EXT_IBND_TX_ENABLE 0x00002000
|
||||
#define PHY_BRCM_CLEAR_RGMII_MODE 0x00004000
|
||||
#define PHY_BRCM_DIS_TXCRXC_NOENRGY 0x00008000
|
||||
#define PHY_BRCM_EN_MASTER_MODE 0x00010000
|
||||
#define PHY_BRCM_AUTO_PWRDWN_ENABLE 0x00000001
|
||||
#define PHY_BRCM_RX_REFCLK_UNUSED 0x00000002
|
||||
#define PHY_BRCM_STD_IBND_DISABLE 0x00000004
|
||||
#define PHY_BRCM_EXT_IBND_RX_ENABLE 0x00000008
|
||||
#define PHY_BRCM_EXT_IBND_TX_ENABLE 0x00000010
|
||||
#define PHY_BRCM_CLEAR_RGMII_MODE 0x00000020
|
||||
#define PHY_BRCM_DIS_TXCRXC_NOENRGY 0x00000040
|
||||
#define PHY_BRCM_EN_MASTER_MODE 0x00000080
|
||||
|
||||
/* Broadcom BCM7xxx specific workarounds */
|
||||
#define PHY_BRCM_7XXX_REV(x) (((x) >> 8) & 0xff)
|
||||
@ -198,6 +193,7 @@
|
||||
#define BCM54XX_SHD_SCR3_DEF_CLK125 0x0001
|
||||
#define BCM54XX_SHD_SCR3_DLLAPD_DIS 0x0002
|
||||
#define BCM54XX_SHD_SCR3_TRDDAPD 0x0004
|
||||
#define BCM54XX_SHD_SCR3_RXCTXC_DIS 0x0100
|
||||
|
||||
/* 01010: Auto Power-Down */
|
||||
#define BCM54XX_SHD_APD 0x0a
|
||||
@ -258,7 +254,6 @@
|
||||
#define BCM54810_EXP_BROADREACH_LRE_MISC_CTL_EN (1 << 0)
|
||||
#define BCM54810_SHD_CLK_CTL 0x3
|
||||
#define BCM54810_SHD_CLK_CTL_GTXCLK_EN (1 << 9)
|
||||
#define BCM54810_SHD_SCR3_TRDDAPD 0x0100
|
||||
|
||||
/* BCM54612E Registers */
|
||||
#define BCM54612E_EXP_SPARE0 (MII_BCM54XX_EXP_SEL_ETC + 0x34)
|
||||
|
||||
Loading…
Reference in New Issue
Block a user