forked from Minki/linux
ASoC: wm8900: Convert to direct regmap API usage
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
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6a58870df8
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499926246e
@ -23,6 +23,7 @@
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#include <linux/delay.h>
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#include <linux/pm.h>
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#include <linux/i2c.h>
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#include <linux/regmap.h>
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#include <linux/spi/spi.h>
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#include <linux/slab.h>
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#include <sound/core.h>
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@ -137,7 +138,7 @@
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#define WM8900_LRC_MASK 0x03ff
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struct wm8900_priv {
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enum snd_soc_control_type control_type;
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struct regmap *regmap;
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u32 fll_in; /* FLL input frequency */
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u32 fll_out; /* FLL output frequency */
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@ -147,54 +148,77 @@ struct wm8900_priv {
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* wm8900 register cache. We can't read the entire register space and we
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* have slow control buses so we cache the registers.
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*/
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static const u16 wm8900_reg_defaults[WM8900_MAXREG] = {
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0x8900, 0x0000,
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0xc000, 0x0000,
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0x4050, 0x4000,
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0x0008, 0x0000,
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0x0040, 0x0040,
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0x1004, 0x00c0,
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0x00c0, 0x0000,
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0x0100, 0x00c0,
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0x00c0, 0x0000,
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0xb001, 0x0000,
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0x0000, 0x0044,
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0x004c, 0x004c,
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0x0044, 0x0044,
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0x0000, 0x0044,
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0x0000, 0x0000,
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0x0002, 0x0000,
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0x0000, 0x0000,
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0x0000, 0x0000,
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0x0008, 0x0000,
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0x0000, 0x0008,
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0x0097, 0x0100,
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0x0000, 0x0000,
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0x0050, 0x0050,
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0x0055, 0x0055,
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0x0055, 0x0000,
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0x0000, 0x0079,
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0x0079, 0x0079,
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0x0079, 0x0000,
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/* Remaining registers all zero */
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static const struct reg_default wm8900_reg_defaults[] = {
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{ 1, 0x0000 },
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{ 2, 0xc000 },
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{ 3, 0x0000 },
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{ 4, 0x4050 },
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{ 5, 0x4000 },
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{ 6, 0x0008 },
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{ 7, 0x0000 },
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{ 8, 0x0040 },
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{ 9, 0x0040 },
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{ 10, 0x1004 },
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{ 11, 0x00c0 },
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{ 12, 0x00c0 },
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{ 13, 0x0000 },
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{ 14, 0x0100 },
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{ 15, 0x00c0 },
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{ 16, 0x00c0 },
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{ 17, 0x0000 },
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{ 18, 0xb001 },
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{ 19, 0x0000 },
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{ 20, 0x0000 },
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{ 21, 0x0044 },
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{ 22, 0x004c },
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{ 23, 0x004c },
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{ 24, 0x0044 },
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{ 25, 0x0044 },
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{ 26, 0x0000 },
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{ 27, 0x0044 },
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{ 28, 0x0000 },
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{ 29, 0x0000 },
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{ 30, 0x0002 },
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{ 31, 0x0000 },
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{ 32, 0x0000 },
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{ 33, 0x0000 },
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{ 34, 0x0000 },
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{ 35, 0x0000 },
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{ 36, 0x0008 },
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{ 37, 0x0000 },
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{ 38, 0x0000 },
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{ 39, 0x0008 },
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{ 40, 0x0097 },
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{ 41, 0x0100 },
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{ 42, 0x0000 },
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{ 43, 0x0000 },
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{ 44, 0x0050 },
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{ 45, 0x0050 },
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{ 46, 0x0055 },
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{ 47, 0x0055 },
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{ 48, 0x0055 },
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{ 49, 0x0000 },
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{ 50, 0x0000 },
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{ 51, 0x0079 },
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{ 52, 0x0079 },
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{ 53, 0x0079 },
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{ 54, 0x0079 },
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{ 55, 0x0000 },
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};
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static int wm8900_volatile_register(struct snd_soc_codec *codec, unsigned int reg)
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static bool wm8900_volatile_register(struct device *dev, unsigned int reg)
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{
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switch (reg) {
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case WM8900_REG_ID:
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return 1;
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return true;
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default:
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return 0;
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return false;
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}
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}
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static void wm8900_reset(struct snd_soc_codec *codec)
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{
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snd_soc_write(codec, WM8900_REG_RESET, 0);
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memcpy(codec->reg_cache, wm8900_reg_defaults,
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sizeof(wm8900_reg_defaults));
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}
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static int wm8900_hp_event(struct snd_soc_dapm_widget *w,
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@ -1119,13 +1143,16 @@ static int wm8900_suspend(struct snd_soc_codec *codec)
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static int wm8900_resume(struct snd_soc_codec *codec)
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{
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struct wm8900_priv *wm8900 = snd_soc_codec_get_drvdata(codec);
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u16 *cache;
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int i, ret;
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cache = kmemdup(codec->reg_cache, sizeof(wm8900_reg_defaults),
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GFP_KERNEL);
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int ret;
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wm8900_reset(codec);
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ret = regcache_sync(wm8900->regmap);
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if (ret != 0) {
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dev_err(codec->dev, "Failed to restore cache: %d\n", ret);
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return ret;
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}
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wm8900_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
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/* Restart the FLL? */
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@ -1139,27 +1166,18 @@ static int wm8900_resume(struct snd_soc_codec *codec)
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ret = wm8900_set_fll(codec, 0, fll_in, fll_out);
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if (ret != 0) {
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dev_err(codec->dev, "Failed to restart FLL\n");
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kfree(cache);
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return ret;
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}
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}
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if (cache) {
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for (i = 0; i < WM8900_MAXREG; i++)
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snd_soc_write(codec, i, cache[i]);
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kfree(cache);
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} else
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dev_err(codec->dev, "Unable to allocate register cache\n");
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return 0;
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}
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static int wm8900_probe(struct snd_soc_codec *codec)
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{
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struct wm8900_priv *wm8900 = snd_soc_codec_get_drvdata(codec);
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int ret = 0, reg;
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ret = snd_soc_codec_set_cache_io(codec, 8, 16, wm8900->control_type);
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ret = snd_soc_codec_set_cache_io(codec, 8, 16, SND_SOC_REGMAP);
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if (ret != 0) {
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dev_err(codec->dev, "Failed to set cache I/O: %d\n", ret);
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return ret;
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@ -1207,10 +1225,6 @@ static struct snd_soc_codec_driver soc_codec_dev_wm8900 = {
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.suspend = wm8900_suspend,
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.resume = wm8900_resume,
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.set_bias_level = wm8900_set_bias_level,
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.volatile_register = wm8900_volatile_register,
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.reg_cache_size = ARRAY_SIZE(wm8900_reg_defaults),
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.reg_word_size = sizeof(u16),
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.reg_cache_default = wm8900_reg_defaults,
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.controls = wm8900_snd_controls,
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.num_controls = ARRAY_SIZE(wm8900_snd_controls),
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@ -1220,6 +1234,18 @@ static struct snd_soc_codec_driver soc_codec_dev_wm8900 = {
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.num_dapm_routes = ARRAY_SIZE(wm8900_dapm_routes),
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};
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static const struct regmap_config wm8900_regmap = {
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.reg_bits = 8,
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.val_bits = 16,
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.max_register = WM8900_MAXREG,
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.reg_defaults = wm8900_reg_defaults,
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.num_reg_defaults = ARRAY_SIZE(wm8900_reg_defaults),
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.cache_type = REGCACHE_RBTREE,
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.volatile_reg = wm8900_volatile_register,
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};
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#if defined(CONFIG_SPI_MASTER)
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static int __devinit wm8900_spi_probe(struct spi_device *spi)
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{
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@ -1231,7 +1257,10 @@ static int __devinit wm8900_spi_probe(struct spi_device *spi)
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if (wm8900 == NULL)
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return -ENOMEM;
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wm8900->control_type = SND_SOC_SPI;
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wm8900->regmap = devm_regmap_init_spi(spi, &wm8900_regmap);
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if (IS_ERR(wm8900->regmap))
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return PTR_ERR(wm8900->regmap);
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spi_set_drvdata(spi, wm8900);
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ret = snd_soc_register_codec(&spi->dev,
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@ -1268,8 +1297,11 @@ static __devinit int wm8900_i2c_probe(struct i2c_client *i2c,
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if (wm8900 == NULL)
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return -ENOMEM;
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wm8900->regmap = devm_regmap_init_i2c(i2c, &wm8900_regmap);
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if (IS_ERR(wm8900->regmap))
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return PTR_ERR(wm8900->regmap);
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i2c_set_clientdata(i2c, wm8900);
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wm8900->control_type = SND_SOC_I2C;
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ret = snd_soc_register_codec(&i2c->dev,
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&soc_codec_dev_wm8900, &wm8900_dai, 1);
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