forked from Minki/linux
x86, realmode: Move SMP trampoline to unified realmode code
Migrated SMP trampoline code to the real mode blob. SMP trampoline code is not yet removed from .x86_trampoline because it is needed by the wakeup code. [ hpa: always enable compiling startup_32_smp in head_32.S... it is only a few instructions which go into .init on UP builds, and it makes the rest of the code less #ifdef ugly. ] Signed-off-by: Jarkko Sakkinen <jarkko.sakkinen@intel.com> Link: http://lkml.kernel.org/r/1336501366-28617-6-git-send-email-jarkko.sakkinen@intel.com Signed-off-by: H. Peter Anvin <hpa@linux.intel.com>
This commit is contained in:
Jarkko Sakkinen
H. Peter Anvin
parent
5a8c9aebe0
commit
48927bbb97
@ -12,6 +12,17 @@ struct real_mode_header {
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/* reboot */
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#ifdef CONFIG_X86_32
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u32 machine_real_restart_asm;
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#endif
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/* SMP trampoline */
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u32 trampoline_data;
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u32 trampoline_status;
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#ifdef CONFIG_X86_32
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u32 startup_32_smp;
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u32 boot_gdt;
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#else
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u32 startup_64_smp;
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u32 level3_ident_pgt;
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u32 level3_kernel_pgt;
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#endif
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} __attribute__((__packed__));
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@ -25,6 +36,13 @@ extern unsigned long initial_gs;
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extern unsigned char real_mode_blob[];
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extern unsigned char real_mode_relocs[];
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#ifdef CONFIG_X86_32
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extern unsigned char startup_32_smp[];
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extern unsigned char boot_gdt[];
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#else
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extern unsigned char secondary_startup_64[];
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#endif
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extern void __init setup_real_mode(void);
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#endif /* _ARCH_X86_REALMODE_H */
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@ -273,10 +273,7 @@ num_subarch_entries = (. - subarch_entries) / 4
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* If cpu hotplug is not supported then this code can go in init section
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* which will be freed later
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*/
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__CPUINIT
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#ifdef CONFIG_SMP
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ENTRY(startup_32_smp)
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cld
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movl $(__BOOT_DS),%eax
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@ -287,7 +284,7 @@ ENTRY(startup_32_smp)
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movl pa(stack_start),%ecx
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movl %eax,%ss
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leal -__PAGE_OFFSET(%ecx),%esp
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#endif /* CONFIG_SMP */
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default_entry:
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/*
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@ -136,10 +136,6 @@ ident_complete:
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/* Fixup phys_base */
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addq %rbp, phys_base(%rip)
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/* Fixup trampoline */
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addq %rbp, trampoline_level4_pgt + 0(%rip)
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addq %rbp, trampoline_level4_pgt + (511*8)(%rip)
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/* Due to ENTRY(), sometimes the empty space gets filled with
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* zeros. Better take a jmp than relying on empty space being
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* filled with 0x90 (nop)
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@ -58,6 +58,20 @@ void __init setup_real_mode(void)
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/* Copied header will contain relocated physical addresses. */
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memcpy(&real_mode_header, real_mode_base,
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sizeof(struct real_mode_header));
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#ifdef CONFIG_X86_32
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*((u32 *)__va(real_mode_header.startup_32_smp)) = __pa(startup_32_smp);
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*((u32 *)__va(real_mode_header.boot_gdt)) = __pa(boot_gdt);
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#else
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*((u64 *) __va(real_mode_header.startup_64_smp)) =
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(u64) __pa(secondary_startup_64);
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*((u64 *) __va(real_mode_header.level3_ident_pgt)) =
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__pa(level3_ident_pgt) + _KERNPG_TABLE;
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*((u64 *) __va(real_mode_header.level3_kernel_pgt)) =
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__pa(level3_kernel_pgt) + _KERNPG_TABLE;
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#endif
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}
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/*
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@ -57,7 +57,7 @@
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#include <asm/nmi.h>
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#include <asm/irq.h>
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#include <asm/idle.h>
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#include <asm/trampoline.h>
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#include <asm/realmode.h>
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#include <asm/cpu.h>
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#include <asm/numa.h>
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#include <asm/pgtable.h>
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@ -73,6 +73,8 @@
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#include <asm/smpboot_hooks.h>
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#include <asm/i8259.h>
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#include <asm/realmode.h>
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/* State of each CPU */
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DEFINE_PER_CPU(int, cpu_state) = { 0 };
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@ -662,8 +664,12 @@ static void __cpuinit announce_cpu(int cpu, int apicid)
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*/
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static int __cpuinit do_boot_cpu(int apicid, int cpu)
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{
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volatile u32 *trampoline_status =
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(volatile u32 *) __va(real_mode_header.trampoline_status);
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/* start_ip had better be page-aligned! */
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unsigned long start_ip = real_mode_header.trampoline_data;
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unsigned long boot_error = 0;
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unsigned long start_ip;
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int timeout;
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struct create_idle c_idle = {
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.cpu = cpu,
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@ -713,9 +719,6 @@ do_rest:
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initial_code = (unsigned long)start_secondary;
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stack_start = c_idle.idle->thread.sp;
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/* start_ip had better be page-aligned! */
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start_ip = trampoline_address();
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/* So we see what's up */
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announce_cpu(cpu, apicid);
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@ -778,8 +781,7 @@ do_rest:
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pr_debug("CPU%d: has booted.\n", cpu);
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} else {
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boot_error = 1;
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if (*(volatile u32 *)TRAMPOLINE_SYM(trampoline_status)
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== 0xA5A5A5A5)
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if (*trampoline_status == 0xA5A5A5A5)
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/* trampoline started but...? */
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pr_err("CPU%d: Stuck ??\n", cpu);
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else
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@ -805,7 +807,7 @@ do_rest:
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}
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/* mark "stuck" area as not stuck */
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*(volatile u32 *)TRAMPOLINE_SYM(trampoline_status) = 0;
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*trampoline_status = 0;
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if (get_uv_system_type() != UV_NON_UNIQUE_APIC) {
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/*
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@ -13,6 +13,7 @@ always := realmode.bin
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realmode-y += header.o
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realmode-$(CONFIG_X86_32) += reboot_32.o
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realmode-y += trampoline_$(BITS).o
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targets += $(realmode-y)
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@ -15,5 +15,16 @@ ENTRY(real_mode_header)
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.long pa_end
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#ifdef CONFIG_X86_32
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.long pa_machine_real_restart_asm
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#endif
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/* SMP trampoline */
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.long pa_trampoline_data
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.long pa_trampoline_status
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#ifdef CONFIG_X86_32
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.long pa_startup_32_smp
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.long pa_boot_gdt
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#else
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.long pa_startup_64_smp
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.long pa_level3_ident_pgt
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.long pa_level3_kernel_pgt
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#endif
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END(real_mode_header)
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86
arch/x86/realmode/rm/trampoline_32.S
Normal file
86
arch/x86/realmode/rm/trampoline_32.S
Normal file
@ -0,0 +1,86 @@
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/*
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*
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* Trampoline.S Derived from Setup.S by Linus Torvalds
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*
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* 4 Jan 1997 Michael Chastain: changed to gnu as.
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*
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* This is only used for booting secondary CPUs in SMP machine
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*
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* Entry: CS:IP point to the start of our code, we are
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* in real mode with no stack, but the rest of the
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* trampoline page to make our stack and everything else
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* is a mystery.
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*
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* We jump into arch/x86/kernel/head_32.S.
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*
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* On entry to trampoline_data, the processor is in real mode
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* with 16-bit addressing and 16-bit data. CS has some value
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* and IP is zero. Thus, we load CS to the physical segment
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* of the real mode code before doing anything further.
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*
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* The structure real_mode_header includes entries that need
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* to be set up before executing this code:
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*
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* startup_32_smp
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* boot_gdt
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*/
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#include <linux/linkage.h>
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#include <linux/init.h>
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#include <asm/segment.h>
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#include <asm/page_types.h>
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.text
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.code16
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.globl trampoline_data
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.balign PAGE_SIZE
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trampoline_data:
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wbinvd # Needed for NUMA-Q should be harmless for others
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.byte 0xea # ljmpw
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.word 1f # Offset
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.word real_mode_seg # Segment
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1:
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mov %cs, %ax # Code and data in the same place
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mov %ax, %ds
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cli # We should be safe anyway
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movl $0xA5A5A5A5, trampoline_status
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# write marker for master knows we're running
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/* GDT tables in non default location kernel can be beyond 16MB and
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* lgdt will not be able to load the address as in real mode default
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* operand size is 16bit. Use lgdtl instead to force operand size
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* to 32 bit.
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*/
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lidtl boot_idt_descr # load idt with 0, 0
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lgdtl boot_gdt_descr # load gdt with whatever is appropriate
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xor %ax, %ax
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inc %ax # protected mode (PE) bit
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lmsw %ax # into protected mode
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# flush prefetch and jump to startup_32_smp in arch/i386/kernel/head.S
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ljmpl *(startup_32_smp)
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.data
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.globl startup_32_smp, boot_gdt, trampoline_status
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boot_gdt_descr:
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.word __BOOT_DS + 7 # gdt limit
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boot_gdt:
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.long 0 # gdt base
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boot_idt_descr:
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.word 0 # idt limit = 0
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.long 0 # idt base = 0L
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trampoline_status:
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.long 0
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startup_32_smp:
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.long 0x00000000
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.word __BOOT_CS, 0
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175
arch/x86/realmode/rm/trampoline_64.S
Normal file
175
arch/x86/realmode/rm/trampoline_64.S
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@ -0,0 +1,175 @@
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/*
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*
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* Trampoline.S Derived from Setup.S by Linus Torvalds
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*
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* 4 Jan 1997 Michael Chastain: changed to gnu as.
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* 15 Sept 2005 Eric Biederman: 64bit PIC support
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*
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* Entry: CS:IP point to the start of our code, we are
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* in real mode with no stack, but the rest of the
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* trampoline page to make our stack and everything else
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* is a mystery.
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*
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* On entry to trampoline_data, the processor is in real mode
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* with 16-bit addressing and 16-bit data. CS has some value
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* and IP is zero. Thus, data addresses need to be absolute
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* (no relocation) and are taken with regard to r_base.
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*
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* With the addition of trampoline_level4_pgt this code can
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* now enter a 64bit kernel that lives at arbitrary 64bit
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* physical addresses.
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*
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* If you work on this file, check the object module with objdump
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* --full-contents --reloc to make sure there are no relocation
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* entries.
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*/
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#include <linux/linkage.h>
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#include <linux/init.h>
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#include <asm/pgtable_types.h>
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#include <asm/page_types.h>
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#include <asm/msr.h>
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#include <asm/segment.h>
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#include <asm/processor-flags.h>
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.text
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.balign PAGE_SIZE
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.code16
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ENTRY(trampoline_data)
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cli # We should be safe anyway
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wbinvd
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.byte 0xea # ljmpw
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.word 1f # Offset
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.word real_mode_seg # Segment
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1:
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mov %cs, %ax # Code and data in the same place
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mov %ax, %ds
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mov %ax, %es
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mov %ax, %ss
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movl $0xA5A5A5A5, trampoline_status
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# write marker for master knows we're running
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# Setup stack
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movw $trampoline_stack_end, %sp
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call verify_cpu # Verify the cpu supports long mode
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testl %eax, %eax # Check for return code
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jnz no_longmode
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/*
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* GDT tables in non default location kernel can be beyond 16MB and
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* lgdt will not be able to load the address as in real mode default
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* operand size is 16bit. Use lgdtl instead to force operand size
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* to 32 bit.
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*/
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lidtl tidt # load idt with 0, 0
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lgdtl tgdt # load gdt with whatever is appropriate
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mov $X86_CR0_PE, %ax # protected mode (PE) bit
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lmsw %ax # into protected mode
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# flush prefetch and jump to startup_32
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ljmpl *(startup_32_vector)
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no_longmode:
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hlt
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jmp no_longmode
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#include "../kernel/verify_cpu.S"
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.code32
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.balign 4
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ENTRY(startup_32)
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movl $__KERNEL_DS, %eax # Initialize the %ds segment register
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movl %eax, %ds
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movl $X86_CR4_PAE, %eax
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movl %eax, %cr4 # Enable PAE mode
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movl pa_startup_64_smp, %esi
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movl pa_startup_64_smp_high, %edi
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# Setup trampoline 4 level pagetables
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leal pa_trampoline_level4_pgt, %eax
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movl %eax, %cr3
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movl $MSR_EFER, %ecx
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movl $(1 << _EFER_LME), %eax # Enable Long Mode
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xorl %edx, %edx
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wrmsr
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# Enable paging and in turn activate Long Mode
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# Enable protected mode
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movl $(X86_CR0_PG | X86_CR0_PE), %eax
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movl %eax, %cr0
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/*
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* At this point we're in long mode but in 32bit compatibility mode
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* with EFER.LME = 1, CS.L = 0, CS.D = 1 (and in turn
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* EFER.LMA = 1). Now we want to jump in 64bit mode, to do that we use
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* the new gdt/idt that has __KERNEL_CS with CS.L = 1.
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*/
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ljmpl *(pa_startup_64_vector)
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.code64
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.balign 4
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ENTRY(startup_64)
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# Now jump into the kernel using virtual addresses
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movl %edi, %eax
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shlq $32, %rax
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addl %esi, %eax
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jmp *%rax
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# Careful these need to be in the same 64K segment as the above;
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tidt:
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.word 0 # idt limit = 0
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.word 0, 0 # idt base = 0L
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# Duplicate the global descriptor table
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# so the kernel can live anywhere
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.balign 4
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.globl tgdt
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tgdt:
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.short tgdt_end - tgdt # gdt limit
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.long pa_tgdt
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.short 0
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.quad 0x00cf9b000000ffff # __KERNEL32_CS
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.quad 0x00af9b000000ffff # __KERNEL_CS
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.quad 0x00cf93000000ffff # __KERNEL_DS
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tgdt_end:
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.balign 4
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startup_32_vector:
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.long pa_startup_32
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.word __KERNEL32_CS, 0
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.balign 4
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.globl startup_64_vector
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startup_64_vector:
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.long pa_startup_64
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.word __KERNEL_CS, 0
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.data
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.balign 4
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ENTRY(trampoline_status)
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.long 0
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trampoline_stack:
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.org 0x1000
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trampoline_stack_end:
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.globl level3_ident_pgt
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.globl level3_kernel_pgt
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ENTRY(trampoline_level4_pgt)
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level3_ident_pgt: .quad 0
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.fill 510,8,0
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level3_kernel_pgt: .quad 0
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.globl startup_64_smp
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.globl startup_64_smp_high
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startup_64_smp: .long 0
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startup_64_smp_high: .long 0
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