forked from Minki/linux
wl1271: Add config structure for FW init parameters
Add a configuration structure for RX path parameters, and set default configuration values there. Signed-off-by: Juuso Oikarinen <juuso.oikarinen@nokia.com> Reviewed-by: Luciano Coelho <luciano.coelho@nokia.com> Signed-off-by: Luciano Coelho <luciano.coelho@nokia.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
This commit is contained in:
parent
51f2be2432
commit
47fab7d589
@ -1014,7 +1014,7 @@ int wl1271_acx_smart_reflex(struct wl1271 *wl)
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{
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struct acx_smart_reflex_state *sr_state = NULL;
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struct acx_smart_reflex_config_params *sr_param = NULL;
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int ret;
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int i, ret;
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wl1271_debug(DEBUG_ACX, "acx smart reflex");
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@ -1024,33 +1024,14 @@ int wl1271_acx_smart_reflex(struct wl1271 *wl)
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goto out;
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}
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/* set cryptic smart reflex parameters - source TI reference code */
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sr_param->error_table[0].len = 0x07;
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sr_param->error_table[0].upper_limit = 0x03;
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sr_param->error_table[0].values[0] = 0x18;
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sr_param->error_table[0].values[1] = 0x10;
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sr_param->error_table[0].values[2] = 0x05;
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sr_param->error_table[0].values[3] = 0xfb;
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sr_param->error_table[0].values[4] = 0xf0;
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sr_param->error_table[0].values[5] = 0xe8;
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for (i = 0; i < CONF_SR_ERR_TBL_COUNT; i++) {
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struct conf_mart_reflex_err_table *e =
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&(wl->conf.init.sr_err_tbl[i]);
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sr_param->error_table[1].len = 0x07;
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sr_param->error_table[1].upper_limit = 0x03;
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sr_param->error_table[1].values[0] = 0x18;
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sr_param->error_table[1].values[1] = 0x10;
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sr_param->error_table[1].values[2] = 0x05;
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sr_param->error_table[1].values[3] = 0xf6;
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sr_param->error_table[1].values[4] = 0xf0;
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sr_param->error_table[1].values[5] = 0xe8;
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sr_param->error_table[2].len = 0x07;
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sr_param->error_table[2].upper_limit = 0x03;
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sr_param->error_table[2].values[0] = 0x18;
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sr_param->error_table[2].values[1] = 0x10;
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sr_param->error_table[2].values[2] = 0x05;
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sr_param->error_table[2].values[3] = 0xfb;
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sr_param->error_table[2].values[4] = 0xf0;
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sr_param->error_table[2].values[5] = 0xe8;
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sr_param->error_table[i].len = e->len;
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sr_param->error_table[i].upper_limit = e->upper_limit;
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memcpy(sr_param->error_table[i].values, e->values, e->len);
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}
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ret = wl1271_cmd_configure(wl, ACX_SET_SMART_REFLEX_PARAMS,
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sr_param, sizeof(*sr_param));
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@ -1066,7 +1047,7 @@ int wl1271_acx_smart_reflex(struct wl1271 *wl)
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}
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/* enable smart reflex */
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sr_state->enable = 1;
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sr_state->enable = wl->conf.init.sr_enable;
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ret = wl1271_cmd_configure(wl, ACX_SET_SMART_REFLEX_STATE,
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sr_state, sizeof(*sr_state));
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@ -691,11 +691,193 @@ struct conf_conn_settings {
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struct conf_sig_weights sig_weights;
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};
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#define CONF_SR_ERR_TBL_MAX_VALUES 14
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struct conf_mart_reflex_err_table {
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/*
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* Length of the error table values table.
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*
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* Range: 0 - CONF_SR_ERR_TBL_MAX_VALUES
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*/
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u8 len;
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/*
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* Smart Reflex error table upper limit.
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*
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* Range: s8
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*/
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s8 upper_limit;
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/*
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* Smart Reflex error table values.
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*
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* Range: s8
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*/
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s8 values[CONF_SR_ERR_TBL_MAX_VALUES];
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};
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enum {
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CONF_REF_CLK_19_2_E,
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CONF_REF_CLK_26_E,
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CONF_REF_CLK_38_4_E,
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CONF_REF_CLK_52_E
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};
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struct conf_general_parms {
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/*
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* RF Reference Clock type / speed
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*
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* Range: CONF_REF_CLK_*
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*/
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u8 ref_clk;
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/*
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* Settling time of the reference clock after boot.
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*
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* Range: u8
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*/
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u8 settling_time;
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/*
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* Flag defining whether clock is valid on wakeup.
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*
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* Range: 0 - not valid on wakeup, 1 - valid on wakeup
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*/
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u8 clk_valid_on_wakeup;
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/*
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* DC-to-DC mode.
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*
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* Range: Unknown
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*/
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u8 dc2dcmode;
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/*
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* Flag defining whether used as single or dual-band.
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*
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* Range: Unknown
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*/
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u8 single_dual_band;
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/*
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* TX bip fem autodetect flag.
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*
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* Range: Unknown
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*/
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u8 tx_bip_fem_autodetect;
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/*
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* TX bip gem manufacturer.
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*
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* Range: Unknown
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*/
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u8 tx_bip_fem_manufacturer;
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/*
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* Settings flags.
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*
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* Range: Unknown
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*/
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u8 settings;
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};
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#define CONF_RSSI_AND_PROCESS_COMPENSATION_SIZE 15
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#define CONF_NUMBER_OF_SUB_BANDS_5 7
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#define CONF_NUMBER_OF_RATE_GROUPS 6
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#define CONF_NUMBER_OF_CHANNELS_2_4 14
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#define CONF_NUMBER_OF_CHANNELS_5 35
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struct conf_radio_parms {
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/*
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* Static radio parameters for 2.4GHz
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*
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* Range: unknown
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*/
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u8 rx_trace_loss;
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u8 tx_trace_loss;
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s8 rx_rssi_and_proc_compens[CONF_RSSI_AND_PROCESS_COMPENSATION_SIZE];
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/*
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* Static radio parameters for 5GHz
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*
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* Range: unknown
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*/
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u8 rx_trace_loss_5[CONF_NUMBER_OF_SUB_BANDS_5];
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u8 tx_trace_loss_5[CONF_NUMBER_OF_SUB_BANDS_5];
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s8 rx_rssi_and_proc_compens_5[CONF_RSSI_AND_PROCESS_COMPENSATION_SIZE];
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/*
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* Dynamic radio parameters for 2.4GHz
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*
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* Range: unknown
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*/
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s16 tx_ref_pd_voltage;
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s8 tx_ref_power;
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s8 tx_offset_db;
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s8 tx_rate_limits_normal[CONF_NUMBER_OF_RATE_GROUPS];
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s8 tx_rate_limits_degraded[CONF_NUMBER_OF_RATE_GROUPS];
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s8 tx_channel_limits_11b[CONF_NUMBER_OF_CHANNELS_2_4];
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s8 tx_channel_limits_ofdm[CONF_NUMBER_OF_CHANNELS_2_4];
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s8 tx_pdv_rate_offsets[CONF_NUMBER_OF_RATE_GROUPS];
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u8 tx_ibias[CONF_NUMBER_OF_RATE_GROUPS];
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u8 rx_fem_insertion_loss;
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/*
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* Dynamic radio parameters for 5GHz
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*
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* Range: unknown
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*/
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s16 tx_ref_pd_voltage_5[CONF_NUMBER_OF_SUB_BANDS_5];
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s8 tx_ref_power_5[CONF_NUMBER_OF_SUB_BANDS_5];
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s8 tx_offset_db_5[CONF_NUMBER_OF_SUB_BANDS_5];
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s8 tx_rate_limits_normal_5[CONF_NUMBER_OF_RATE_GROUPS];
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s8 tx_rate_limits_degraded_5[CONF_NUMBER_OF_RATE_GROUPS];
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s8 tx_channel_limits_ofdm_5[CONF_NUMBER_OF_CHANNELS_5];
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s8 tx_pdv_rate_offsets_5[CONF_NUMBER_OF_RATE_GROUPS];
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/* FIXME: this is inconsistent with the types for 2.4GHz */
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s8 tx_ibias_5[CONF_NUMBER_OF_RATE_GROUPS];
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s8 rx_fem_insertion_loss_5[CONF_NUMBER_OF_SUB_BANDS_5];
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};
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#define CONF_SR_ERR_TBL_COUNT 3
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struct conf_init_settings {
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/*
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* Configure Smart Reflex error table values.
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*/
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struct conf_mart_reflex_err_table sr_err_tbl[CONF_SR_ERR_TBL_COUNT];
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/*
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* Smart Reflex enable flag.
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*
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* Range: 1 - Smart Reflex enabled, 0 - Smart Reflex disabled
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*/
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u8 sr_enable;
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/*
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* Configure general parameters.
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*/
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struct conf_general_parms genparam;
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/*
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* Configure radio parameters.
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*/
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struct conf_radio_parms radioparam;
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};
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struct conf_drv_settings {
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struct conf_sg_settings sg;
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struct conf_rx_settings rx;
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struct conf_tx_settings tx;
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struct conf_conn_settings conn;
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struct conf_init_settings init;
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};
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#endif
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@ -188,6 +188,7 @@ static int wl1271_init_beacon_broadcast(struct wl1271 *wl)
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static int wl1271_init_general_parms(struct wl1271 *wl)
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{
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struct wl1271_general_parms *gen_parms;
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struct conf_general_parms *g = &wl->conf.init.genparam;
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int ret;
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gen_parms = kzalloc(sizeof(*gen_parms), GFP_KERNEL);
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@ -196,22 +197,14 @@ static int wl1271_init_general_parms(struct wl1271 *wl)
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gen_parms->id = TEST_CMD_INI_FILE_GENERAL_PARAM;
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/*
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* FIXME: The firmware crashes on boot with REF_CLK_38_4_E as clock.
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* according to TI engineers, ref clk 5 is an unofficial
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* 38.4 XTAL clock config, which seems to boot the device.
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* Restore correct value once the real problem source is
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* identified.
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*/
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gen_parms->ref_clk = 5; /* REF_CLK_38_4_E; */
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/* FIXME: magic numbers */
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gen_parms->settling_time = 5;
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gen_parms->clk_valid_on_wakeup = 0;
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gen_parms->dc2dcmode = 0;
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gen_parms->single_dual_band = 0;
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gen_parms->tx_bip_fem_autodetect = 0;
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gen_parms->tx_bip_fem_manufacturer = 1;
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gen_parms->settings = 1;
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gen_parms->ref_clk = g->ref_clk;
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gen_parms->settling_time = g->settling_time;
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gen_parms->clk_valid_on_wakeup = g->clk_valid_on_wakeup;
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gen_parms->dc2dcmode = g->dc2dcmode;
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gen_parms->single_dual_band = g->single_dual_band;
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gen_parms->tx_bip_fem_autodetect = g->tx_bip_fem_autodetect;
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gen_parms->tx_bip_fem_manufacturer = g->tx_bip_fem_manufacturer;
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gen_parms->settings = g->settings;
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ret = wl1271_cmd_test(wl, gen_parms, sizeof(*gen_parms), 0);
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if (ret < 0) {
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@ -225,32 +218,9 @@ static int wl1271_init_general_parms(struct wl1271 *wl)
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static int wl1271_init_radio_parms(struct wl1271 *wl)
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{
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/*
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* FIXME: All these magic numbers should be moved to some place where
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* they can be configured (separate file?)
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*/
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struct wl1271_radio_parms *radio_parms;
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int ret;
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u8 compensation[] = { 0xec, 0xf6, 0x00, 0x0c, 0x18, 0xf8, 0xfc, 0x00,
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0x08, 0x10, 0xf0, 0xf8, 0x00, 0x0a, 0x14 };
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u8 tx_rate_limits_normal[] = { 0x1e, 0x1f, 0x22, 0x24, 0x28, 0x29 };
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u8 tx_rate_limits_degraded[] = { 0x1b, 0x1c, 0x1e, 0x20, 0x24, 0x25 };
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u8 tx_channel_limits_11b[] = { 0x22, 0x50, 0x50, 0x50,
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0x50, 0x50, 0x50, 0x50,
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0x50, 0x50, 0x22, 0x50,
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0x22, 0x50 };
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u8 tx_channel_limits_ofdm[] = { 0x20, 0x50, 0x50, 0x50,
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0x50, 0x50, 0x50, 0x50,
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0x50, 0x50, 0x20, 0x50,
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0x20, 0x50 };
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u8 tx_pdv_rate_offsets[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00};
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u8 tx_ibias[] = { 0x1a, 0x1a, 0x1a, 0x1a, 0x1a, 0x27 };
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struct conf_radio_parms *r = &wl->conf.init.radioparam;
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int i, ret;
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radio_parms = kzalloc(sizeof(*radio_parms), GFP_KERNEL);
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if (!radio_parms)
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@ -259,33 +229,59 @@ static int wl1271_init_radio_parms(struct wl1271 *wl)
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radio_parms->id = TEST_CMD_INI_FILE_RADIO_PARAM;
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/* Static radio parameters */
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radio_parms->rx_trace_loss = 10;
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radio_parms->tx_trace_loss = 10;
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memcpy(radio_parms->rx_rssi_and_proc_compens, compensation,
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sizeof(compensation));
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radio_parms->rx_trace_loss = r->rx_trace_loss;
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radio_parms->tx_trace_loss = r->tx_trace_loss;
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memcpy(radio_parms->rx_rssi_and_proc_compens,
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r->rx_rssi_and_proc_compens,
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CONF_RSSI_AND_PROCESS_COMPENSATION_SIZE);
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/* We don't set the 5GHz -- N/A */
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memcpy(radio_parms->rx_trace_loss_5, r->rx_trace_loss_5,
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CONF_NUMBER_OF_SUB_BANDS_5);
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memcpy(radio_parms->tx_trace_loss_5, r->tx_trace_loss_5,
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CONF_NUMBER_OF_SUB_BANDS_5);
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memcpy(radio_parms->rx_rssi_and_proc_compens_5,
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r->rx_rssi_and_proc_compens_5,
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CONF_RSSI_AND_PROCESS_COMPENSATION_SIZE);
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/* Dynamic radio parameters */
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radio_parms->tx_ref_pd_voltage = cpu_to_le16(0x24e);
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radio_parms->tx_ref_power = 0x78;
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radio_parms->tx_offset_db = 0x0;
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radio_parms->tx_ref_pd_voltage = cpu_to_le16(r->tx_ref_pd_voltage);
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radio_parms->tx_ref_power = r->tx_ref_power;
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radio_parms->tx_offset_db = r->tx_offset_db;
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memcpy(radio_parms->tx_rate_limits_normal, tx_rate_limits_normal,
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sizeof(tx_rate_limits_normal));
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memcpy(radio_parms->tx_rate_limits_degraded, tx_rate_limits_degraded,
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sizeof(tx_rate_limits_degraded));
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memcpy(radio_parms->tx_rate_limits_normal, r->tx_rate_limits_normal,
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CONF_NUMBER_OF_RATE_GROUPS);
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memcpy(radio_parms->tx_rate_limits_degraded, r->tx_rate_limits_degraded,
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CONF_NUMBER_OF_RATE_GROUPS);
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memcpy(radio_parms->tx_channel_limits_11b, tx_channel_limits_11b,
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sizeof(tx_channel_limits_11b));
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memcpy(radio_parms->tx_channel_limits_ofdm, tx_channel_limits_ofdm,
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sizeof(tx_channel_limits_ofdm));
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memcpy(radio_parms->tx_pdv_rate_offsets, tx_pdv_rate_offsets,
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sizeof(tx_pdv_rate_offsets));
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memcpy(radio_parms->tx_ibias, tx_ibias,
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sizeof(tx_ibias));
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memcpy(radio_parms->tx_channel_limits_11b, r->tx_channel_limits_11b,
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CONF_NUMBER_OF_CHANNELS_2_4);
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memcpy(radio_parms->tx_channel_limits_ofdm, r->tx_channel_limits_ofdm,
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CONF_NUMBER_OF_CHANNELS_2_4);
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memcpy(radio_parms->tx_pdv_rate_offsets, r->tx_pdv_rate_offsets,
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CONF_NUMBER_OF_RATE_GROUPS);
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memcpy(radio_parms->tx_ibias, r->tx_ibias, CONF_NUMBER_OF_RATE_GROUPS);
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radio_parms->rx_fem_insertion_loss = 0x14;
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radio_parms->rx_fem_insertion_loss = r->rx_fem_insertion_loss;
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for (i = 0; i < CONF_NUMBER_OF_SUB_BANDS_5; i++)
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radio_parms->tx_ref_pd_voltage_5[i] =
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cpu_to_le16(r->tx_ref_pd_voltage_5[i]);
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memcpy(radio_parms->tx_ref_power_5, r->tx_ref_power_5,
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CONF_NUMBER_OF_SUB_BANDS_5);
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memcpy(radio_parms->tx_offset_db_5, r->tx_offset_db_5,
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CONF_NUMBER_OF_SUB_BANDS_5);
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memcpy(radio_parms->tx_rate_limits_normal_5,
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r->tx_rate_limits_normal_5, CONF_NUMBER_OF_RATE_GROUPS);
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memcpy(radio_parms->tx_rate_limits_degraded_5,
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r->tx_rate_limits_degraded_5, CONF_NUMBER_OF_RATE_GROUPS);
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memcpy(radio_parms->tx_channel_limits_ofdm_5,
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r->tx_channel_limits_ofdm_5, CONF_NUMBER_OF_CHANNELS_5);
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memcpy(radio_parms->tx_pdv_rate_offsets_5, r->tx_pdv_rate_offsets_5,
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CONF_NUMBER_OF_RATE_GROUPS);
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memcpy(radio_parms->tx_ibias_5, r->tx_ibias_5,
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CONF_NUMBER_OF_RATE_GROUPS);
|
||||
memcpy(radio_parms->rx_fem_insertion_loss_5,
|
||||
r->rx_fem_insertion_loss_5, CONF_NUMBER_OF_SUB_BANDS_5);
|
||||
|
||||
ret = wl1271_cmd_test(wl, radio_parms, sizeof(*radio_parms), 0);
|
||||
if (ret < 0)
|
||||
|
@ -48,19 +48,6 @@ struct wl1271_general_parms {
|
||||
u8 settings;
|
||||
} __attribute__ ((packed));
|
||||
|
||||
enum ref_clk_enum {
|
||||
REF_CLK_19_2_E,
|
||||
REF_CLK_26_E,
|
||||
REF_CLK_38_4_E,
|
||||
REF_CLK_52_E
|
||||
};
|
||||
|
||||
#define RSSI_AND_PROCESS_COMPENSATION_SIZE 15
|
||||
#define NUMBER_OF_SUB_BANDS_5 7
|
||||
#define NUMBER_OF_RATE_GROUPS 6
|
||||
#define NUMBER_OF_CHANNELS_2_4 14
|
||||
#define NUMBER_OF_CHANNELS_5 35
|
||||
|
||||
struct wl1271_radio_parms {
|
||||
u8 id;
|
||||
u8 padding[3];
|
||||
@ -69,12 +56,12 @@ struct wl1271_radio_parms {
|
||||
/* 2.4GHz */
|
||||
u8 rx_trace_loss;
|
||||
u8 tx_trace_loss;
|
||||
s8 rx_rssi_and_proc_compens[RSSI_AND_PROCESS_COMPENSATION_SIZE];
|
||||
s8 rx_rssi_and_proc_compens[CONF_RSSI_AND_PROCESS_COMPENSATION_SIZE];
|
||||
|
||||
/* 5GHz */
|
||||
u8 rx_trace_loss_5[NUMBER_OF_SUB_BANDS_5];
|
||||
u8 tx_trace_loss_5[NUMBER_OF_SUB_BANDS_5];
|
||||
s8 rx_rssi_and_proc_compens_5[RSSI_AND_PROCESS_COMPENSATION_SIZE];
|
||||
u8 rx_trace_loss_5[CONF_NUMBER_OF_SUB_BANDS_5];
|
||||
u8 tx_trace_loss_5[CONF_NUMBER_OF_SUB_BANDS_5];
|
||||
s8 rx_rssi_and_proc_compens_5[CONF_RSSI_AND_PROCESS_COMPENSATION_SIZE];
|
||||
|
||||
/* Dynamic radio parameters */
|
||||
/* 2.4GHz */
|
||||
@ -82,32 +69,32 @@ struct wl1271_radio_parms {
|
||||
s8 tx_ref_power;
|
||||
s8 tx_offset_db;
|
||||
|
||||
s8 tx_rate_limits_normal[NUMBER_OF_RATE_GROUPS];
|
||||
s8 tx_rate_limits_degraded[NUMBER_OF_RATE_GROUPS];
|
||||
s8 tx_rate_limits_normal[CONF_NUMBER_OF_RATE_GROUPS];
|
||||
s8 tx_rate_limits_degraded[CONF_NUMBER_OF_RATE_GROUPS];
|
||||
|
||||
s8 tx_channel_limits_11b[NUMBER_OF_CHANNELS_2_4];
|
||||
s8 tx_channel_limits_ofdm[NUMBER_OF_CHANNELS_2_4];
|
||||
s8 tx_pdv_rate_offsets[NUMBER_OF_RATE_GROUPS];
|
||||
s8 tx_channel_limits_11b[CONF_NUMBER_OF_CHANNELS_2_4];
|
||||
s8 tx_channel_limits_ofdm[CONF_NUMBER_OF_CHANNELS_2_4];
|
||||
s8 tx_pdv_rate_offsets[CONF_NUMBER_OF_RATE_GROUPS];
|
||||
|
||||
u8 tx_ibias[NUMBER_OF_RATE_GROUPS];
|
||||
u8 tx_ibias[CONF_NUMBER_OF_RATE_GROUPS];
|
||||
u8 rx_fem_insertion_loss;
|
||||
|
||||
u8 padding2;
|
||||
|
||||
/* 5GHz */
|
||||
s16 tx_ref_pd_voltage_5[NUMBER_OF_SUB_BANDS_5];
|
||||
s8 tx_ref_power_5[NUMBER_OF_SUB_BANDS_5];
|
||||
s8 tx_offset_db_5[NUMBER_OF_SUB_BANDS_5];
|
||||
s16 tx_ref_pd_voltage_5[CONF_NUMBER_OF_SUB_BANDS_5];
|
||||
s8 tx_ref_power_5[CONF_NUMBER_OF_SUB_BANDS_5];
|
||||
s8 tx_offset_db_5[CONF_NUMBER_OF_SUB_BANDS_5];
|
||||
|
||||
s8 tx_rate_limits_normal_5[NUMBER_OF_RATE_GROUPS];
|
||||
s8 tx_rate_limits_degraded_5[NUMBER_OF_RATE_GROUPS];
|
||||
s8 tx_rate_limits_normal_5[CONF_NUMBER_OF_RATE_GROUPS];
|
||||
s8 tx_rate_limits_degraded_5[CONF_NUMBER_OF_RATE_GROUPS];
|
||||
|
||||
s8 tx_channel_limits_ofdm_5[NUMBER_OF_CHANNELS_5];
|
||||
s8 tx_pdv_rate_offsets_5[NUMBER_OF_RATE_GROUPS];
|
||||
s8 tx_channel_limits_ofdm_5[CONF_NUMBER_OF_CHANNELS_5];
|
||||
s8 tx_pdv_rate_offsets_5[CONF_NUMBER_OF_RATE_GROUPS];
|
||||
|
||||
/* FIXME: this is inconsistent with the types for 2.4GHz */
|
||||
s8 tx_ibias_5[NUMBER_OF_RATE_GROUPS];
|
||||
s8 rx_fem_insertion_loss_5[NUMBER_OF_SUB_BANDS_5];
|
||||
s8 tx_ibias_5[CONF_NUMBER_OF_RATE_GROUPS];
|
||||
s8 rx_fem_insertion_loss_5[CONF_NUMBER_OF_SUB_BANDS_5];
|
||||
|
||||
u8 padding3[2];
|
||||
} __attribute__ ((packed));
|
||||
|
@ -224,6 +224,109 @@ static void wl1271_conf_init(struct wl1271 *wl)
|
||||
.snr_bcn_avg_weight = 10,
|
||||
.snr_pkt_avg_weight = 10
|
||||
}
|
||||
},
|
||||
.init = {
|
||||
.sr_err_tbl = {
|
||||
[0] = {
|
||||
.len = 7,
|
||||
.upper_limit = 0x03,
|
||||
.values = {
|
||||
0x18, 0x10, 0x05, 0xfb,
|
||||
0xf0, 0xe8, 0x00 }
|
||||
},
|
||||
[1] = {
|
||||
.len = 7,
|
||||
.upper_limit = 0x03,
|
||||
.values = {
|
||||
0x18, 0x10, 0x05, 0xf6,
|
||||
0xf0, 0xe8, 0x00 }
|
||||
},
|
||||
[2] = {
|
||||
.len = 7,
|
||||
.upper_limit = 0x03,
|
||||
.values = {
|
||||
0x18, 0x10, 0x05, 0xfb,
|
||||
0xf0, 0xe8, 0x00 }
|
||||
}
|
||||
},
|
||||
.sr_enable = 1,
|
||||
.genparam = {
|
||||
/*
|
||||
* FIXME: The correct value CONF_REF_CLK_38_4_E
|
||||
* causes the firmware to crash on boot.
|
||||
* The value 5 apparently is an
|
||||
* unnoficial XTAL configuration of the
|
||||
* same frequency, which appears to work.
|
||||
*/
|
||||
.ref_clk = 5,
|
||||
.settling_time = 5,
|
||||
.clk_valid_on_wakeup = 0,
|
||||
.dc2dcmode = 0,
|
||||
.single_dual_band = 0,
|
||||
.tx_bip_fem_autodetect = 0,
|
||||
.tx_bip_fem_manufacturer = 1,
|
||||
.settings = 1,
|
||||
},
|
||||
.radioparam = {
|
||||
/* FIXME: 5GHz values unset! */
|
||||
.rx_trace_loss = 10,
|
||||
.tx_trace_loss = 10,
|
||||
.rx_rssi_and_proc_compens = {
|
||||
0xec, 0xf6, 0x00, 0x0c, 0x18, 0xf8,
|
||||
0xfc, 0x00, 0x08, 0x10, 0xf0, 0xf8,
|
||||
0x00, 0x0a, 0x14 },
|
||||
.rx_trace_loss_5 = {
|
||||
0, 0, 0, 0, 0, 0, 0 },
|
||||
.tx_trace_loss_5 = {
|
||||
0, 0, 0, 0, 0, 0, 0 },
|
||||
.rx_rssi_and_proc_compens_5 = {
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00 },
|
||||
.tx_ref_pd_voltage = 0x24e,
|
||||
.tx_ref_power = 0x78,
|
||||
.tx_offset_db = 0x0,
|
||||
.tx_rate_limits_normal = {
|
||||
0x1e, 0x1f, 0x22, 0x24, 0x28, 0x29 },
|
||||
.tx_rate_limits_degraded = {
|
||||
0x1b, 0x1c, 0x1e, 0x20, 0x24, 0x25 },
|
||||
.tx_channel_limits_11b = {
|
||||
0x22, 0x50, 0x50, 0x50, 0x50, 0x50,
|
||||
0x50, 0x50, 0x50, 0x50, 0x22, 0x50,
|
||||
0x22, 0x50 },
|
||||
.tx_channel_limits_ofdm = {
|
||||
0x20, 0x50, 0x50, 0x50, 0x50, 0x50,
|
||||
0x50, 0x50, 0x50, 0x50, 0x20, 0x50,
|
||||
0x20, 0x50 },
|
||||
.tx_pdv_rate_offsets = {
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00 },
|
||||
.tx_ibias = {
|
||||
0x1a, 0x1a, 0x1a, 0x1a, 0x1a, 0x27 },
|
||||
.rx_fem_insertion_loss = 0x14,
|
||||
.tx_ref_pd_voltage_5 = {
|
||||
0, 0, 0, 0, 0, 0, 0 },
|
||||
.tx_ref_power_5 = {
|
||||
0, 0, 0, 0, 0, 0, 0 },
|
||||
.tx_offset_db_5 = {
|
||||
0, 0, 0, 0, 0, 0, 0 },
|
||||
.tx_rate_limits_normal_5 = {
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00 },
|
||||
.tx_rate_limits_degraded_5 = {
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00 },
|
||||
.tx_channel_limits_ofdm_5 = {
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00},
|
||||
.tx_pdv_rate_offsets_5 = {
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00 },
|
||||
.tx_ibias_5 = {
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00 },
|
||||
.rx_fem_insertion_loss_5 = {
|
||||
0, 0, 0, 0, 0, 0, 0 }
|
||||
}
|
||||
}
|
||||
};
|
||||
|
||||
|
Loading…
Reference in New Issue
Block a user