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net: mvpp2: Make mvpp2_prs_hw_read a parser entry init function

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The mvpp2_prs_hw_read function uses the 'index' field of the struct
mvpp2_prs_entry to initialize the rest of the fields. This makes it
unclear from a caller's perspective, who needs to manipulate a struct
that is not entirely initialized.

This commit makes it an init function for prs_entry, by passing it the
index as a parameter. The function now zeroes the entry, and sets the
index field before doing all other init from HW.

The function is renamed 'mvpp2_prs_init_from_hw' to make that clear.

Signed-off-by: Maxime Chevallier <maxime.chevallier@bootlin.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
Maxime Chevallier 2018-03-26 15:34:22 +02:00 committed by David S. Miller
parent 8daf1a2d7e
commit 47e0e14eb1
1 changed files with 19 additions and 29 deletions
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48
drivers/net/ethernet/marvell/mvpp2.c
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@ -1582,14 +1582,18 @@ static int mvpp2_prs_hw_write(struct mvpp2 *priv, struct mvpp2_prs_entry *pe)
return 0; return 0;
} }
/* Read tcam entry from hw */ /* Initialize tcam entry from hw */
static int mvpp2_prs_hw_read(struct mvpp2 *priv, struct mvpp2_prs_entry *pe) static int mvpp2_prs_init_from_hw(struct mvpp2 *priv,
struct mvpp2_prs_entry *pe, int tid)
{ {
int i; int i;
if (pe->index > MVPP2_PRS_TCAM_SRAM_SIZE - 1) if (pe->index > MVPP2_PRS_TCAM_SRAM_SIZE - 1)
return -EINVAL; return -EINVAL;
memset(pe, 0, sizeof(*pe));
pe->index = tid;
/* Write tcam index - indirect access */ /* Write tcam index - indirect access */
mvpp2_write(priv, MVPP2_PRS_TCAM_IDX_REG, pe->index); mvpp2_write(priv, MVPP2_PRS_TCAM_IDX_REG, pe->index);
@ -1931,8 +1935,7 @@ static struct mvpp2_prs_entry *mvpp2_prs_flow_find(struct mvpp2 *priv, int flow)
priv->prs_shadow[tid].lu != MVPP2_PRS_LU_FLOWS) priv->prs_shadow[tid].lu != MVPP2_PRS_LU_FLOWS)
continue; continue;
pe->index = tid; mvpp2_prs_init_from_hw(priv, pe, tid);
mvpp2_prs_hw_read(priv, pe);
bits = mvpp2_prs_sram_ai_get(pe); bits = mvpp2_prs_sram_ai_get(pe);
/* Sram store classification lookup ID in AI bits [5:0] */ /* Sram store classification lookup ID in AI bits [5:0] */
@ -1971,8 +1974,7 @@ static void mvpp2_prs_mac_drop_all_set(struct mvpp2 *priv, int port, bool add)
if (priv->prs_shadow[MVPP2_PE_DROP_ALL].valid) { if (priv->prs_shadow[MVPP2_PE_DROP_ALL].valid) {
/* Entry exist - update port only */ /* Entry exist - update port only */
pe.index = MVPP2_PE_DROP_ALL; mvpp2_prs_init_from_hw(priv, &pe, MVPP2_PE_DROP_ALL);
mvpp2_prs_hw_read(priv, &pe);
} else { } else {
/* Entry doesn't exist - create new */ /* Entry doesn't exist - create new */
memset(&pe, 0, sizeof(pe)); memset(&pe, 0, sizeof(pe));
@ -2020,8 +2022,7 @@ static void mvpp2_prs_mac_promisc_set(struct mvpp2 *priv, int port,
/* promiscuous mode - Accept unknown unicast or multicast packets */ /* promiscuous mode - Accept unknown unicast or multicast packets */
if (priv->prs_shadow[tid].valid) { if (priv->prs_shadow[tid].valid) {
pe.index = tid; mvpp2_prs_init_from_hw(priv, &pe, tid);
mvpp2_prs_hw_read(priv, &pe);
} else { } else {
memset(&pe, 0, sizeof(pe)); memset(&pe, 0, sizeof(pe));
mvpp2_prs_tcam_lu_set(&pe, MVPP2_PRS_LU_MAC); mvpp2_prs_tcam_lu_set(&pe, MVPP2_PRS_LU_MAC);
@ -2071,8 +2072,7 @@ static void mvpp2_prs_dsa_tag_set(struct mvpp2 *priv, int port, bool add,
if (priv->prs_shadow[tid].valid) { if (priv->prs_shadow[tid].valid) {
/* Entry exist - update port only */ /* Entry exist - update port only */
pe.index = tid; mvpp2_prs_init_from_hw(priv, &pe, tid);
mvpp2_prs_hw_read(priv, &pe);
} else { } else {
/* Entry doesn't exist - create new */ /* Entry doesn't exist - create new */
memset(&pe, 0, sizeof(pe)); memset(&pe, 0, sizeof(pe));
@ -2140,8 +2140,7 @@ static void mvpp2_prs_dsa_tag_ethertype_set(struct mvpp2 *priv, int port,
if (priv->prs_shadow[tid].valid) { if (priv->prs_shadow[tid].valid) {
/* Entry exist - update port only */ /* Entry exist - update port only */
pe.index = tid; mvpp2_prs_init_from_hw(priv, &pe, tid);
mvpp2_prs_hw_read(priv, &pe);
} else { } else {
/* Entry doesn't exist - create new */ /* Entry doesn't exist - create new */
memset(&pe, 0, sizeof(pe)); memset(&pe, 0, sizeof(pe));
@ -2210,9 +2209,7 @@ static struct mvpp2_prs_entry *mvpp2_prs_vlan_find(struct mvpp2 *priv,
priv->prs_shadow[tid].lu != MVPP2_PRS_LU_VLAN) priv->prs_shadow[tid].lu != MVPP2_PRS_LU_VLAN)
continue; continue;
pe->index = tid; mvpp2_prs_init_from_hw(priv, pe, tid);
mvpp2_prs_hw_read(priv, pe);
match = mvpp2_prs_tcam_data_cmp(pe, 0, swab16(tpid)); match = mvpp2_prs_tcam_data_cmp(pe, 0, swab16(tpid));
if (!match) if (!match)
continue; continue;
@ -2268,8 +2265,7 @@ static int mvpp2_prs_vlan_add(struct mvpp2 *priv, unsigned short tpid, int ai,
priv->prs_shadow[tid_aux].lu != MVPP2_PRS_LU_VLAN) priv->prs_shadow[tid_aux].lu != MVPP2_PRS_LU_VLAN)
continue; continue;
pe->index = tid_aux; mvpp2_prs_init_from_hw(priv, pe, tid_aux);
mvpp2_prs_hw_read(priv, pe);
ri_bits = mvpp2_prs_sram_ri_get(pe); ri_bits = mvpp2_prs_sram_ri_get(pe);
if ((ri_bits & MVPP2_PRS_RI_VLAN_MASK) == if ((ri_bits & MVPP2_PRS_RI_VLAN_MASK) ==
MVPP2_PRS_RI_VLAN_DOUBLE) MVPP2_PRS_RI_VLAN_DOUBLE)
@ -2351,8 +2347,7 @@ static struct mvpp2_prs_entry *mvpp2_prs_double_vlan_find(struct mvpp2 *priv,
priv->prs_shadow[tid].lu != MVPP2_PRS_LU_VLAN) priv->prs_shadow[tid].lu != MVPP2_PRS_LU_VLAN)
continue; continue;
pe->index = tid; mvpp2_prs_init_from_hw(priv, pe, tid);
mvpp2_prs_hw_read(priv, pe);
match = mvpp2_prs_tcam_data_cmp(pe, 0, swab16(tpid1)) match = mvpp2_prs_tcam_data_cmp(pe, 0, swab16(tpid1))
&& mvpp2_prs_tcam_data_cmp(pe, 4, swab16(tpid2)); && mvpp2_prs_tcam_data_cmp(pe, 4, swab16(tpid2));
@ -2406,8 +2401,7 @@ static int mvpp2_prs_double_vlan_add(struct mvpp2 *priv, unsigned short tpid1,
priv->prs_shadow[tid_aux].lu != MVPP2_PRS_LU_VLAN) priv->prs_shadow[tid_aux].lu != MVPP2_PRS_LU_VLAN)
continue; continue;
pe->index = tid_aux; mvpp2_prs_init_from_hw(priv, pe, tid_aux);
mvpp2_prs_hw_read(priv, pe);
ri_bits = mvpp2_prs_sram_ri_get(pe); ri_bits = mvpp2_prs_sram_ri_get(pe);
ri_bits &= MVPP2_PRS_RI_VLAN_MASK; ri_bits &= MVPP2_PRS_RI_VLAN_MASK;
if (ri_bits == MVPP2_PRS_RI_VLAN_SINGLE || if (ri_bits == MVPP2_PRS_RI_VLAN_SINGLE ||
@ -3513,9 +3507,7 @@ static int mvpp2_prs_vid_range_find(struct mvpp2 *priv, int pmap, u16 vid,
priv->prs_shadow[tid].lu != MVPP2_PRS_LU_VID) priv->prs_shadow[tid].lu != MVPP2_PRS_LU_VID)
continue; continue;
pe.index = tid; mvpp2_prs_init_from_hw(priv, &pe, tid);
mvpp2_prs_hw_read(priv, &pe);
mvpp2_prs_tcam_data_byte_get(&pe, 2, &byte[0], &enable[0]); mvpp2_prs_tcam_data_byte_get(&pe, 2, &byte[0], &enable[0]);
mvpp2_prs_tcam_data_byte_get(&pe, 3, &byte[1], &enable[1]); mvpp2_prs_tcam_data_byte_get(&pe, 3, &byte[1], &enable[1]);
@ -3569,7 +3561,7 @@ static int mvpp2_prs_vid_entry_add(struct mvpp2_port *port, u16 vid)
/* Mask all ports */ /* Mask all ports */
mvpp2_prs_tcam_port_map_set(&pe, 0); mvpp2_prs_tcam_port_map_set(&pe, 0);
} else { } else {
mvpp2_prs_hw_read(priv, &pe); mvpp2_prs_init_from_hw(priv, &pe, tid);
} }
/* Enable the current port */ /* Enable the current port */
@ -3793,8 +3785,7 @@ mvpp2_prs_mac_da_range_find(struct mvpp2 *priv, int pmap, const u8 *da,
(priv->prs_shadow[tid].udf != udf_type)) (priv->prs_shadow[tid].udf != udf_type))
continue; continue;
pe->index = tid; mvpp2_prs_init_from_hw(priv, pe, tid);
mvpp2_prs_hw_read(priv, pe);
entry_pmap = mvpp2_prs_tcam_port_map_get(pe); entry_pmap = mvpp2_prs_tcam_port_map_get(pe);
if (mvpp2_prs_mac_range_equals(pe, da, mask) && if (mvpp2_prs_mac_range_equals(pe, da, mask) &&
@ -3935,8 +3926,7 @@ static void mvpp2_prs_mac_del_all(struct mvpp2_port *port)
(priv->prs_shadow[tid].udf != MVPP2_PRS_UDF_MAC_DEF)) (priv->prs_shadow[tid].udf != MVPP2_PRS_UDF_MAC_DEF))
continue; continue;
pe.index = tid; mvpp2_prs_init_from_hw(priv, &pe, tid);
mvpp2_prs_hw_read(priv, &pe);
pmap = mvpp2_prs_tcam_port_map_get(&pe); pmap = mvpp2_prs_tcam_port_map_get(&pe);