forked from Minki/linux
sh: fix READ/WRITE redefinition warnings
kernel.h defines READ and WRITE, so rename the SH math-emu macros
to MREAD and MWRITE.
Fixes these warnings:
.../arch/sh/math-emu/math.c:54: warning: "WRITE" redefined
54 | #define WRITE(d,a) ({if(put_user(d, (typeof (d) __user *)a)) return -EFAULT;})
In file included from ../arch/sh/math-emu/math.c:10:
.../include/linux/kernel.h:37: note: this is the location of the previous definition
37 | #define WRITE 1
.../arch/sh/math-emu/math.c:55: warning: "READ" redefined
55 | #define READ(d,a) ({if(get_user(d, (typeof (d) __user *)a)) return -EFAULT;})
In file included from ../arch/sh/math-emu/math.c:10:
.../include/linux/kernel.h:36: note: this is the location of the previous definition
36 | #define READ 0
Fixes: 4b565680d1
("sh: math-emu support")
Signed-off-by: Randy Dunlap <rdunlap@infradead.org>
Cc: Yoshinori Sato <ysato@users.sourceforge.jp>
Cc: Takashi YOSHII <takasi-y@ops.dti.ne.jp>
Cc: John Paul Adrian Glaubitz <glaubitz@physik.fu-berlin.de>
Cc: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Rich Felker <dalias@libc.org>
This commit is contained in:
parent
b929926f01
commit
475c3f5995
@ -51,8 +51,8 @@
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#define Rn (regs->regs[n])
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#define Rm (regs->regs[m])
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#define WRITE(d,a) ({if(put_user(d, (typeof (d) __user *)a)) return -EFAULT;})
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#define READ(d,a) ({if(get_user(d, (typeof (d) __user *)a)) return -EFAULT;})
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#define MWRITE(d,a) ({if(put_user(d, (typeof (d) __user *)a)) return -EFAULT;})
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#define MREAD(d,a) ({if(get_user(d, (typeof (d) __user *)a)) return -EFAULT;})
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#define PACK_S(r,f) FP_PACK_SP(&r,f)
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#define UNPACK_S(f,r) FP_UNPACK_SP(f,&r)
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@ -157,11 +157,11 @@ fmov_idx_reg(struct sh_fpu_soft_struct *fregs, struct pt_regs *regs, int m,
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{
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if (FPSCR_SZ) {
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FMOV_EXT(n);
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READ(FRn, Rm + R0 + 4);
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MREAD(FRn, Rm + R0 + 4);
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n++;
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READ(FRn, Rm + R0);
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MREAD(FRn, Rm + R0);
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} else {
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READ(FRn, Rm + R0);
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MREAD(FRn, Rm + R0);
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}
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return 0;
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@ -173,11 +173,11 @@ fmov_mem_reg(struct sh_fpu_soft_struct *fregs, struct pt_regs *regs, int m,
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{
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if (FPSCR_SZ) {
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FMOV_EXT(n);
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READ(FRn, Rm + 4);
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MREAD(FRn, Rm + 4);
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n++;
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READ(FRn, Rm);
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MREAD(FRn, Rm);
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} else {
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READ(FRn, Rm);
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MREAD(FRn, Rm);
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}
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return 0;
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@ -189,12 +189,12 @@ fmov_inc_reg(struct sh_fpu_soft_struct *fregs, struct pt_regs *regs, int m,
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{
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if (FPSCR_SZ) {
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FMOV_EXT(n);
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READ(FRn, Rm + 4);
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MREAD(FRn, Rm + 4);
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n++;
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READ(FRn, Rm);
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MREAD(FRn, Rm);
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Rm += 8;
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} else {
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READ(FRn, Rm);
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MREAD(FRn, Rm);
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Rm += 4;
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}
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@ -207,11 +207,11 @@ fmov_reg_idx(struct sh_fpu_soft_struct *fregs, struct pt_regs *regs, int m,
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{
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if (FPSCR_SZ) {
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FMOV_EXT(m);
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WRITE(FRm, Rn + R0 + 4);
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MWRITE(FRm, Rn + R0 + 4);
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m++;
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WRITE(FRm, Rn + R0);
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MWRITE(FRm, Rn + R0);
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} else {
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WRITE(FRm, Rn + R0);
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MWRITE(FRm, Rn + R0);
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}
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return 0;
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@ -223,11 +223,11 @@ fmov_reg_mem(struct sh_fpu_soft_struct *fregs, struct pt_regs *regs, int m,
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{
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if (FPSCR_SZ) {
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FMOV_EXT(m);
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WRITE(FRm, Rn + 4);
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MWRITE(FRm, Rn + 4);
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m++;
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WRITE(FRm, Rn);
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MWRITE(FRm, Rn);
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} else {
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WRITE(FRm, Rn);
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MWRITE(FRm, Rn);
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}
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return 0;
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@ -240,12 +240,12 @@ fmov_reg_dec(struct sh_fpu_soft_struct *fregs, struct pt_regs *regs, int m,
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if (FPSCR_SZ) {
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FMOV_EXT(m);
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Rn -= 8;
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WRITE(FRm, Rn + 4);
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MWRITE(FRm, Rn + 4);
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m++;
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WRITE(FRm, Rn);
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MWRITE(FRm, Rn);
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} else {
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Rn -= 4;
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WRITE(FRm, Rn);
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MWRITE(FRm, Rn);
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}
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return 0;
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@ -445,11 +445,11 @@ id_sys(struct sh_fpu_soft_struct *fregs, struct pt_regs *regs, u16 code)
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case 0x4052:
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case 0x4062:
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Rn -= 4;
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WRITE(*reg, Rn);
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MWRITE(*reg, Rn);
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break;
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case 0x4056:
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case 0x4066:
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READ(*reg, Rn);
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MREAD(*reg, Rn);
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Rn += 4;
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break;
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default:
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