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dt-bindings: add asynchronous bridge clock for exynos

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The patch adds bindings for clocks required by async-bridges
present in the particular power domain.

Signed-off-by: Andrzej Hajda <a.hajda@samsung.com>
Reviewed-by: Javier Martinez Canillas <javier.martinez@collabora.co.uk>
Tested-by: Javier Martinez Canillas <javier.martinez@collabora.co.uk>
Signed-off-by: Kukjin Kim <kgene@kernel.org>
This commit is contained in:
Andrzej Hajda 2015-03-18 02:14:07 +09:00 committed by Kukjin Kim
parent 46a0b9ff21
commit 472c95a6e3
1 changed files with 3 additions and 0 deletions
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Documentation/devicetree/bindings/arm/exynos/power_domain.txt
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@ -22,6 +22,9 @@ Optional Properties:
- pclkN, clkN: Pairs of parent of input clock and input clock to the
devices in this power domain. Maximum of 4 pairs (N = 0 to 3)
are supported currently.
- asbN: Clocks required by asynchronous bridges (ASB) present in
the power domain. These clock should be enabled during power
domain on/off operations.
Node of a device using power domains must have a power-domains property
defined with a phandle to respective power domain.