drm/amdgpu: remove ctx->lock
KMD reports a warning on holding a lock from drm_syncobj_find_fence, when running amdgpu_test case “syncobj timeline test”. ctx->lock was designed to prevent concurrent "amdgpu_ctx_wait_prev_fence" calls and avoid dead reservation lock from GPU reset. since no reservation lock is held in latest GPU reset any more, ctx->lock can be simply removed and concurrent "amdgpu_ctx_wait_prev_fence" call also can be prevented by PD root bo reservation lock. call stacks: ================= //hold lock amdgpu_cs_ioctl->amdgpu_cs_parser_init->mutex_lock(&parser->ctx->lock); … //report warning amdgpu_cs_dependencies->amdgpu_cs_process_syncobj_timeline_in_dep \ ->amdgpu_syncobj_lookup_and_add_to_sync -> drm_syncobj_find_fence \ -> lockdep_assert_none_held_once … amdgpu_cs_ioctl->amdgpu_cs_parser_fini->mutex_unlock(&parser->ctx->lock); Signed-off-by: Ken Xue <Ken.Xue@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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@ -127,8 +127,6 @@ static int amdgpu_cs_parser_init(struct amdgpu_cs_parser *p, union drm_amdgpu_cs
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goto free_chunk;
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}
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mutex_lock(&p->ctx->lock);
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/* skip guilty context job */
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if (atomic_read(&p->ctx->guilty) == 1) {
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ret = -ECANCELED;
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@ -585,6 +583,16 @@ static int amdgpu_cs_parser_bos(struct amdgpu_cs_parser *p,
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}
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}
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/* Move fence waiting after getting reservation lock of
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* PD root. Then there is no need on a ctx mutex lock.
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*/
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r = amdgpu_ctx_wait_prev_fence(p->ctx, p->entity);
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if (unlikely(r != 0)) {
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if (r != -ERESTARTSYS)
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DRM_ERROR("amdgpu_ctx_wait_prev_fence failed.\n");
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goto error_validate;
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}
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amdgpu_cs_get_threshold_for_moves(p->adev, &p->bytes_moved_threshold,
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&p->bytes_moved_vis_threshold);
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p->bytes_moved = 0;
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@ -700,7 +708,6 @@ static void amdgpu_cs_parser_fini(struct amdgpu_cs_parser *parser, int error,
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dma_fence_put(parser->fence);
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if (parser->ctx) {
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mutex_unlock(&parser->ctx->lock);
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amdgpu_ctx_put(parser->ctx);
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}
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if (parser->bo_list)
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@ -944,7 +951,7 @@ static int amdgpu_cs_ib_fill(struct amdgpu_device *adev,
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if (parser->job->uf_addr && ring->funcs->no_user_fence)
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return -EINVAL;
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return amdgpu_ctx_wait_prev_fence(parser->ctx, parser->entity);
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return 0;
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}
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static int amdgpu_cs_process_fence_dep(struct amdgpu_cs_parser *p,
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@ -1363,7 +1370,6 @@ int amdgpu_cs_ioctl(struct drm_device *dev, void *data, struct drm_file *filp)
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goto out;
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r = amdgpu_cs_submit(&parser, cs);
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out:
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amdgpu_cs_parser_fini(&parser, r, reserved_buffers);
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@ -230,7 +230,6 @@ static int amdgpu_ctx_init(struct amdgpu_device *adev,
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kref_init(&ctx->refcount);
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spin_lock_init(&ctx->ring_lock);
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mutex_init(&ctx->lock);
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ctx->reset_counter = atomic_read(&adev->gpu_reset_counter);
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ctx->reset_counter_query = ctx->reset_counter;
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@ -352,7 +351,6 @@ static void amdgpu_ctx_fini(struct kref *ref)
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}
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}
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amdgpu_ctx_set_stable_pstate(ctx, AMDGPU_CTX_STABLE_PSTATE_NONE);
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mutex_destroy(&ctx->lock);
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kfree(ctx);
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}
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@ -49,7 +49,6 @@ struct amdgpu_ctx {
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bool preamble_presented;
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int32_t init_priority;
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int32_t override_priority;
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struct mutex lock;
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atomic_t guilty;
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unsigned long ras_counter_ce;
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unsigned long ras_counter_ue;
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