drm/amd/display: fix re-enabling stutter for raven
We were overwriting the whole register which was re-enabling stutter for raven. Now we are reading the register then setting the values only for pstate. Signed-off-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Harry Wentland <Harry.Wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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@ -446,6 +446,8 @@ struct dce_hwseq_registers {
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HWS_SF(, DCHUBBUB_ARB_WATERMARK_CHANGE_CNTL, DCHUBBUB_ARB_WATERMARK_CHANGE_DONE_INTERRUPT_DISABLE, mask_sh), \
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HWS_SF(, DCHUBBUB_ARB_DRAM_STATE_CNTL, DCHUBBUB_ARB_ALLOW_SELF_REFRESH_FORCE_VALUE, mask_sh), \
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HWS_SF(, DCHUBBUB_ARB_DRAM_STATE_CNTL, DCHUBBUB_ARB_ALLOW_SELF_REFRESH_FORCE_ENABLE, mask_sh), \
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HWS_SF(, DCHUBBUB_ARB_DRAM_STATE_CNTL, DCHUBBUB_ARB_ALLOW_PSTATE_CHANGE_FORCE_VALUE, mask_sh), \
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HWS_SF(, DCHUBBUB_ARB_DRAM_STATE_CNTL, DCHUBBUB_ARB_ALLOW_PSTATE_CHANGE_FORCE_ENABLE, mask_sh), \
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HWS_SF(, DCHUBBUB_ARB_SAT_LEVEL, DCHUBBUB_ARB_SAT_LEVEL, mask_sh), \
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HWS_SF(, DCHUBBUB_ARB_DF_REQ_OUTSTAND, DCHUBBUB_ARB_MIN_REQ_OUTSTAND, mask_sh), \
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HWS_SF(, DCFCLK_CNTL, DCFCLK_GATE_DIS, mask_sh)
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@ -554,6 +556,8 @@ struct dce_hwseq_registers {
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type DCHUBBUB_ARB_WATERMARK_CHANGE_DONE_INTERRUPT_DISABLE;\
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type DCHUBBUB_ARB_ALLOW_SELF_REFRESH_FORCE_VALUE;\
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type DCHUBBUB_ARB_ALLOW_SELF_REFRESH_FORCE_ENABLE;\
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type DCHUBBUB_ARB_ALLOW_PSTATE_CHANGE_FORCE_VALUE;\
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type DCHUBBUB_ARB_ALLOW_PSTATE_CHANGE_FORCE_ENABLE;\
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type DCHUBBUB_ARB_SAT_LEVEL;\
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type DCHUBBUB_ARB_MIN_REQ_OUTSTAND;\
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type OPP_PIPE_CLOCK_EN;\
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@ -253,7 +253,6 @@ static void verify_allow_pstate_change_high(
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unsigned int debug_index = 0x7;
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unsigned int debug_data;
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unsigned int force_allow_pstate = 0x30;
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unsigned int i;
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if (forced_pstate_allow) {
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@ -261,7 +260,9 @@ static void verify_allow_pstate_change_high(
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* we verify_allow_pstate_change_high. so disable force
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* here so we can check status
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*/
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REG_WRITE(DCHUBBUB_ARB_DRAM_STATE_CNTL, 0);
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REG_UPDATE_2(DCHUBBUB_ARB_DRAM_STATE_CNTL,
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DCHUBBUB_ARB_ALLOW_PSTATE_CHANGE_FORCE_VALUE, 0,
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DCHUBBUB_ARB_ALLOW_PSTATE_CHANGE_FORCE_ENABLE, 0);
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forced_pstate_allow = false;
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}
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@ -304,7 +305,9 @@ static void verify_allow_pstate_change_high(
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/* force pstate allow to prevent system hang
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* and break to debugger to investigate
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*/
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REG_WRITE(DCHUBBUB_ARB_DRAM_STATE_CNTL, force_allow_pstate);
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REG_UPDATE_2(DCHUBBUB_ARB_DRAM_STATE_CNTL,
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DCHUBBUB_ARB_ALLOW_PSTATE_CHANGE_FORCE_VALUE, 1,
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DCHUBBUB_ARB_ALLOW_PSTATE_CHANGE_FORCE_ENABLE, 1);
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forced_pstate_allow = true;
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if (should_log_hw_state) {
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