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ARM: dts: Move Arria10 SDRAM as child of ECC Manager

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Changes to support ECC Manager as SDRAM IRQ parent by
1) updating IRQ property values to correct child IRQs
2) moving node under ECC Manager.

Signed-off-by: Thor Thayer <tthayer@opensource.altera.com>
Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>
This commit is contained in:
Thor Thayer 2016-05-25 16:29:43 +00:00 committed by Dinh Nguyen
parent a034a8d9e5
commit 4586e4ea7e
1 changed files with 7 additions and 6 deletions
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13
arch/arm/boot/dts/socfpga_arria10.dtsi
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@ -572,12 +572,6 @@
reg = <0xffcfb100 0x80>;
};
sdramedac {
compatible = "altr,sdram-edac-a10";
altr,sdr-syscon = <&sdr>;
interrupts = <0 2 4>, <0 0 4>;
};
L2: l2-cache@fffff000 {
compatible = "arm,pl310-cache";
reg = <0xfffff000 0x1000>;
@ -614,6 +608,13 @@
#interrupt-cells = <2>;
ranges;
sdramedac {
compatible = "altr,sdram-edac-a10";
altr,sdr-syscon = <&sdr>;
interrupts = <17 IRQ_TYPE_LEVEL_HIGH>,
<49 IRQ_TYPE_LEVEL_HIGH>;
};
l2-ecc@ffd06010 {
compatible = "altr,socfpga-a10-l2-ecc";
reg = <0xffd06010 0x4>;