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USB: DWC3: Put 100 ms delay for phy to be stable

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Before taking core out of reset phy must be stable. So wait for 100ms
after clear phy reset.

Signed-off-by: Pratyush Anand <pratyush.anand@st.com>
Signed-off-by: Felipe Balbi <balbi@ti.com>
This commit is contained in:
Pratyush Anand 2012-06-21 17:44:28 +05:30 committed by Felipe Balbi
parent 45c396ce6b
commit 45627ac6a4
1 changed files with 2 additions and 0 deletions
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2
drivers/usb/dwc3/core.c
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@ -148,6 +148,8 @@ static void dwc3_core_soft_reset(struct dwc3 *dwc)
reg &= ~DWC3_GUSB2PHYCFG_PHYSOFTRST; reg &= ~DWC3_GUSB2PHYCFG_PHYSOFTRST;
dwc3_writel(dwc->regs, DWC3_GUSB2PHYCFG(0), reg); dwc3_writel(dwc->regs, DWC3_GUSB2PHYCFG(0), reg);
mdelay(100);
/* After PHYs are stable we can take Core out of reset state */ /* After PHYs are stable we can take Core out of reset state */
reg = dwc3_readl(dwc->regs, DWC3_GCTL); reg = dwc3_readl(dwc->regs, DWC3_GCTL);
reg &= ~DWC3_GCTL_CORESOFTRESET; reg &= ~DWC3_GCTL_CORESOFTRESET;