drm/amdgpu: avoid to use SOC15_REG_OFFSET in static array for navi10
Move to the header file. Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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@ -274,15 +274,6 @@ static bool soc15_read_bios_from_rom(struct amdgpu_device *adev,
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return true;
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}
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struct soc15_allowed_register_entry {
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uint32_t hwip;
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uint32_t inst;
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uint32_t seg;
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uint32_t reg_offset;
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bool grbm_indexed;
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};
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static struct soc15_allowed_register_entry soc15_allowed_read_registers[] = {
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{ SOC15_REG_ENTRY(GC, 0, mmGRBM_STATUS)},
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{ SOC15_REG_ENTRY(GC, 0, mmGRBM_STATUS2)},
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@ -52,6 +52,14 @@ struct soc15_reg_entry {
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uint32_t instance;
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};
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struct soc15_allowed_register_entry {
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uint32_t hwip;
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uint32_t inst;
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uint32_t seg;
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uint32_t reg_offset;
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bool grbm_indexed;
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};
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#define SOC15_REG_ENTRY(ip, inst, reg) ip##_HWIP, inst, reg##_BASE_IDX, reg
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#define SOC15_REG_ENTRY_OFFSET(entry) (adev->reg_offset[entry.hwip][entry.inst][entry.seg] + entry.reg_offset)
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