forked from Minki/linux
coresight: catu: Plug in CATU as a backend for ETR buffer
Now that we can use a CATU with a scatter gather table, add support for the TMC ETR to make use of the connected CATU in translate mode. This is done by adding CATU as new buffer mode. Cc: Mathieu Poirier <mathieu.poirier@linaro.org> Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com> Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
This commit is contained in:
Suzuki K Poulose
Greg Kroah-Hartman
parent
8ed536b1e2
commit
434d611cdd
@ -28,6 +28,11 @@
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#define catu_dbg(x, ...) do {} while (0)
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#endif
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struct catu_etr_buf {
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struct tmc_sg_table *catu_table;
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dma_addr_t sladdr;
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};
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/*
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* CATU uses a page size of 4KB for page tables as well as data pages.
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* Each 64bit entry in the table has the following format.
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@ -93,6 +98,9 @@ typedef u64 cate_t;
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(((cate_t)(addr) & CATU_ADDR_MASK) | CATU_ENTRY_VALID)
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#define CATU_ENTRY_ADDR(entry) ((cate_t)(entry) & ~((cate_t)CATU_ENTRY_VALID))
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/* CATU expects the INADDR to be aligned to 1M. */
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#define CATU_DEFAULT_INADDR (1ULL << 20)
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/*
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* catu_get_table : Retrieve the table pointers for the given @offset
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* within the buffer. The buffer is wrapped around to a valid offset.
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@ -246,7 +254,7 @@ catu_populate_table(struct tmc_sg_table *catu_table)
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tmc_sg_table_sync_table(catu_table);
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}
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static struct tmc_sg_table __maybe_unused *
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static struct tmc_sg_table *
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catu_init_sg_table(struct device *catu_dev, int node,
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ssize_t size, void **pages)
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{
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@ -271,6 +279,91 @@ catu_init_sg_table(struct device *catu_dev, int node,
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return catu_table;
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}
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static void catu_free_etr_buf(struct etr_buf *etr_buf)
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{
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struct catu_etr_buf *catu_buf;
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if (!etr_buf || etr_buf->mode != ETR_MODE_CATU || !etr_buf->private)
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return;
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catu_buf = etr_buf->private;
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tmc_free_sg_table(catu_buf->catu_table);
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kfree(catu_buf);
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}
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static ssize_t catu_get_data_etr_buf(struct etr_buf *etr_buf, u64 offset,
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size_t len, char **bufpp)
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{
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struct catu_etr_buf *catu_buf = etr_buf->private;
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return tmc_sg_table_get_data(catu_buf->catu_table, offset, len, bufpp);
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}
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static void catu_sync_etr_buf(struct etr_buf *etr_buf, u64 rrp, u64 rwp)
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{
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struct catu_etr_buf *catu_buf = etr_buf->private;
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struct tmc_sg_table *catu_table = catu_buf->catu_table;
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u64 r_offset, w_offset;
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/*
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* ETR started off at etr_buf->hwaddr. Convert the RRP/RWP to
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* offsets within the trace buffer.
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*/
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r_offset = rrp - etr_buf->hwaddr;
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w_offset = rwp - etr_buf->hwaddr;
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if (!etr_buf->full) {
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etr_buf->len = w_offset - r_offset;
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if (w_offset < r_offset)
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etr_buf->len += etr_buf->size;
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} else {
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etr_buf->len = etr_buf->size;
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}
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etr_buf->offset = r_offset;
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tmc_sg_table_sync_data_range(catu_table, r_offset, etr_buf->len);
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}
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static int catu_alloc_etr_buf(struct tmc_drvdata *tmc_drvdata,
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struct etr_buf *etr_buf, int node, void **pages)
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{
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struct coresight_device *csdev;
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struct device *catu_dev;
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struct tmc_sg_table *catu_table;
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struct catu_etr_buf *catu_buf;
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csdev = tmc_etr_get_catu_device(tmc_drvdata);
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if (!csdev)
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return -ENODEV;
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catu_dev = csdev->dev.parent;
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catu_buf = kzalloc(sizeof(*catu_buf), GFP_KERNEL);
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if (!catu_buf)
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return -ENOMEM;
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catu_table = catu_init_sg_table(catu_dev, node, etr_buf->size, pages);
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if (IS_ERR(catu_table)) {
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kfree(catu_buf);
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return PTR_ERR(catu_table);
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}
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etr_buf->mode = ETR_MODE_CATU;
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etr_buf->private = catu_buf;
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etr_buf->hwaddr = CATU_DEFAULT_INADDR;
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catu_buf->catu_table = catu_table;
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/* Get the table base address */
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catu_buf->sladdr = catu_table->table_daddr;
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return 0;
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}
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const struct etr_buf_operations etr_catu_buf_ops = {
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.alloc = catu_alloc_etr_buf,
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.free = catu_free_etr_buf,
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.sync = catu_sync_etr_buf,
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.get_data = catu_get_data_etr_buf,
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};
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coresight_simple_reg32(struct catu_drvdata, devid, CORESIGHT_DEVID);
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coresight_simple_reg32(struct catu_drvdata, control, CATU_CONTROL);
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coresight_simple_reg32(struct catu_drvdata, status, CATU_STATUS);
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@ -311,9 +404,10 @@ static inline int catu_wait_for_ready(struct catu_drvdata *drvdata)
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CATU_STATUS, CATU_STATUS_READY, 1);
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}
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static int catu_enable_hw(struct catu_drvdata *drvdata, void *__unused)
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static int catu_enable_hw(struct catu_drvdata *drvdata, void *data)
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{
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u32 control;
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u32 control, mode;
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struct etr_buf *etr_buf = data;
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if (catu_wait_for_ready(drvdata))
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dev_warn(drvdata->dev, "Timeout while waiting for READY\n");
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@ -325,9 +419,27 @@ static int catu_enable_hw(struct catu_drvdata *drvdata, void *__unused)
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}
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control |= BIT(CATU_CONTROL_ENABLE);
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catu_write_mode(drvdata, CATU_MODE_PASS_THROUGH);
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if (etr_buf && etr_buf->mode == ETR_MODE_CATU) {
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struct catu_etr_buf *catu_buf = etr_buf->private;
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mode = CATU_MODE_TRANSLATE;
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catu_write_axictrl(drvdata, CATU_OS_AXICTRL);
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catu_write_sladdr(drvdata, catu_buf->sladdr);
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catu_write_inaddr(drvdata, CATU_DEFAULT_INADDR);
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} else {
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mode = CATU_MODE_PASS_THROUGH;
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catu_write_sladdr(drvdata, 0);
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catu_write_inaddr(drvdata, 0);
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}
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catu_write_irqen(drvdata, 0);
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catu_write_mode(drvdata, mode);
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catu_write_control(drvdata, control);
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dev_dbg(drvdata->dev, "Enabled in Pass through mode\n");
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dev_dbg(drvdata->dev, "Enabled in %s mode\n",
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(mode == CATU_MODE_PASS_THROUGH) ?
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"Pass through" :
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"Translate");
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return 0;
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}
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@ -27,6 +27,32 @@
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#define CATU_MODE_PASS_THROUGH 0U
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#define CATU_MODE_TRANSLATE 1U
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#define CATU_AXICTRL_ARCACHE_SHIFT 4
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#define CATU_AXICTRL_ARCACHE_MASK 0xf
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#define CATU_AXICTRL_ARPROT_MASK 0x3
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#define CATU_AXICTRL_ARCACHE(arcache) \
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(((arcache) & CATU_AXICTRL_ARCACHE_MASK) << CATU_AXICTRL_ARCACHE_SHIFT)
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#define CATU_AXICTRL_VAL(arcache, arprot) \
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(CATU_AXICTRL_ARCACHE(arcache) | ((arprot) & CATU_AXICTRL_ARPROT_MASK))
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#define AXI3_AxCACHE_WB_READ_ALLOC 0x7
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/*
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* AXI - ARPROT bits:
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* See AMBA AXI & ACE Protocol specification (ARM IHI 0022E)
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* sectionA4.7 Access Permissions.
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*
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* Bit 0: 0 - Unprivileged access, 1 - Privileged access
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* Bit 1: 0 - Secure access, 1 - Non-secure access.
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* Bit 2: 0 - Data access, 1 - instruction access.
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*
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* CATU AXICTRL:ARPROT[2] is res0 as we always access data.
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*/
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#define CATU_OS_ARPROT 0x2
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#define CATU_OS_AXICTRL \
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CATU_AXICTRL_VAL(AXI3_AxCACHE_WB_READ_ALLOC, CATU_OS_ARPROT)
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#define CATU_STATUS_READY 8
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#define CATU_STATUS_ADRERR 0
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#define CATU_STATUS_AXIERR 4
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@ -67,6 +93,8 @@ catu_write_##name(struct catu_drvdata *drvdata, u64 val) \
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CATU_REG32(control, CATU_CONTROL);
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CATU_REG32(mode, CATU_MODE);
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CATU_REG32(irqen, CATU_IRQEN);
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CATU_REG32(axictrl, CATU_AXICTRL);
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CATU_REG_PAIR(sladdr, CATU_SLADDRLO, CATU_SLADDRHI)
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CATU_REG_PAIR(inaddr, CATU_INADDRLO, CATU_INADDRHI)
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@ -81,4 +109,11 @@ static inline bool coresight_is_catu_device(struct coresight_device *csdev)
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return true;
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}
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#ifdef CONFIG_CORESIGHT_CATU
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extern const struct etr_buf_operations etr_catu_buf_ops;
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#else
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/* Dummy declaration for the CATU ops */
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static const struct etr_buf_operations etr_catu_buf_ops;
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#endif
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#endif
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@ -710,7 +710,7 @@ static const struct etr_buf_operations etr_sg_buf_ops = {
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* Returns : coresight_device ptr for the CATU device if a CATU is found.
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* : NULL otherwise.
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*/
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static inline struct coresight_device *
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struct coresight_device *
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tmc_etr_get_catu_device(struct tmc_drvdata *drvdata)
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{
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int i;
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@ -733,7 +733,7 @@ static inline void tmc_etr_enable_catu(struct tmc_drvdata *drvdata)
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struct coresight_device *catu = tmc_etr_get_catu_device(drvdata);
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if (catu && helper_ops(catu)->enable)
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helper_ops(catu)->enable(catu, NULL);
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helper_ops(catu)->enable(catu, drvdata->etr_buf);
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}
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static inline void tmc_etr_disable_catu(struct tmc_drvdata *drvdata)
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@ -741,12 +741,13 @@ static inline void tmc_etr_disable_catu(struct tmc_drvdata *drvdata)
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struct coresight_device *catu = tmc_etr_get_catu_device(drvdata);
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if (catu && helper_ops(catu)->disable)
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helper_ops(catu)->disable(catu, NULL);
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helper_ops(catu)->disable(catu, drvdata->etr_buf);
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}
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static const struct etr_buf_operations *etr_buf_ops[] = {
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[ETR_MODE_FLAT] = &etr_flat_buf_ops,
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[ETR_MODE_ETR_SG] = &etr_sg_buf_ops,
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[ETR_MODE_CATU] = &etr_catu_buf_ops,
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};
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static inline int tmc_etr_mode_alloc_buf(int mode,
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@ -754,12 +755,15 @@ static inline int tmc_etr_mode_alloc_buf(int mode,
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struct etr_buf *etr_buf, int node,
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void **pages)
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{
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int rc;
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int rc = -EINVAL;
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switch (mode) {
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case ETR_MODE_FLAT:
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case ETR_MODE_ETR_SG:
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rc = etr_buf_ops[mode]->alloc(drvdata, etr_buf, node, pages);
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case ETR_MODE_CATU:
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if (etr_buf_ops[mode]->alloc)
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rc = etr_buf_ops[mode]->alloc(drvdata, etr_buf,
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node, pages);
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if (!rc)
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etr_buf->ops = etr_buf_ops[mode];
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return rc;
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@ -782,10 +786,14 @@ static struct etr_buf *tmc_alloc_etr_buf(struct tmc_drvdata *drvdata,
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{
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int rc = -ENOMEM;
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bool has_etr_sg, has_iommu;
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bool has_sg, has_catu;
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struct etr_buf *etr_buf;
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has_etr_sg = tmc_etr_has_cap(drvdata, TMC_ETR_SG);
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has_iommu = iommu_get_domain_for_dev(drvdata->dev);
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has_catu = !!tmc_etr_get_catu_device(drvdata);
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has_sg = has_catu || has_etr_sg;
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etr_buf = kzalloc(sizeof(*etr_buf), GFP_KERNEL);
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if (!etr_buf)
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@ -806,17 +814,22 @@ static struct etr_buf *tmc_alloc_etr_buf(struct tmc_drvdata *drvdata,
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*
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*/
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if (!pages &&
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(!has_etr_sg || has_iommu || size < SZ_1M))
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(!has_sg || has_iommu || size < SZ_1M))
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rc = tmc_etr_mode_alloc_buf(ETR_MODE_FLAT, drvdata,
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etr_buf, node, pages);
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if (rc && has_etr_sg)
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rc = tmc_etr_mode_alloc_buf(ETR_MODE_ETR_SG, drvdata,
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etr_buf, node, pages);
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if (rc && has_catu)
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rc = tmc_etr_mode_alloc_buf(ETR_MODE_CATU, drvdata,
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etr_buf, node, pages);
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if (rc) {
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kfree(etr_buf);
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return ERR_PTR(rc);
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}
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dev_dbg(drvdata->dev, "allocated buffer of size %ldKB in mode %d\n",
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(unsigned long)size >> 10, etr_buf->mode);
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return etr_buf;
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}
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@ -126,6 +126,7 @@ enum tmc_mem_intf_width {
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enum etr_mode {
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ETR_MODE_FLAT, /* Uses contiguous flat buffer */
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ETR_MODE_ETR_SG, /* Uses in-built TMC ETR SG mechanism */
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ETR_MODE_CATU, /* Use SG mechanism in CATU */
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};
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struct etr_buf_operations;
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@ -303,4 +304,6 @@ tmc_sg_table_buf_size(struct tmc_sg_table *sg_table)
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return sg_table->data_pages.nr_pages << PAGE_SHIFT;
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}
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struct coresight_device *tmc_etr_get_catu_device(struct tmc_drvdata *drvdata);
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#endif
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