forked from Minki/linux
Merge branch '40GbE' of git://git.kernel.org/pub/scm/linux/kernel/git/tnguy/net-queue
Tony Nguyen says: ==================== Intel Wired LAN Driver Updates 2021-02-19 This series contains updates to i40e driver only. Slawomir resolves an issue with the IPv6 extension headers being processed incorrectly. Keita Suzuki fixes a memory leak on probe failure. Mateusz initializes AQ command structures to zero to comply with spec, fixes FW flow control settings being overwritten and resolves an issue with adding VLAN filters after enabling FW LLDP. He also adds an additional check when adding TC filter as the current check doesn't properly distinguish between IPv4 and IPv6. Sylwester removes setting disabled bit when syncing filters as this prevents VFs from completing setup. Norbert cleans up sparse warnings. v2: - Fix fixes tag on patch 7 * '40GbE' of git://git.kernel.org/pub/scm/linux/kernel/git/tnguy/net-queue: i40e: Fix endianness conversions i40e: Fix add TC filter for IPv6 i40e: Fix VFs not created i40e: Fix addition of RX filters after enabling FW LLDP agent i40e: Fix overwriting flow control settings during driver loading i40e: Add zero-initialization of AQ command structures i40e: Fix memory leak in i40e_probe i40e: Fix flow for IPv6 next header (extension header) ==================== Link: https://lore.kernel.org/r/20210219213606.2567536-1-anthony.l.nguyen@intel.com Signed-off-by: Jakub Kicinski <kuba@kernel.org>
This commit is contained in:
commit
42870a1a87
@ -5083,7 +5083,7 @@ static int i40e_set_priv_flags(struct net_device *dev, u32 flags)
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enum i40e_admin_queue_err adq_err;
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struct i40e_vsi *vsi = np->vsi;
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struct i40e_pf *pf = vsi->back;
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bool is_reset_needed;
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u32 reset_needed = 0;
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i40e_status status;
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u32 i, j;
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@ -5128,9 +5128,11 @@ static int i40e_set_priv_flags(struct net_device *dev, u32 flags)
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flags_complete:
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changed_flags = orig_flags ^ new_flags;
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is_reset_needed = !!(changed_flags & (I40E_FLAG_VEB_STATS_ENABLED |
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I40E_FLAG_LEGACY_RX | I40E_FLAG_SOURCE_PRUNING_DISABLED |
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I40E_FLAG_DISABLE_FW_LLDP));
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if (changed_flags & I40E_FLAG_DISABLE_FW_LLDP)
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reset_needed = I40E_PF_RESET_AND_REBUILD_FLAG;
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if (changed_flags & (I40E_FLAG_VEB_STATS_ENABLED |
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I40E_FLAG_LEGACY_RX | I40E_FLAG_SOURCE_PRUNING_DISABLED))
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reset_needed = BIT(__I40E_PF_RESET_REQUESTED);
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/* Before we finalize any flag changes, we need to perform some
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* checks to ensure that the changes are supported and safe.
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@ -5252,7 +5254,7 @@ flags_complete:
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case I40E_AQ_RC_EEXIST:
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dev_warn(&pf->pdev->dev,
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"FW LLDP agent is already running\n");
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is_reset_needed = false;
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reset_needed = 0;
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break;
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case I40E_AQ_RC_EPERM:
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dev_warn(&pf->pdev->dev,
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@ -5281,8 +5283,8 @@ flags_complete:
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/* Issue reset to cause things to take effect, as additional bits
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* are added we will need to create a mask of bits requiring reset
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*/
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if (is_reset_needed)
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i40e_do_reset(pf, BIT(__I40E_PF_RESET_REQUESTED), true);
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if (reset_needed)
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i40e_do_reset(pf, reset_needed, true);
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return 0;
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}
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@ -2616,7 +2616,7 @@ static void i40e_sync_filters_subtask(struct i40e_pf *pf)
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return;
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if (!test_and_clear_bit(__I40E_MACVLAN_SYNC_PENDING, pf->state))
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return;
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if (test_and_set_bit(__I40E_VF_DISABLE, pf->state)) {
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if (test_bit(__I40E_VF_DISABLE, pf->state)) {
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set_bit(__I40E_MACVLAN_SYNC_PENDING, pf->state);
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return;
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}
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@ -2634,7 +2634,6 @@ static void i40e_sync_filters_subtask(struct i40e_pf *pf)
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}
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}
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}
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clear_bit(__I40E_VF_DISABLE, pf->state);
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}
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/**
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@ -5937,7 +5936,7 @@ static int i40e_add_channel(struct i40e_pf *pf, u16 uplink_seid,
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ch->enabled_tc = !i40e_is_channel_macvlan(ch) && enabled_tc;
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ch->seid = ctxt.seid;
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ch->vsi_number = ctxt.vsi_number;
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ch->stat_counter_idx = cpu_to_le16(ctxt.info.stat_counter_idx);
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ch->stat_counter_idx = le16_to_cpu(ctxt.info.stat_counter_idx);
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/* copy just the sections touched not the entire info
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* since not all sections are valid as returned by
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@ -7977,8 +7976,8 @@ static inline void
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i40e_set_cld_element(struct i40e_cloud_filter *filter,
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struct i40e_aqc_cloud_filters_element_data *cld)
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{
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int i, j;
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u32 ipa;
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int i;
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memset(cld, 0, sizeof(*cld));
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ether_addr_copy(cld->outer_mac, filter->dst_mac);
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@ -7989,14 +7988,14 @@ i40e_set_cld_element(struct i40e_cloud_filter *filter,
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if (filter->n_proto == ETH_P_IPV6) {
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#define IPV6_MAX_INDEX (ARRAY_SIZE(filter->dst_ipv6) - 1)
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for (i = 0, j = 0; i < ARRAY_SIZE(filter->dst_ipv6);
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i++, j += 2) {
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for (i = 0; i < ARRAY_SIZE(filter->dst_ipv6); i++) {
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ipa = be32_to_cpu(filter->dst_ipv6[IPV6_MAX_INDEX - i]);
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ipa = cpu_to_le32(ipa);
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memcpy(&cld->ipaddr.raw_v6.data[j], &ipa, sizeof(ipa));
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*(__le32 *)&cld->ipaddr.raw_v6.data[i * 2] = cpu_to_le32(ipa);
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}
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} else {
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ipa = be32_to_cpu(filter->dst_ipv4);
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memcpy(&cld->ipaddr.v4.data, &ipa, sizeof(ipa));
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}
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@ -8044,6 +8043,8 @@ int i40e_add_del_cloud_filter(struct i40e_vsi *vsi,
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if (filter->flags >= ARRAY_SIZE(flag_table))
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return I40E_ERR_CONFIG;
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memset(&cld_filter, 0, sizeof(cld_filter));
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/* copy element needed to add cloud filter from filter */
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i40e_set_cld_element(filter, &cld_filter);
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@ -8107,10 +8108,13 @@ int i40e_add_del_cloud_filter_big_buf(struct i40e_vsi *vsi,
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return -EOPNOTSUPP;
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/* adding filter using src_port/src_ip is not supported at this stage */
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if (filter->src_port || filter->src_ipv4 ||
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if (filter->src_port ||
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(filter->src_ipv4 && filter->n_proto != ETH_P_IPV6) ||
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!ipv6_addr_any(&filter->ip.v6.src_ip6))
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return -EOPNOTSUPP;
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memset(&cld_filter, 0, sizeof(cld_filter));
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/* copy element needed to add cloud filter from filter */
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i40e_set_cld_element(filter, &cld_filter.element);
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@ -8134,7 +8138,7 @@ int i40e_add_del_cloud_filter_big_buf(struct i40e_vsi *vsi,
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cpu_to_le16(I40E_AQC_ADD_CLOUD_FILTER_MAC_VLAN_PORT);
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}
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} else if (filter->dst_ipv4 ||
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} else if ((filter->dst_ipv4 && filter->n_proto != ETH_P_IPV6) ||
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!ipv6_addr_any(&filter->ip.v6.dst_ip6)) {
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cld_filter.element.flags =
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cpu_to_le16(I40E_AQC_ADD_CLOUD_FILTER_IP_PORT);
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@ -8928,11 +8932,6 @@ void i40e_do_reset(struct i40e_pf *pf, u32 reset_flags, bool lock_acquired)
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dev_dbg(&pf->pdev->dev, "PFR requested\n");
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i40e_handle_reset_warning(pf, lock_acquired);
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dev_info(&pf->pdev->dev,
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pf->flags & I40E_FLAG_DISABLE_FW_LLDP ?
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"FW LLDP is disabled\n" :
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"FW LLDP is enabled\n");
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} else if (reset_flags & I40E_PF_RESET_AND_REBUILD_FLAG) {
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/* Request a PF Reset
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*
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@ -8940,6 +8939,10 @@ void i40e_do_reset(struct i40e_pf *pf, u32 reset_flags, bool lock_acquired)
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*/
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i40e_prep_for_reset(pf);
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i40e_reset_and_rebuild(pf, true, lock_acquired);
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dev_info(&pf->pdev->dev,
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pf->flags & I40E_FLAG_DISABLE_FW_LLDP ?
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"FW LLDP is disabled\n" :
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"FW LLDP is enabled\n");
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} else if (reset_flags & BIT_ULL(__I40E_REINIT_REQUESTED)) {
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int v;
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@ -10462,7 +10465,6 @@ static void i40e_rebuild(struct i40e_pf *pf, bool reinit, bool lock_acquired)
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int old_recovery_mode_bit = test_bit(__I40E_RECOVERY_MODE, pf->state);
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struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
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struct i40e_hw *hw = &pf->hw;
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u8 set_fc_aq_fail = 0;
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i40e_status ret;
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u32 val;
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int v;
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@ -10605,13 +10607,6 @@ static void i40e_rebuild(struct i40e_pf *pf, bool reinit, bool lock_acquired)
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i40e_stat_str(&pf->hw, ret),
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i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
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/* make sure our flow control settings are restored */
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ret = i40e_set_fc(&pf->hw, &set_fc_aq_fail, true);
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if (ret)
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dev_dbg(&pf->pdev->dev, "setting flow control: ret = %s last_status = %s\n",
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i40e_stat_str(&pf->hw, ret),
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i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
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/* Rebuild the VSIs and VEBs that existed before reset.
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* They are still in our local switch element arrays, so only
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* need to rebuild the switch model in the HW.
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@ -12191,6 +12186,8 @@ i40e_status i40e_set_partition_bw_setting(struct i40e_pf *pf)
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struct i40e_aqc_configure_partition_bw_data bw_data;
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i40e_status status;
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memset(&bw_data, 0, sizeof(bw_data));
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/* Set the valid bit for this PF */
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bw_data.pf_valid_bits = cpu_to_le16(BIT(pf->hw.pf_id));
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bw_data.max_bw[pf->hw.pf_id] = pf->max_bw & I40E_ALT_BW_VALUE_MASK;
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@ -15198,7 +15195,6 @@ static int i40e_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
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int err;
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u32 val;
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u32 i;
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u8 set_fc_aq_fail;
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err = pci_enable_device_mem(pdev);
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if (err)
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@ -15537,24 +15533,6 @@ static int i40e_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
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}
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INIT_LIST_HEAD(&pf->vsi[pf->lan_vsi]->ch_list);
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/* Make sure flow control is set according to current settings */
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err = i40e_set_fc(hw, &set_fc_aq_fail, true);
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if (set_fc_aq_fail & I40E_SET_FC_AQ_FAIL_GET)
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dev_dbg(&pf->pdev->dev,
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"Set fc with err %s aq_err %s on get_phy_cap\n",
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i40e_stat_str(hw, err),
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i40e_aq_str(hw, hw->aq.asq_last_status));
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if (set_fc_aq_fail & I40E_SET_FC_AQ_FAIL_SET)
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dev_dbg(&pf->pdev->dev,
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"Set fc with err %s aq_err %s on set_phy_config\n",
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i40e_stat_str(hw, err),
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i40e_aq_str(hw, hw->aq.asq_last_status));
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if (set_fc_aq_fail & I40E_SET_FC_AQ_FAIL_UPDATE)
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dev_dbg(&pf->pdev->dev,
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"Set fc with err %s aq_err %s on get_link_info\n",
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i40e_stat_str(hw, err),
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i40e_aq_str(hw, hw->aq.asq_last_status));
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/* if FDIR VSI was set up, start it now */
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for (i = 0; i < pf->num_alloc_vsi; i++) {
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if (pf->vsi[i] && pf->vsi[i]->type == I40E_VSI_FDIR) {
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@ -15611,6 +15589,8 @@ static int i40e_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
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if (err) {
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dev_info(&pdev->dev,
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"setup of misc vector failed: %d\n", err);
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i40e_cloud_filter_exit(pf);
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i40e_fdir_teardown(pf);
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goto err_vsis;
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}
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}
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@ -1948,7 +1948,7 @@ void i40e_process_skb_fields(struct i40e_ring *rx_ring,
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skb_record_rx_queue(skb, rx_ring->queue_index);
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if (qword & BIT(I40E_RX_DESC_STATUS_L2TAG1P_SHIFT)) {
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u16 vlan_tag = rx_desc->wb.qword0.lo_dword.l2tag1;
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__le16 vlan_tag = rx_desc->wb.qword0.lo_dword.l2tag1;
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__vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q),
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le16_to_cpu(vlan_tag));
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@ -3223,13 +3223,16 @@ static int i40e_tx_enable_csum(struct sk_buff *skb, u32 *tx_flags,
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l4_proto = ip.v4->protocol;
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} else if (*tx_flags & I40E_TX_FLAGS_IPV6) {
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int ret;
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tunnel |= I40E_TX_CTX_EXT_IP_IPV6;
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exthdr = ip.hdr + sizeof(*ip.v6);
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l4_proto = ip.v6->nexthdr;
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if (l4.hdr != exthdr)
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ipv6_skip_exthdr(skb, exthdr - skb->data,
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&l4_proto, &frag_off);
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ret = ipv6_skip_exthdr(skb, exthdr - skb->data,
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&l4_proto, &frag_off);
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if (ret < 0)
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return -1;
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}
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/* define outer transport */
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@ -453,7 +453,7 @@ static void i40e_set_rs_bit(struct i40e_ring *xdp_ring)
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struct i40e_tx_desc *tx_desc;
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tx_desc = I40E_TX_DESC(xdp_ring, ntu);
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tx_desc->cmd_type_offset_bsz |= (I40E_TX_DESC_CMD_RS << I40E_TXD_QW1_CMD_SHIFT);
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tx_desc->cmd_type_offset_bsz |= cpu_to_le64(I40E_TX_DESC_CMD_RS << I40E_TXD_QW1_CMD_SHIFT);
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}
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/**
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