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clk: ast2600: Fix enabling of clocks

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The struct clk_ops enable callback for the aspeed gates mixes up the set
to clear and write to set registers.

Fixes: d3d04f6c33 ("clk: Add support for AST2600 SoC")
Reviewed-by: Andrew Jeffery <andrew@aj.id.au>
Signed-off-by: Joel Stanley <joel@jms.id.au>
Link: https://lkml.kernel.org/r/20191016131319.31318-1-joel@jms.id.au
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
This commit is contained in:
Joel Stanley 2019-10-16 23:43:19 +10:30 committed by Stephen Boyd
parent 658fd65cf0
commit 427400fc5c
1 changed files with 4 additions and 3 deletions
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7
drivers/clk/clk-ast2600.c
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@ -266,10 +266,11 @@ static int aspeed_g6_clk_enable(struct clk_hw *hw)
/* Enable clock */ /* Enable clock */
if (gate->flags & CLK_GATE_SET_TO_DISABLE) { if (gate->flags & CLK_GATE_SET_TO_DISABLE) {
regmap_write(gate->map, get_clock_reg(gate), clk); /* Clock is clear to enable, so use set to clear register */
} else {
/* Use set to clear register */
regmap_write(gate->map, get_clock_reg(gate) + 0x04, clk); regmap_write(gate->map, get_clock_reg(gate) + 0x04, clk);
} else {
/* Clock is set to enable, so use write to set register */
regmap_write(gate->map, get_clock_reg(gate), clk);
} }
if (gate->reset_idx >= 0) { if (gate->reset_idx >= 0) {