forked from Minki/linux
cirrusfb: fix threshold register mask for Laguna chips
Fix threshold register mask for Laguna chips otherwise some 8bpp modes are garbled after selecting a 24bpp mode. Signed-off-by: Krzysztof Helt <krzysztof.h1@wp.pl> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
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@ -875,7 +875,7 @@ static int cirrusfb_set_par_foo(struct fb_info *info)
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threshold = fb_readw(cinfo->laguna_mmio + 0xea);
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control &= ~0x6800;
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format = 0;
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threshold &= 0xffe0 & 0x3fbf;
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threshold &= 0xffc0 & 0x3fbf;
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}
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if (nom) {
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tmp = den << 1;
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