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drm/i915: Update DDL only for current CRTC

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Instead of looping through all CRTCs, update DDL for current CRTC for which
watermark is being updated.
CHV is confirmed to have precision of 32/64 which is same as VLV.

Reviewed-by: Imre Deak <imre.deak@intel.com>
Signed-off-by: Gajanan Bhat <gajanan.bhat@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
This commit is contained in:
Gajanan Bhat 2014-07-16 18:24:03 +05:30 committed by Daniel Vetter
parent 1abc4dc7e2
commit 41aad816d7
1 changed files with 9 additions and 16 deletions
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25
drivers/gpu/drm/i915/intel_pm.c
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@ -1310,24 +1310,17 @@ static bool vlv_compute_drain_latency(struct drm_device *dev,
* latency value.
*/
static void vlv_update_drain_latency(struct drm_device *dev)
static void vlv_update_drain_latency(struct drm_crtc *crtc)
{
struct drm_device *dev = crtc->dev;
struct drm_i915_private *dev_priv = dev->dev_private;
enum pipe pipe;
enum pipe pipe = to_intel_crtc(crtc)->pipe;
int plane_prec, plane_dl;
int cursor_prec, cursor_dl;
int plane_prec_mult, cursor_prec_mult;
for_each_pipe(pipe) {
int plane_prec, plane_dl;
int cursor_prec, cursor_dl;
int plane_prec_mult, cursor_prec_mult;
if (!vlv_compute_drain_latency(dev, pipe, &plane_prec_mult, &plane_dl,
&cursor_prec_mult, &cursor_dl))
continue;
/*
* FIXME CHV spec still lists 16 and 32 as the precision
* values. Need to figure out if spec is outdated or what.
*/
if (vlv_compute_drain_latency(dev, pipe, &plane_prec_mult, &plane_dl,
&cursor_prec_mult, &cursor_dl)) {
cursor_prec = (cursor_prec_mult == DRAIN_LATENCY_PRECISION_64) ?
DDL_CURSOR_PRECISION_64 : DDL_CURSOR_PRECISION_32;
plane_prec = (plane_prec_mult == DRAIN_LATENCY_PRECISION_64) ?
@ -1352,7 +1345,7 @@ static void valleyview_update_wm(struct drm_crtc *crtc)
unsigned int enabled = 0;
bool cxsr_enabled;
vlv_update_drain_latency(dev);
vlv_update_drain_latency(crtc);
if (g4x_compute_wm0(dev, PIPE_A,
&valleyview_wm_info, latency_ns,