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Merge branches 'clkdev', 'fixes', 'misc' and 'sa1100-base' into for-linus

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This commit is contained in:
Russell King 2016-12-14 11:13:46 +00:00
commit 41884629fe
66 changed files with 606 additions and 1601 deletions
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1
arch/arm/include/asm/Kbuild
View File

@ -8,7 +8,6 @@ generic-y += early_ioremap.h
generic-y += emergency-restart.h
generic-y += errno.h
generic-y += exec.h
generic-y += export.h
generic-y += ioctl.h
generic-y += ipcbuf.h
generic-y += irq_regs.h

27
arch/arm/include/asm/delay.h
View File

@ -9,6 +9,33 @@
#include <asm/memory.h>
#include <asm/param.h> /* HZ */
/*
* Loop (or tick) based delay:
*
* loops = loops_per_jiffy * jiffies_per_sec * delay_us / us_per_sec
*
* where:
*
* jiffies_per_sec = HZ
* us_per_sec = 1000000
*
* Therefore the constant part is HZ / 1000000 which is a small
* fractional number. To make this usable with integer math, we
* scale up this constant by 2^31, perform the actual multiplication,
* and scale the result back down by 2^31 with a simple shift:
*
* loops = (loops_per_jiffy * delay_us * UDELAY_MULT) >> 31
*
* where:
*
* UDELAY_MULT = 2^31 * HZ / 1000000
* = (2^31 / 1000000) * HZ
* = 2147.483648 * HZ
* = 2147 * HZ + 483648 * HZ / 1000000
*
* 31 is the biggest scale shift value that won't overflow 32 bits for
* delay_us * UDELAY_MULT assuming HZ <= 1000 and delay_us <= 2000.
*/
#define MAX_UDELAY_MS 2
#define UDELAY_MULT UL(2147 * HZ + 483648 * HZ / 1000000)
#define UDELAY_SHIFT 31

2
arch/arm/include/asm/unistd.h
View File

@ -19,7 +19,7 @@
* This may need to be greater than __NR_last_syscall+1 in order to
* account for the padding in the syscall table
*/
#define __NR_syscalls (396)
#define __NR_syscalls (400)
#define __ARCH_WANT_STAT64
#define __ARCH_WANT_SYS_GETHOSTNAME

3
arch/arm/include/uapi/asm/unistd.h
View File

@ -420,6 +420,9 @@
#define __NR_copy_file_range (__NR_SYSCALL_BASE+391)
#define __NR_preadv2 (__NR_SYSCALL_BASE+392)
#define __NR_pwritev2 (__NR_SYSCALL_BASE+393)
#define __NR_pkey_mprotect (__NR_SYSCALL_BASE+394)
#define __NR_pkey_alloc (__NR_SYSCALL_BASE+395)
#define __NR_pkey_free (__NR_SYSCALL_BASE+396)
/*
* The following SWIs are ARM private.

2
arch/arm/kernel/Makefile
View File

@ -33,7 +33,7 @@ endif
obj-$(CONFIG_CPU_IDLE) += cpuidle.o
obj-$(CONFIG_ISA_DMA_API) += dma.o
obj-$(CONFIG_FIQ) += fiq.o fiqasm.o
obj-$(CONFIG_MODULES) += module.o
obj-$(CONFIG_MODULES) += armksyms.o module.o
obj-$(CONFIG_ARM_MODULE_PLTS) += module-plts.o
obj-$(CONFIG_ISA_DMA) += dma-isa.o
obj-$(CONFIG_PCI) += bios32.o isa.o

183
arch/arm/kernel/armksyms.c Normal file
View File

@ -0,0 +1,183 @@
/*
* linux/arch/arm/kernel/armksyms.c
*
* Copyright (C) 2000 Russell King
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
#include <linux/export.h>
#include <linux/sched.h>
#include <linux/string.h>
#include <linux/cryptohash.h>
#include <linux/delay.h>
#include <linux/in6.h>
#include <linux/syscalls.h>
#include <linux/uaccess.h>
#include <linux/io.h>
#include <linux/arm-smccc.h>
#include <asm/checksum.h>
#include <asm/ftrace.h>
/*
* libgcc functions - functions that are used internally by the
* compiler... (prototypes are not correct though, but that
* doesn't really matter since they're not versioned).
*/
extern void __ashldi3(void);
extern void __ashrdi3(void);
extern void __divsi3(void);
extern void __lshrdi3(void);
extern void __modsi3(void);
extern void __muldi3(void);
extern void __ucmpdi2(void);
extern void __udivsi3(void);
extern void __umodsi3(void);
extern void __do_div64(void);
extern void __bswapsi2(void);
extern void __bswapdi2(void);
extern void __aeabi_idiv(void);
extern void __aeabi_idivmod(void);
extern void __aeabi_lasr(void);
extern void __aeabi_llsl(void);
extern void __aeabi_llsr(void);
extern void __aeabi_lmul(void);
extern void __aeabi_uidiv(void);
extern void __aeabi_uidivmod(void);
extern void __aeabi_ulcmp(void);
extern void fpundefinstr(void);
void mmioset(void *, unsigned int, size_t);
void mmiocpy(void *, const void *, size_t);
/* platform dependent support */
EXPORT_SYMBOL(arm_delay_ops);
/* networking */
EXPORT_SYMBOL(csum_partial);
EXPORT_SYMBOL(csum_partial_copy_from_user);
EXPORT_SYMBOL(csum_partial_copy_nocheck);
EXPORT_SYMBOL(__csum_ipv6_magic);
/* io */
#ifndef __raw_readsb
EXPORT_SYMBOL(__raw_readsb);
#endif
#ifndef __raw_readsw
EXPORT_SYMBOL(__raw_readsw);
#endif
#ifndef __raw_readsl
EXPORT_SYMBOL(__raw_readsl);
#endif
#ifndef __raw_writesb
EXPORT_SYMBOL(__raw_writesb);
#endif
#ifndef __raw_writesw
EXPORT_SYMBOL(__raw_writesw);
#endif
#ifndef __raw_writesl
EXPORT_SYMBOL(__raw_writesl);
#endif
/* string / mem functions */
EXPORT_SYMBOL(strchr);
EXPORT_SYMBOL(strrchr);
EXPORT_SYMBOL(memset);
EXPORT_SYMBOL(memcpy);
EXPORT_SYMBOL(memmove);
EXPORT_SYMBOL(memchr);
EXPORT_SYMBOL(__memzero);
EXPORT_SYMBOL(mmioset);
EXPORT_SYMBOL(mmiocpy);
#ifdef CONFIG_MMU
EXPORT_SYMBOL(copy_page);
EXPORT_SYMBOL(arm_copy_from_user);
EXPORT_SYMBOL(arm_copy_to_user);
EXPORT_SYMBOL(arm_clear_user);
EXPORT_SYMBOL(__get_user_1);
EXPORT_SYMBOL(__get_user_2);
EXPORT_SYMBOL(__get_user_4);
EXPORT_SYMBOL(__get_user_8);
#ifdef __ARMEB__
EXPORT_SYMBOL(__get_user_64t_1);
EXPORT_SYMBOL(__get_user_64t_2);
EXPORT_SYMBOL(__get_user_64t_4);
EXPORT_SYMBOL(__get_user_32t_8);
#endif
EXPORT_SYMBOL(__put_user_1);
EXPORT_SYMBOL(__put_user_2);
EXPORT_SYMBOL(__put_user_4);
EXPORT_SYMBOL(__put_user_8);
#endif
/* gcc lib functions */
EXPORT_SYMBOL(__ashldi3);
EXPORT_SYMBOL(__ashrdi3);
EXPORT_SYMBOL(__divsi3);
EXPORT_SYMBOL(__lshrdi3);
EXPORT_SYMBOL(__modsi3);
EXPORT_SYMBOL(__muldi3);
EXPORT_SYMBOL(__ucmpdi2);
EXPORT_SYMBOL(__udivsi3);
EXPORT_SYMBOL(__umodsi3);
EXPORT_SYMBOL(__do_div64);
EXPORT_SYMBOL(__bswapsi2);
EXPORT_SYMBOL(__bswapdi2);
#ifdef CONFIG_AEABI
EXPORT_SYMBOL(__aeabi_idiv);
EXPORT_SYMBOL(__aeabi_idivmod);
EXPORT_SYMBOL(__aeabi_lasr);
EXPORT_SYMBOL(__aeabi_llsl);
EXPORT_SYMBOL(__aeabi_llsr);
EXPORT_SYMBOL(__aeabi_lmul);
EXPORT_SYMBOL(__aeabi_uidiv);
EXPORT_SYMBOL(__aeabi_uidivmod);
EXPORT_SYMBOL(__aeabi_ulcmp);
#endif
/* bitops */
EXPORT_SYMBOL(_set_bit);
EXPORT_SYMBOL(_test_and_set_bit);
EXPORT_SYMBOL(_clear_bit);
EXPORT_SYMBOL(_test_and_clear_bit);
EXPORT_SYMBOL(_change_bit);
EXPORT_SYMBOL(_test_and_change_bit);
EXPORT_SYMBOL(_find_first_zero_bit_le);
EXPORT_SYMBOL(_find_next_zero_bit_le);
EXPORT_SYMBOL(_find_first_bit_le);
EXPORT_SYMBOL(_find_next_bit_le);
#ifdef __ARMEB__
EXPORT_SYMBOL(_find_first_zero_bit_be);
EXPORT_SYMBOL(_find_next_zero_bit_be);
EXPORT_SYMBOL(_find_first_bit_be);
EXPORT_SYMBOL(_find_next_bit_be);
#endif
#ifdef CONFIG_FUNCTION_TRACER
#ifdef CONFIG_OLD_MCOUNT
EXPORT_SYMBOL(mcount);
#endif
EXPORT_SYMBOL(__gnu_mcount_nc);
#endif
#ifdef CONFIG_ARM_PATCH_PHYS_VIRT
EXPORT_SYMBOL(__pv_phys_pfn_offset);
EXPORT_SYMBOL(__pv_offset);
#endif
#ifdef CONFIG_HAVE_ARM_SMCCC
EXPORT_SYMBOL(arm_smccc_smc);
EXPORT_SYMBOL(arm_smccc_hvc);
#endif

3
arch/arm/kernel/calls.S
View File

@ -403,6 +403,9 @@
CALL(sys_copy_file_range)
CALL(sys_preadv2)
CALL(sys_pwritev2)
CALL(sys_pkey_mprotect)
/* 395 */ CALL(sys_pkey_alloc)
CALL(sys_pkey_free)
#ifndef syscalls_counted
.equ syscalls_padding, ((NR_syscalls + 3) & ~3) - NR_syscalls
#define syscalls_counted

3
arch/arm/kernel/entry-ftrace.S
View File

@ -7,7 +7,6 @@
#include <asm/assembler.h>
#include <asm/ftrace.h>
#include <asm/unwind.h>
#include <asm/export.h>
#include "entry-header.S"
@ -154,7 +153,6 @@ ENTRY(mcount)
__mcount _old
#endif
ENDPROC(mcount)
EXPORT_SYMBOL(mcount)
#ifdef CONFIG_DYNAMIC_FTRACE
ENTRY(ftrace_caller_old)
@ -207,7 +205,6 @@ UNWIND(.fnstart)
#endif
UNWIND(.fnend)
ENDPROC(__gnu_mcount_nc)
EXPORT_SYMBOL(__gnu_mcount_nc)
#ifdef CONFIG_DYNAMIC_FTRACE
ENTRY(ftrace_caller)

3
arch/arm/kernel/head.S
View File

@ -22,7 +22,6 @@
#include <asm/memory.h>
#include <asm/thread_info.h>
#include <asm/pgtable.h>
#include <asm/export.h>
#if defined(CONFIG_DEBUG_LL) && !defined(CONFIG_DEBUG_SEMIHOSTING)
#include CONFIG_DEBUG_LL_INCLUDE
@ -728,8 +727,6 @@ __pv_phys_pfn_offset:
__pv_offset:
.quad 0
.size __pv_offset, . -__pv_offset
EXPORT_SYMBOL(__pv_phys_pfn_offset)
EXPORT_SYMBOL(__pv_offset)
#endif
#include "head-common.S"

3
arch/arm/kernel/smccc-call.S
View File

@ -16,7 +16,6 @@
#include <asm/opcodes-sec.h>
#include <asm/opcodes-virt.h>
#include <asm/unwind.h>
#include <asm/export.h>
/*
* Wrap c macros in asm macros to delay expansion until after the
@ -52,7 +51,6 @@ UNWIND( .fnend)
ENTRY(arm_smccc_smc)
SMCCC SMCCC_SMC
ENDPROC(arm_smccc_smc)
EXPORT_SYMBOL(arm_smccc_smc)
/*
* void smccc_hvc(unsigned long a0, unsigned long a1, unsigned long a2,
@ -62,4 +60,3 @@ EXPORT_SYMBOL(arm_smccc_smc)
ENTRY(arm_smccc_hvc)
SMCCC SMCCC_HVC
ENDPROC(arm_smccc_hvc)
EXPORT_SYMBOL(arm_smccc_hvc)

220
arch/arm/kernel/topology.c
View File

@ -12,6 +12,7 @@
*/
#include <linux/cpu.h>
#include <linux/cpufreq.h>
#include <linux/cpumask.h>
#include <linux/export.h>
#include <linux/init.h>
@ -21,7 +22,9 @@
#include <linux/of.h>
#include <linux/sched.h>
#include <linux/slab.h>
#include <linux/string.h>
#include <asm/cpu.h>
#include <asm/cputype.h>
#include <asm/topology.h>
@ -41,6 +44,7 @@
* updated during this sequence.
*/
static DEFINE_PER_CPU(unsigned long, cpu_scale) = SCHED_CAPACITY_SCALE;
static DEFINE_MUTEX(cpu_scale_mutex);
unsigned long arch_scale_cpu_capacity(struct sched_domain *sd, int cpu)
{
@ -52,6 +56,65 @@ static void set_capacity_scale(unsigned int cpu, unsigned long capacity)
per_cpu(cpu_scale, cpu) = capacity;
}
#ifdef CONFIG_PROC_SYSCTL
static ssize_t cpu_capacity_show(struct device *dev,
struct device_attribute *attr,
char *buf)
{
struct cpu *cpu = container_of(dev, struct cpu, dev);
return sprintf(buf, "%lu\n",
arch_scale_cpu_capacity(NULL, cpu->dev.id));
}
static ssize_t cpu_capacity_store(struct device *dev,
struct device_attribute *attr,
const char *buf,
size_t count)
{
struct cpu *cpu = container_of(dev, struct cpu, dev);
int this_cpu = cpu->dev.id, i;
unsigned long new_capacity;
ssize_t ret;
if (count) {
ret = kstrtoul(buf, 0, &new_capacity);
if (ret)
return ret;
if (new_capacity > SCHED_CAPACITY_SCALE)
return -EINVAL;
mutex_lock(&cpu_scale_mutex);
for_each_cpu(i, &cpu_topology[this_cpu].core_sibling)
set_capacity_scale(i, new_capacity);
mutex_unlock(&cpu_scale_mutex);
}
return count;
}
static DEVICE_ATTR_RW(cpu_capacity);
static int register_cpu_capacity_sysctl(void)
{
int i;
struct device *cpu;
for_each_possible_cpu(i) {
cpu = get_cpu_device(i);
if (!cpu) {
pr_err("%s: too early to get CPU%d device!\n",
__func__, i);
continue;
}
device_create_file(cpu, &dev_attr_cpu_capacity);
}
return 0;
}
subsys_initcall(register_cpu_capacity_sysctl);
#endif
#ifdef CONFIG_OF
struct cpu_efficiency {
const char *compatible;
@ -78,6 +141,146 @@ static unsigned long *__cpu_capacity;
#define cpu_capacity(cpu) __cpu_capacity[cpu]
static unsigned long middle_capacity = 1;
static bool cap_from_dt = true;
static u32 *raw_capacity;
static bool cap_parsing_failed;
static u32 capacity_scale;
static int __init parse_cpu_capacity(struct device_node *cpu_node, int cpu)
{
int ret = 1;
u32 cpu_capacity;
if (cap_parsing_failed)
return !ret;
ret = of_property_read_u32(cpu_node,
"capacity-dmips-mhz",
&cpu_capacity);
if (!ret) {
if (!raw_capacity) {
raw_capacity = kcalloc(num_possible_cpus(),
sizeof(*raw_capacity),
GFP_KERNEL);
if (!raw_capacity) {
pr_err("cpu_capacity: failed to allocate memory for raw capacities\n");
cap_parsing_failed = true;
return !ret;
}
}
capacity_scale = max(cpu_capacity, capacity_scale);
raw_capacity[cpu] = cpu_capacity;
pr_debug("cpu_capacity: %s cpu_capacity=%u (raw)\n",
cpu_node->full_name, raw_capacity[cpu]);
} else {
if (raw_capacity) {
pr_err("cpu_capacity: missing %s raw capacity\n",
cpu_node->full_name);
pr_err("cpu_capacity: partial information: fallback to 1024 for all CPUs\n");
}
cap_parsing_failed = true;
kfree(raw_capacity);
}
return !ret;
}
static void normalize_cpu_capacity(void)
{
u64 capacity;
int cpu;
if (!raw_capacity || cap_parsing_failed)
return;
pr_debug("cpu_capacity: capacity_scale=%u\n", capacity_scale);
mutex_lock(&cpu_scale_mutex);
for_each_possible_cpu(cpu) {
capacity = (raw_capacity[cpu] << SCHED_CAPACITY_SHIFT)
/ capacity_scale;
set_capacity_scale(cpu, capacity);
pr_debug("cpu_capacity: CPU%d cpu_capacity=%lu\n",
cpu, arch_scale_cpu_capacity(NULL, cpu));
}
mutex_unlock(&cpu_scale_mutex);
}
#ifdef CONFIG_CPU_FREQ
static cpumask_var_t cpus_to_visit;
static bool cap_parsing_done;
static void parsing_done_workfn(struct work_struct *work);
static DECLARE_WORK(parsing_done_work, parsing_done_workfn);
static int
init_cpu_capacity_callback(struct notifier_block *nb,
unsigned long val,
void *data)
{
struct cpufreq_policy *policy = data;
int cpu;
if (cap_parsing_failed || cap_parsing_done)
return 0;
switch (val) {
case CPUFREQ_NOTIFY:
pr_debug("cpu_capacity: init cpu capacity for CPUs [%*pbl] (to_visit=%*pbl)\n",
cpumask_pr_args(policy->related_cpus),
cpumask_pr_args(cpus_to_visit));
cpumask_andnot(cpus_to_visit,
cpus_to_visit,
policy->related_cpus);
for_each_cpu(cpu, policy->related_cpus) {
raw_capacity[cpu] = arch_scale_cpu_capacity(NULL, cpu) *
policy->cpuinfo.max_freq / 1000UL;
capacity_scale = max(raw_capacity[cpu], capacity_scale);
}
if (cpumask_empty(cpus_to_visit)) {
normalize_cpu_capacity();
kfree(raw_capacity);
pr_debug("cpu_capacity: parsing done\n");
cap_parsing_done = true;
schedule_work(&parsing_done_work);
}
}
return 0;
}
static struct notifier_block init_cpu_capacity_notifier = {
.notifier_call = init_cpu_capacity_callback,
};
static int __init register_cpufreq_notifier(void)
{
if (cap_parsing_failed)
return -EINVAL;
if (!alloc_cpumask_var(&cpus_to_visit, GFP_KERNEL)) {
pr_err("cpu_capacity: failed to allocate memory for cpus_to_visit\n");
return -ENOMEM;
}
cpumask_copy(cpus_to_visit, cpu_possible_mask);
return cpufreq_register_notifier(&init_cpu_capacity_notifier,
CPUFREQ_POLICY_NOTIFIER);
}
core_initcall(register_cpufreq_notifier);
static void parsing_done_workfn(struct work_struct *work)
{
cpufreq_unregister_notifier(&init_cpu_capacity_notifier,
CPUFREQ_POLICY_NOTIFIER);
}
#else
static int __init free_raw_capacity(void)
{
kfree(raw_capacity);
return 0;
}
core_initcall(free_raw_capacity);
#endif
/*
* Iterate all CPUs' descriptor in DT and compute the efficiency
@ -99,6 +302,12 @@ static void __init parse_dt_topology(void)
__cpu_capacity = kcalloc(nr_cpu_ids, sizeof(*__cpu_capacity),
GFP_NOWAIT);
cn = of_find_node_by_path("/cpus");
if (!cn) {
pr_err("No CPU information found in DT\n");
return;
}
for_each_possible_cpu(cpu) {
const u32 *rate;
int len;
@ -110,6 +319,13 @@ static void __init parse_dt_topology(void)
continue;
}
if (parse_cpu_capacity(cn, cpu)) {
of_node_put(cn);
continue;
}
cap_from_dt = false;
for (cpu_eff = table_efficiency; cpu_eff->compatible; cpu_eff++)
if (of_device_is_compatible(cn, cpu_eff->compatible))
break;
@ -151,6 +367,8 @@ static void __init parse_dt_topology(void)
middle_capacity = ((max_capacity / 3)
>> (SCHED_CAPACITY_SHIFT-1)) + 1;
if (cap_from_dt && !cap_parsing_failed)
normalize_cpu_capacity();
}
/*
@ -160,7 +378,7 @@ static void __init parse_dt_topology(void)
*/
static void update_cpu_capacity(unsigned int cpu)
{
if (!cpu_capacity(cpu))
if (!cpu_capacity(cpu) || cap_from_dt)
return;
set_capacity_scale(cpu, cpu_capacity(cpu) / middle_capacity);

20
arch/arm/kernel/traps.c
View File

@ -74,6 +74,26 @@ void dump_backtrace_entry(unsigned long where, unsigned long from, unsigned long
dump_mem("", "Exception stack", frame + 4, frame + 4 + sizeof(struct pt_regs));
}
void dump_backtrace_stm(u32 *stack, u32 instruction)
{
char str[80], *p;
unsigned int x;
int reg;
for (reg = 10, x = 0, p = str; reg >= 0; reg--) {
if (instruction & BIT(reg)) {
p += sprintf(p, " r%d:%08x", reg, *stack--);
if (++x == 6) {
x = 0;
p = str;
printk("%s\n", str);
}
}
}
if (p != str)
printk("%s\n", str);
}
#ifndef CONFIG_ARM_UNWIND
/*
* Stack pointers should always be within the kernels view of

5
arch/arm/kernel/vmlinux-xip.lds.S
View File

@ -3,6 +3,9 @@
* Written by Martin Mares <mj@atrey.karlin.mff.cuni.cz>
*/
/* No __ro_after_init data in the .rodata section - which will always be ro */
#define RO_AFTER_INIT_DATA
#include <asm-generic/vmlinux.lds.h>
#include <asm/cache.h>
#include <asm/thread_info.h>
@ -223,6 +226,8 @@ SECTIONS
. = ALIGN(PAGE_SIZE);
__init_end = .;
*(.data..ro_after_init)
NOSAVE_DATA
CACHELINE_ALIGNED_DATA(L1_CACHE_BYTES)
READ_MOSTLY_DATA(L1_CACHE_BYTES)

3
arch/arm/lib/ashldi3.S
View File

@ -28,7 +28,6 @@ Boston, MA 02110-1301, USA. */
#include <linux/linkage.h>
#include <asm/assembler.h>
#include <asm/export.h>
#ifdef __ARMEB__
#define al r1
@ -53,5 +52,3 @@ ENTRY(__aeabi_llsl)
ENDPROC(__ashldi3)
ENDPROC(__aeabi_llsl)
EXPORT_SYMBOL(__ashldi3)
EXPORT_SYMBOL(__aeabi_llsl)

3
arch/arm/lib/ashrdi3.S
View File

@ -28,7 +28,6 @@ Boston, MA 02110-1301, USA. */
#include <linux/linkage.h>
#include <asm/assembler.h>
#include <asm/export.h>
#ifdef __ARMEB__
#define al r1
@ -53,5 +52,3 @@ ENTRY(__aeabi_lasr)
ENDPROC(__ashrdi3)
ENDPROC(__aeabi_lasr)
EXPORT_SYMBOL(__ashrdi3)
EXPORT_SYMBOL(__aeabi_lasr)

37
arch/arm/lib/backtrace.S
View File

@ -10,6 +10,7 @@
* 27/03/03 Ian Molton Clean up CONFIG_CPU
*
*/
#include <linux/kern_levels.h>
#include <linux/linkage.h>
#include <asm/assembler.h>
.text
@ -83,13 +84,13 @@ for_each_frame: tst frame, mask @ Check for address exceptions
teq r3, r1, lsr #11
ldreq r0, [frame, #-8] @ get sp
subeq r0, r0, #4 @ point at the last arg
bleq .Ldumpstm @ dump saved registers
bleq dump_backtrace_stm @ dump saved registers
1004: ldr r1, [sv_pc, #0] @ if stmfd sp!, {..., fp, ip, lr, pc}
ldr r3, .Ldsi @ instruction exists,
teq r3, r1, lsr #11
subeq r0, frame, #16
bleq .Ldumpstm @ dump saved registers
bleq dump_backtrace_stm @ dump saved registers
teq sv_fp, #0 @ zero saved fp means
beq no_frame @ no further frames
@ -112,38 +113,6 @@ ENDPROC(c_backtrace)
.long 1004b, 1006b
.popsection
#define instr r4
#define reg r5
#define stack r6
.Ldumpstm: stmfd sp!, {instr, reg, stack, r7, lr}
mov stack, r0
mov instr, r1
mov reg, #10
mov r7, #0
1: mov r3, #1
ARM( tst instr, r3, lsl reg )
THUMB( lsl r3, reg )
THUMB( tst instr, r3 )
beq 2f
add r7, r7, #1
teq r7, #6
moveq r7, #0
adr r3, .Lcr
addne r3, r3, #1 @ skip newline
ldr r2, [stack], #-4
mov r1, reg
adr r0, .Lfp
bl printk
2: subs reg, reg, #1
bpl 1b
teq r7, #0
adrne r0, .Lcr
blne printk
ldmfd sp!, {instr, reg, stack, r7, pc}
.Lfp: .asciz " r%d:%08x%s"
.Lcr: .asciz "\n"
.Lbad: .asciz "Backtrace aborted due to bad frame pointer <%p>\n"
.align
.Ldsi: .word 0xe92dd800 >> 11 @ stmfd sp!, {... fp, ip, lr, pc}

5
arch/arm/lib/bitops.h
View File

@ -1,6 +1,5 @@
#include <asm/assembler.h>
#include <asm/unwind.h>
#include <asm/export.h>
#if __LINUX_ARM_ARCH__ >= 6
.macro bitop, name, instr
@ -26,7 +25,6 @@ UNWIND( .fnstart )
bx lr
UNWIND( .fnend )
ENDPROC(\name )
EXPORT_SYMBOL(\name )
.endm
.macro testop, name, instr, store
@ -57,7 +55,6 @@ UNWIND( .fnstart )
2: bx lr
UNWIND( .fnend )
ENDPROC(\name )
EXPORT_SYMBOL(\name )
.endm
#else
.macro bitop, name, instr
@ -77,7 +74,6 @@ UNWIND( .fnstart )
ret lr
UNWIND( .fnend )
ENDPROC(\name )
EXPORT_SYMBOL(\name )
.endm
/**
@ -106,6 +102,5 @@ UNWIND( .fnstart )
ret lr
UNWIND( .fnend )
ENDPROC(\name )
EXPORT_SYMBOL(\name )
.endm
#endif

3
arch/arm/lib/bswapsdi2.S
View File

@ -1,6 +1,5 @@
#include <linux/linkage.h>
#include <asm/assembler.h>
#include <asm/export.h>
#if __LINUX_ARM_ARCH__ >= 6
ENTRY(__bswapsi2)
@ -36,5 +35,3 @@ ENTRY(__bswapdi2)
ret lr
ENDPROC(__bswapdi2)
#endif
EXPORT_SYMBOL(__bswapsi2)
EXPORT_SYMBOL(__bswapdi2)

4
arch/arm/lib/clear_user.S
View File

@ -10,7 +10,6 @@
#include <linux/linkage.h>
#include <asm/assembler.h>
#include <asm/unwind.h>
#include <asm/export.h>
.text
@ -51,9 +50,6 @@ USER( strnebt r2, [r0])
UNWIND(.fnend)
ENDPROC(arm_clear_user)
ENDPROC(__clear_user_std)
#ifndef CONFIG_UACCESS_WITH_MEMCPY
EXPORT_SYMBOL(arm_clear_user)
#endif
.pushsection .text.fixup,"ax"
.align 0

2
arch/arm/lib/copy_from_user.S
View File

@ -13,7 +13,6 @@
#include <linux/linkage.h>
#include <asm/assembler.h>
#include <asm/unwind.h>
#include <asm/export.h>
/*
* Prototype:
@ -95,7 +94,6 @@ ENTRY(arm_copy_from_user)
#include "copy_template.S"
ENDPROC(arm_copy_from_user)
EXPORT_SYMBOL(arm_copy_from_user)
.pushsection .fixup,"ax"
.align 0

2
arch/arm/lib/copy_page.S
View File

@ -13,7 +13,6 @@
#include <asm/assembler.h>
#include <asm/asm-offsets.h>
#include <asm/cache.h>
#include <asm/export.h>
#define COPY_COUNT (PAGE_SZ / (2 * L1_CACHE_BYTES) PLD( -1 ))
@ -46,4 +45,3 @@ ENTRY(copy_page)
PLD( beq 2b )
ldmfd sp!, {r4, pc} @ 3
ENDPROC(copy_page)
EXPORT_SYMBOL(copy_page)

4
arch/arm/lib/copy_to_user.S
View File

@ -13,7 +13,6 @@
#include <linux/linkage.h>
#include <asm/assembler.h>
#include <asm/unwind.h>
#include <asm/export.h>
/*
* Prototype:
@ -100,9 +99,6 @@ WEAK(arm_copy_to_user)
ENDPROC(arm_copy_to_user)
ENDPROC(__copy_to_user_std)
#ifndef CONFIG_UACCESS_WITH_MEMCPY
EXPORT_SYMBOL(arm_copy_to_user)
#endif
.pushsection .text.fixup,"ax"
.align 0

3
arch/arm/lib/csumipv6.S
View File

@ -9,7 +9,6 @@
*/
#include <linux/linkage.h>
#include <asm/assembler.h>
#include <asm/export.h>
.text
@ -31,4 +30,4 @@ ENTRY(__csum_ipv6_magic)
adcs r0, r0, #0
ldmfd sp!, {pc}
ENDPROC(__csum_ipv6_magic)
EXPORT_SYMBOL(__csum_ipv6_magic)

2
arch/arm/lib/csumpartial.S
View File

@ -9,7 +9,6 @@
*/
#include <linux/linkage.h>
#include <asm/assembler.h>
#include <asm/export.h>
.text
@ -141,4 +140,3 @@ ENTRY(csum_partial)
bne 4b
b .Lless4
ENDPROC(csum_partial)
EXPORT_SYMBOL(csum_partial)

1
arch/arm/lib/csumpartialcopy.S
View File

@ -49,6 +49,5 @@
#define FN_ENTRY ENTRY(csum_partial_copy_nocheck)
#define FN_EXIT ENDPROC(csum_partial_copy_nocheck)
#define FN_EXPORT EXPORT_SYMBOL(csum_partial_copy_nocheck)
#include "csumpartialcopygeneric.S"

2
arch/arm/lib/csumpartialcopygeneric.S
View File

@ -8,7 +8,6 @@
* published by the Free Software Foundation.
*/
#include <asm/assembler.h>
#include <asm/export.h>
/*
* unsigned int
@ -332,4 +331,3 @@ FN_ENTRY
mov r5, r4, get_byte_1
b .Lexit
FN_EXIT
FN_EXPORT

1
arch/arm/lib/csumpartialcopyuser.S
View File

@ -73,7 +73,6 @@
#define FN_ENTRY ENTRY(csum_partial_copy_from_user)
#define FN_EXIT ENDPROC(csum_partial_copy_from_user)
#define FN_EXPORT EXPORT_SYMBOL(csum_partial_copy_from_user)
#include "csumpartialcopygeneric.S"

15
arch/arm/lib/delay-loop.S
View File

@ -17,24 +17,23 @@
.LC1: .word UDELAY_MULT
/*
* loops = r0 * HZ * loops_per_jiffy / 1000000
*
* r0 <= 2000
* HZ <= 1000
*/
ENTRY(__loop_udelay)
ldr r2, .LC1
mul r0, r2, r0
ENTRY(__loop_const_udelay) @ 0 <= r0 <= 0x7fffff06
mul r0, r2, r0 @ r0 = delay_us * UDELAY_MULT
ENTRY(__loop_const_udelay) @ 0 <= r0 <= 0xfffffaf0
ldr r2, .LC0
ldr r2, [r2]
umull r1, r0, r2, r0
adds r1, r1, #0xffffffff
adcs r0, r0, r0
umull r1, r0, r2, r0 @ r0-r1 = r0 * loops_per_jiffy
adds r1, r1, #0xffffffff @ rounding up ...
adcs r0, r0, r0 @ and right shift by 31
reteq lr
/*
* loops = r0 * HZ * loops_per_jiffy / 1000000
*/
.align 3
@ Delay routine

2
arch/arm/lib/delay.c
View File

@ -24,7 +24,6 @@
#include <linux/init.h>
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/export.h>
#include <linux/timex.h>
/*
@ -35,7 +34,6 @@ struct arm_delay_ops arm_delay_ops __ro_after_init = {
.const_udelay = __loop_const_udelay,
.udelay = __loop_udelay,
};
EXPORT_SYMBOL(arm_delay_ops);
static const struct delay_timer *delay_timer;
static bool delay_calibrated;

2
arch/arm/lib/div64.S
View File

@ -15,7 +15,6 @@
#include <linux/linkage.h>
#include <asm/assembler.h>
#include <asm/unwind.h>
#include <asm/export.h>
#ifdef __ARMEB__
#define xh r0
@ -211,4 +210,3 @@ Ldiv0_64:
UNWIND(.fnend)
ENDPROC(__do_div64)
EXPORT_SYMBOL(__do_div64)

9
arch/arm/lib/findbit.S
View File

@ -15,7 +15,6 @@
*/
#include <linux/linkage.h>
#include <asm/assembler.h>
#include <asm/export.h>
.text
/*
@ -38,7 +37,6 @@ ENTRY(_find_first_zero_bit_le)
3: mov r0, r1 @ no free bits
ret lr
ENDPROC(_find_first_zero_bit_le)
EXPORT_SYMBOL(_find_first_zero_bit_le)
/*
* Purpose : Find next 'zero' bit
@ -59,7 +57,6 @@ ENTRY(_find_next_zero_bit_le)
add r2, r2, #1 @ align bit pointer
b 2b @ loop for next bit
ENDPROC(_find_next_zero_bit_le)
EXPORT_SYMBOL(_find_next_zero_bit_le)
/*
* Purpose : Find a 'one' bit
@ -81,7 +78,6 @@ ENTRY(_find_first_bit_le)
3: mov r0, r1 @ no free bits
ret lr
ENDPROC(_find_first_bit_le)
EXPORT_SYMBOL(_find_first_bit_le)
/*
* Purpose : Find next 'one' bit
@ -101,7 +97,6 @@ ENTRY(_find_next_bit_le)
add r2, r2, #1 @ align bit pointer
b 2b @ loop for next bit
ENDPROC(_find_next_bit_le)
EXPORT_SYMBOL(_find_next_bit_le)
#ifdef __ARMEB__
@ -121,7 +116,6 @@ ENTRY(_find_first_zero_bit_be)
3: mov r0, r1 @ no free bits
ret lr
ENDPROC(_find_first_zero_bit_be)
EXPORT_SYMBOL(_find_first_zero_bit_be)
ENTRY(_find_next_zero_bit_be)
teq r1, #0
@ -139,7 +133,6 @@ ENTRY(_find_next_zero_bit_be)
add r2, r2, #1 @ align bit pointer
b 2b @ loop for next bit
ENDPROC(_find_next_zero_bit_be)
EXPORT_SYMBOL(_find_next_zero_bit_be)
ENTRY(_find_first_bit_be)
teq r1, #0
@ -157,7 +150,6 @@ ENTRY(_find_first_bit_be)
3: mov r0, r1 @ no free bits
ret lr
ENDPROC(_find_first_bit_be)
EXPORT_SYMBOL(_find_first_bit_be)
ENTRY(_find_next_bit_be)
teq r1, #0
@ -174,7 +166,6 @@ ENTRY(_find_next_bit_be)
add r2, r2, #1 @ align bit pointer
b 2b @ loop for next bit
ENDPROC(_find_next_bit_be)
EXPORT_SYMBOL(_find_next_bit_be)
#endif

9
arch/arm/lib/getuser.S
View File

@ -31,7 +31,6 @@
#include <asm/assembler.h>
#include <asm/errno.h>
#include <asm/domain.h>
#include <asm/export.h>
ENTRY(__get_user_1)
check_uaccess r0, 1, r1, r2, __get_user_bad
@ -39,7 +38,6 @@ ENTRY(__get_user_1)
mov r0, #0
ret lr
ENDPROC(__get_user_1)
EXPORT_SYMBOL(__get_user_1)
ENTRY(__get_user_2)
check_uaccess r0, 2, r1, r2, __get_user_bad
@ -60,7 +58,6 @@ rb .req r0
mov r0, #0
ret lr
ENDPROC(__get_user_2)
EXPORT_SYMBOL(__get_user_2)
ENTRY(__get_user_4)
check_uaccess r0, 4, r1, r2, __get_user_bad
@ -68,7 +65,6 @@ ENTRY(__get_user_4)
mov r0, #0
ret lr
ENDPROC(__get_user_4)
EXPORT_SYMBOL(__get_user_4)
ENTRY(__get_user_8)
check_uaccess r0, 8, r1, r2, __get_user_bad
@ -82,7 +78,6 @@ ENTRY(__get_user_8)
mov r0, #0
ret lr
ENDPROC(__get_user_8)
EXPORT_SYMBOL(__get_user_8)
#ifdef __ARMEB__
ENTRY(__get_user_32t_8)
@ -96,7 +91,6 @@ ENTRY(__get_user_32t_8)
mov r0, #0
ret lr
ENDPROC(__get_user_32t_8)
EXPORT_SYMBOL(__get_user_32t_8)
ENTRY(__get_user_64t_1)
check_uaccess r0, 1, r1, r2, __get_user_bad8
@ -104,7 +98,6 @@ ENTRY(__get_user_64t_1)
mov r0, #0
ret lr
ENDPROC(__get_user_64t_1)
EXPORT_SYMBOL(__get_user_64t_1)
ENTRY(__get_user_64t_2)
check_uaccess r0, 2, r1, r2, __get_user_bad8
@ -121,7 +114,6 @@ rb .req r0
mov r0, #0
ret lr
ENDPROC(__get_user_64t_2)
EXPORT_SYMBOL(__get_user_64t_2)
ENTRY(__get_user_64t_4)
check_uaccess r0, 4, r1, r2, __get_user_bad8
@ -129,7 +121,6 @@ ENTRY(__get_user_64t_4)
mov r0, #0
ret lr
ENDPROC(__get_user_64t_4)
EXPORT_SYMBOL(__get_user_64t_4)
#endif
__get_user_bad8:

2
arch/arm/lib/io-readsb.S
View File

@ -9,7 +9,6 @@
*/
#include <linux/linkage.h>
#include <asm/assembler.h>
#include <asm/export.h>
.Linsb_align: rsb ip, ip, #4
cmp ip, r2
@ -122,4 +121,3 @@ ENTRY(__raw_readsb)
ldmfd sp!, {r4 - r6, pc}
ENDPROC(__raw_readsb)
EXPORT_SYMBOL(__raw_readsb)

2
arch/arm/lib/io-readsl.S
View File

@ -9,7 +9,6 @@
*/
#include <linux/linkage.h>
#include <asm/assembler.h>
#include <asm/export.h>
ENTRY(__raw_readsl)
teq r2, #0 @ do we have to check for the zero len?
@ -78,4 +77,3 @@ ENTRY(__raw_readsl)
strb r3, [r1, #0]
ret lr
ENDPROC(__raw_readsl)
EXPORT_SYMBOL(__raw_readsl)

3
arch/arm/lib/io-readsw-armv3.S
View File

@ -9,7 +9,6 @@
*/
#include <linux/linkage.h>
#include <asm/assembler.h>
#include <asm/export.h>
.Linsw_bad_alignment:
adr r0, .Linsw_bad_align_msg
@ -104,4 +103,4 @@ ENTRY(__raw_readsw)
ldmfd sp!, {r4, r5, r6, pc}
EXPORT_SYMBOL(__raw_readsw)

2
arch/arm/lib/io-readsw-armv4.S
View File

@ -9,7 +9,6 @@
*/
#include <linux/linkage.h>
#include <asm/assembler.h>
#include <asm/export.h>
.macro pack, rd, hw1, hw2
#ifndef __ARMEB__
@ -130,4 +129,3 @@ ENTRY(__raw_readsw)
strneb ip, [r1]
ldmfd sp!, {r4, pc}
ENDPROC(__raw_readsw)
EXPORT_SYMBOL(__raw_readsw)

2
arch/arm/lib/io-writesb.S
View File

@ -9,7 +9,6 @@
*/
#include <linux/linkage.h>
#include <asm/assembler.h>
#include <asm/export.h>
.macro outword, rd
#ifndef __ARMEB__
@ -93,4 +92,3 @@ ENTRY(__raw_writesb)
ldmfd sp!, {r4, r5, pc}
ENDPROC(__raw_writesb)
EXPORT_SYMBOL(__raw_writesb)

2
arch/arm/lib/io-writesl.S
View File

@ -9,7 +9,6 @@
*/
#include <linux/linkage.h>
#include <asm/assembler.h>
#include <asm/export.h>
ENTRY(__raw_writesl)
teq r2, #0 @ do we have to check for the zero len?
@ -66,4 +65,3 @@ ENTRY(__raw_writesl)
bne 6b
ret lr
ENDPROC(__raw_writesl)
EXPORT_SYMBOL(__raw_writesl)

2
arch/arm/lib/io-writesw-armv3.S
View File

@ -9,7 +9,6 @@
*/
#include <linux/linkage.h>
#include <asm/assembler.h>
#include <asm/export.h>
.Loutsw_bad_alignment:
adr r0, .Loutsw_bad_align_msg
@ -125,4 +124,3 @@ ENTRY(__raw_writesw)
strne ip, [r0]
ldmfd sp!, {r4, r5, r6, pc}
EXPORT_SYMBOL(__raw_writesw)

2
arch/arm/lib/io-writesw-armv4.S
View File

@ -9,7 +9,6 @@
*/
#include <linux/linkage.h>
#include <asm/assembler.h>
#include <asm/export.h>
.macro outword, rd
#ifndef __ARMEB__
@ -99,4 +98,3 @@ ENTRY(__raw_writesw)
strneh ip, [r0]
ret lr
ENDPROC(__raw_writesw)
EXPORT_SYMBOL(__raw_writesw)

9
arch/arm/lib/lib1funcs.S
View File

@ -36,7 +36,6 @@ Boston, MA 02111-1307, USA. */
#include <linux/linkage.h>
#include <asm/assembler.h>
#include <asm/unwind.h>
#include <asm/export.h>
.macro ARM_DIV_BODY dividend, divisor, result, curbit
@ -239,8 +238,6 @@ UNWIND(.fnstart)
UNWIND(.fnend)
ENDPROC(__udivsi3)
ENDPROC(__aeabi_uidiv)
EXPORT_SYMBOL(__udivsi3)
EXPORT_SYMBOL(__aeabi_uidiv)
ENTRY(__umodsi3)
UNWIND(.fnstart)
@ -259,7 +256,6 @@ UNWIND(.fnstart)
UNWIND(.fnend)
ENDPROC(__umodsi3)
EXPORT_SYMBOL(__umodsi3)
#ifdef CONFIG_ARM_PATCH_IDIV
.align 3
@ -307,8 +303,6 @@ UNWIND(.fnstart)
UNWIND(.fnend)
ENDPROC(__divsi3)
ENDPROC(__aeabi_idiv)
EXPORT_SYMBOL(__divsi3)
EXPORT_SYMBOL(__aeabi_idiv)
ENTRY(__modsi3)
UNWIND(.fnstart)
@ -333,7 +327,6 @@ UNWIND(.fnstart)
UNWIND(.fnend)
ENDPROC(__modsi3)
EXPORT_SYMBOL(__modsi3)
#ifdef CONFIG_AEABI
@ -350,7 +343,6 @@ UNWIND(.save {r0, r1, ip, lr} )
UNWIND(.fnend)
ENDPROC(__aeabi_uidivmod)
EXPORT_SYMBOL(__aeabi_uidivmod)
ENTRY(__aeabi_idivmod)
UNWIND(.fnstart)
@ -364,7 +356,6 @@ UNWIND(.save {r0, r1, ip, lr} )
UNWIND(.fnend)
ENDPROC(__aeabi_idivmod)
EXPORT_SYMBOL(__aeabi_idivmod)
#endif

3
arch/arm/lib/lshrdi3.S
View File

@ -28,7 +28,6 @@ Boston, MA 02110-1301, USA. */
#include <linux/linkage.h>
#include <asm/assembler.h>
#include <asm/export.h>
#ifdef __ARMEB__
#define al r1
@ -53,5 +52,3 @@ ENTRY(__aeabi_llsr)
ENDPROC(__lshrdi3)
ENDPROC(__aeabi_llsr)
EXPORT_SYMBOL(__lshrdi3)
EXPORT_SYMBOL(__aeabi_llsr)

2
arch/arm/lib/memchr.S
View File

@ -11,7 +11,6 @@
*/
#include <linux/linkage.h>
#include <asm/assembler.h>
#include <asm/export.h>
.text
.align 5
@ -25,4 +24,3 @@ ENTRY(memchr)
2: movne r0, #0
ret lr
ENDPROC(memchr)
EXPORT_SYMBOL(memchr)

3
arch/arm/lib/memcpy.S
View File

@ -13,7 +13,6 @@
#include <linux/linkage.h>
#include <asm/assembler.h>
#include <asm/unwind.h>
#include <asm/export.h>
#define LDR1W_SHIFT 0
#define STR1W_SHIFT 0
@ -69,5 +68,3 @@ ENTRY(memcpy)
ENDPROC(memcpy)
ENDPROC(mmiocpy)
EXPORT_SYMBOL(memcpy)
EXPORT_SYMBOL(mmiocpy)

2
arch/arm/lib/memmove.S
View File

@ -13,7 +13,6 @@
#include <linux/linkage.h>
#include <asm/assembler.h>
#include <asm/unwind.h>
#include <asm/export.h>
.text
@ -226,4 +225,3 @@ ENTRY(memmove)
18: backward_copy_shift push=24 pull=8
ENDPROC(memmove)
EXPORT_SYMBOL(memmove)

3
arch/arm/lib/memset.S
View File

@ -12,7 +12,6 @@
#include <linux/linkage.h>
#include <asm/assembler.h>
#include <asm/unwind.h>
#include <asm/export.h>
.text
.align 5
@ -136,5 +135,3 @@ UNWIND( .fnstart )
UNWIND( .fnend )
ENDPROC(memset)
ENDPROC(mmioset)
EXPORT_SYMBOL(memset)
EXPORT_SYMBOL(mmioset)

2
arch/arm/lib/memzero.S
View File

@ -10,7 +10,6 @@
#include <linux/linkage.h>
#include <asm/assembler.h>
#include <asm/unwind.h>
#include <asm/export.h>
.text
.align 5
@ -136,4 +135,3 @@ UNWIND( .fnstart )
ret lr @ 1
UNWIND( .fnend )
ENDPROC(__memzero)
EXPORT_SYMBOL(__memzero)

3
arch/arm/lib/muldi3.S
View File

@ -12,7 +12,6 @@
#include <linux/linkage.h>
#include <asm/assembler.h>
#include <asm/export.h>
#ifdef __ARMEB__
#define xh r0
@ -47,5 +46,3 @@ ENTRY(__aeabi_lmul)
ENDPROC(__muldi3)
ENDPROC(__aeabi_lmul)
EXPORT_SYMBOL(__muldi3)
EXPORT_SYMBOL(__aeabi_lmul)

5
arch/arm/lib/putuser.S
View File

@ -31,7 +31,6 @@
#include <asm/assembler.h>
#include <asm/errno.h>
#include <asm/domain.h>
#include <asm/export.h>
ENTRY(__put_user_1)
check_uaccess r0, 1, r1, ip, __put_user_bad
@ -39,7 +38,6 @@ ENTRY(__put_user_1)
mov r0, #0
ret lr
ENDPROC(__put_user_1)
EXPORT_SYMBOL(__put_user_1)
ENTRY(__put_user_2)
check_uaccess r0, 2, r1, ip, __put_user_bad
@ -64,7 +62,6 @@ ENTRY(__put_user_2)
mov r0, #0
ret lr
ENDPROC(__put_user_2)
EXPORT_SYMBOL(__put_user_2)
ENTRY(__put_user_4)
check_uaccess r0, 4, r1, ip, __put_user_bad
@ -72,7 +69,6 @@ ENTRY(__put_user_4)
mov r0, #0
ret lr
ENDPROC(__put_user_4)
EXPORT_SYMBOL(__put_user_4)
ENTRY(__put_user_8)
check_uaccess r0, 8, r1, ip, __put_user_bad
@ -86,7 +82,6 @@ ENTRY(__put_user_8)
mov r0, #0
ret lr
ENDPROC(__put_user_8)
EXPORT_SYMBOL(__put_user_8)
__put_user_bad:
mov r0, #-EFAULT

2
arch/arm/lib/strchr.S
View File

@ -11,7 +11,6 @@
*/
#include <linux/linkage.h>
#include <asm/assembler.h>
#include <asm/export.h>
.text
.align 5
@ -26,4 +25,3 @@ ENTRY(strchr)
subeq r0, r0, #1
ret lr
ENDPROC(strchr)
EXPORT_SYMBOL(strchr)

2
arch/arm/lib/strrchr.S
View File

@ -11,7 +11,6 @@
*/
#include <linux/linkage.h>
#include <asm/assembler.h>
#include <asm/export.h>
.text
.align 5
@ -25,4 +24,3 @@ ENTRY(strrchr)
mov r0, r3
ret lr
ENDPROC(strrchr)
EXPORT_SYMBOL(strrchr)

3
arch/arm/lib/uaccess_with_memcpy.c
View File

@ -19,7 +19,6 @@
#include <linux/gfp.h>
#include <linux/highmem.h>
#include <linux/hugetlb.h>
#include <linux/export.h>
#include <asm/current.h>
#include <asm/page.h>
@ -157,7 +156,6 @@ arm_copy_to_user(void __user *to, const void *from, unsigned long n)
}
return n;
}
EXPORT_SYMBOL(arm_copy_to_user);
static unsigned long noinline
__clear_user_memset(void __user *addr, unsigned long n)
@ -215,7 +213,6 @@ unsigned long arm_clear_user(void __user *addr, unsigned long n)
}
return n;
}
EXPORT_SYMBOL(arm_clear_user);
#if 0

3
arch/arm/lib/ucmpdi2.S
View File

@ -12,7 +12,6 @@
#include <linux/linkage.h>
#include <asm/assembler.h>
#include <asm/export.h>
#ifdef __ARMEB__
#define xh r0
@ -36,7 +35,6 @@ ENTRY(__ucmpdi2)
ret lr
ENDPROC(__ucmpdi2)
EXPORT_SYMBOL(__ucmpdi2)
#ifdef CONFIG_AEABI
@ -50,7 +48,6 @@ ENTRY(__aeabi_ulcmp)
ret lr
ENDPROC(__aeabi_ulcmp)
EXPORT_SYMBOL(__aeabi_ulcmp)
#endif

1
arch/arm/mach-imx/Makefile
View File

@ -32,6 +32,7 @@ endif
ifdef CONFIG_SND_IMX_SOC
obj-y += ssi-fiq.o
obj-y += ssi-fiq-ksym.o
endif
# i.MX21 based machines

20
arch/arm/mach-imx/ssi-fiq-ksym.c Normal file
View File

@ -0,0 +1,20 @@
/*
* Exported ksyms for the SSI FIQ handler
*
* Copyright (C) 2009, Sascha Hauer <s.hauer@pengutronix.de>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
#include <linux/module.h>
#include <linux/platform_data/asoc-imx-ssi.h>
EXPORT_SYMBOL(imx_ssi_fiq_tx_buffer);
EXPORT_SYMBOL(imx_ssi_fiq_rx_buffer);
EXPORT_SYMBOL(imx_ssi_fiq_start);
EXPORT_SYMBOL(imx_ssi_fiq_end);
EXPORT_SYMBOL(imx_ssi_fiq_base);

7
arch/arm/mach-imx/ssi-fiq.S
View File

@ -8,7 +8,6 @@
#include <linux/linkage.h>
#include <asm/assembler.h>
#include <asm/export.h>
/*
* r8 = bit 0-15: tx offset, bit 16-31: tx buffer size
@ -145,8 +144,4 @@ imx_ssi_fiq_tx_buffer:
.word 0x0
.L_imx_ssi_fiq_end:
imx_ssi_fiq_end:
EXPORT_SYMBOL(imx_ssi_fiq_tx_buffer)
EXPORT_SYMBOL(imx_ssi_fiq_rx_buffer)
EXPORT_SYMBOL(imx_ssi_fiq_start)
EXPORT_SYMBOL(imx_ssi_fiq_end)
EXPORT_SYMBOL(imx_ssi_fiq_base)

925
arch/arm/mach-sa1100/include/mach/SA-1101.h
View File

@ -1,925 +0,0 @@
/*
* SA-1101.h
*
* Copyright (c) Peter Danielsson 1999
*
* Definition of constants related to the sa1101
* support chip for the sa1100
*
*/
/* Be sure that virtual mapping is defined right */
#ifndef __ASM_ARCH_HARDWARE_H
#error You must include hardware.h not SA-1101.h
#endif
#ifndef SA1101_BASE
#error You must define SA-1101 physical base address
#endif
#ifndef LANGUAGE
# ifdef __ASSEMBLY__
# define LANGUAGE Assembly
# else
# define LANGUAGE C
# endif
#endif
/*
* We have mapped the sa1101 depending on the value of SA1101_BASE.
* It then appears from 0xf4000000.
*/
#define SA1101_p2v( x ) ((x) - SA1101_BASE + 0xf4000000)
#define SA1101_v2p( x ) ((x) - 0xf4000000 + SA1101_BASE)
#ifndef SA1101_p2v
#define SA1101_p2v(PhAdd) (PhAdd)
#endif
#include <mach/bitfield.h>
#define C 0
#define Assembly 1
/*
* Memory map
*/
#define __SHMEM_CONTROL0 0x00000000
#define __SYSTEM_CONTROL1 0x00000400
#define __ARBITER 0x00020000
#define __SYSTEM_CONTROL2 0x00040000
#define __SYSTEM_CONTROL3 0x00060000
#define __PARALLEL_PORT 0x00080000
#define __VIDMEM_CONTROL 0x00100000
#define __UPDATE_FIFO 0x00120000
#define __SHMEM_CONTROL1 0x00140000
#define __INTERRUPT_CONTROL 0x00160000
#define __USB_CONTROL 0x00180000
#define __TRACK_INTERFACE 0x001a0000
#define __MOUSE_INTERFACE 0x001b0000
#define __KEYPAD_INTERFACE 0x001c0000
#define __PCMCIA_INTERFACE 0x001e0000
#define __VGA_CONTROL 0x00200000
#define __GPIO_INTERFACE 0x00300000
/*
* Macro that calculates real address for registers in the SA-1101
*/
#define _SA1101( x ) ((x) + SA1101_BASE)
/*
* Interface and shared memory controller registers
*
* Registers
* SKCR SA-1101 control register (read/write)
* SMCR Shared Memory Controller Register
* SNPR Snoop Register
*/
#define _SKCR _SA1101( 0x00000000 ) /* SA-1101 Control Reg. */
#define _SMCR _SA1101( 0x00140000 ) /* Shared Mem. Control Reg. */
#define _SNPR _SA1101( 0x00140400 ) /* Snoop Reg. */
#if LANGUAGE == C
#define SKCR (*((volatile Word *) SA1101_p2v (_SKCR)))
#define SMCR (*((volatile Word *) SA1101_p2v (_SMCR)))
#define SNPR (*((volatile Word *) SA1101_p2v (_SNPR)))
#define SKCR_PLLEn 0x0001 /* Enable On-Chip PLL */
#define SKCR_BCLKEn 0x0002 /* Enables BCLK */
#define SKCR_Sleep 0x0004 /* Sleep Mode */
#define SKCR_IRefEn 0x0008 /* DAC Iref input enable */
#define SKCR_VCOON 0x0010 /* VCO bias */
#define SKCR_ScanTestEn 0x0020 /* Enables scan test */
#define SKCR_ClockTestEn 0x0040 /* Enables clock test */
#define SMCR_DCAC Fld(2,0) /* Number of column address bits */
#define SMCR_DRAC Fld(2,2) /* Number of row address bits */
#define SMCR_ArbiterBias 0x0008 /* favor video or USB */
#define SMCR_TopVidMem Fld(4,5) /* Top 4 bits of vidmem addr. */
#define SMCR_ColAdrBits( x ) /* col. addr bits 8..11 */ \
(( (x) - 8 ) << FShft (SMCR_DCAC))
#define SMCR_RowAdrBits( x ) /* row addr bits 9..12 */\
(( (x) - 9 ) << FShft (SMCR_DRAC))
#define SNPR_VFBstart Fld(12,0) /* Video frame buffer addr */
#define SNPR_VFBsize Fld(11,12) /* Video frame buffer size */
#define SNPR_WholeBank (1 << 23) /* Whole bank bit */
#define SNPR_BankSelect Fld(2,27) /* Bank select */
#define SNPR_SnoopEn (1 << 31) /* Enable snoop operation */
#define SNPR_Set_VFBsize( x ) /* set frame buffer size (in kb) */ \
( (x) << FShft (SNPR_VFBsize))
#define SNPR_Select_Bank(x) /* select bank 0 or 1 */ \
(( (x) + 1 ) << FShft (SNPR_BankSelect ))
#endif /* LANGUAGE == C */
/*
* Video Memory Controller
*
* Registers
* VMCCR Configuration register
* VMCAR VMC address register
* VMCDR VMC data register
*
*/
#define _VMCCR _SA1101( 0x00100000 ) /* Configuration register */
#define _VMCAR _SA1101( 0x00101000 ) /* VMC address register */
#define _VMCDR _SA1101( 0x00101400 ) /* VMC data register */
#if LANGUAGE == C
#define VMCCR (*((volatile Word *) SA1101_p2v (_VMCCR)))
#define VMCAR (*((volatile Word *) SA1101_p2v (_VMCAR)))
#define VMCDR (*((volatile Word *) SA1101_p2v (_VMCDR)))
#define VMCCR_RefreshEn 0x0000 /* Enable memory refresh */
#define VMCCR_Config 0x0001 /* DRAM size */
#define VMCCR_RefPeriod Fld(2,3) /* Refresh period */
#define VMCCR_StaleDataWait Fld(4,5) /* Stale FIFO data timeout counter */
#define VMCCR_SleepState (1<<9) /* State of interface pins in sleep*/
#define VMCCR_RefTest (1<<10) /* refresh test */
#define VMCCR_RefLow Fld(6,11) /* refresh low counter */
#define VMCCR_RefHigh Fld(7,17) /* refresh high counter */
#define VMCCR_SDTCTest Fld(7,24) /* stale data timeout counter */
#define VMCCR_ForceSelfRef (1<<31) /* Force self refresh */
#endif LANGUAGE == C
/* Update FIFO
*
* Registers
* UFCR Update FIFO Control Register
* UFSR Update FIFO Status Register
* UFLVLR update FIFO level register
* UFDR update FIFO data register
*/
#define _UFCR _SA1101(0x00120000) /* Update FIFO Control Reg. */
#define _UFSR _SA1101(0x00120400) /* Update FIFO Status Reg. */
#define _UFLVLR _SA1101(0x00120800) /* Update FIFO level reg. */
#define _UFDR _SA1101(0x00120c00) /* Update FIFO data reg. */
#if LANGUAGE == C
#define UFCR (*((volatile Word *) SA1101_p2v (_UFCR)))
#define UFSR (*((volatile Word *) SA1101_p2v (_UFSR)))
#define UFLVLR (*((volatile Word *) SA1101_p2v (_UFLVLR)))
#define UFDR (*((volatile Word *) SA1101_p2v (_UFDR)))
#define UFCR_FifoThreshhold Fld(7,0) /* Level for FifoGTn flag */
#define UFSR_FifoGTnFlag 0x01 /* FifoGTn flag */#define UFSR_FifoEmpty 0x80 /* FIFO is empty */
#endif /* LANGUAGE == C */
/* System Controller
*
* Registers
* SKPCR Power Control Register
* SKCDR Clock Divider Register
* DACDR1 DAC1 Data register
* DACDR2 DAC2 Data register
*/
#define _SKPCR _SA1101(0x00000400)
#define _SKCDR _SA1101(0x00040000)
#define _DACDR1 _SA1101(0x00060000)
#define _DACDR2 _SA1101(0x00060400)
#if LANGUAGE == C
#define SKPCR (*((volatile Word *) SA1101_p2v (_SKPCR)))
#define SKCDR (*((volatile Word *) SA1101_p2v (_SKCDR)))
#define DACDR1 (*((volatile Word *) SA1101_p2v (_DACDR1)))
#define DACDR2 (*((volatile Word *) SA1101_p2v (_DACDR2)))
#define SKPCR_UCLKEn 0x01 /* USB Enable */
#define SKPCR_PCLKEn 0x02 /* PS/2 Enable */
#define SKPCR_ICLKEn 0x04 /* Interrupt Controller Enable */
#define SKPCR_VCLKEn 0x08 /* Video Controller Enable */
#define SKPCR_PICLKEn 0x10 /* parallel port Enable */
#define SKPCR_DCLKEn 0x20 /* DACs Enable */
#define SKPCR_nKPADEn 0x40 /* Multiplexer */
#define SKCDR_PLLMul Fld(7,0) /* PLL Multiplier */
#define SKCDR_VCLKEn Fld(2,7) /* Video controller clock divider */
#define SKDCR_BCLKEn (1<<9) /* BCLK Divider */
#define SKDCR_UTESTCLKEn (1<<10) /* Route USB clock during test mode */
#define SKDCR_DivRValue Fld(6,11) /* Input clock divider for PLL */
#define SKDCR_DivNValue Fld(5,17) /* Output clock divider for PLL */
#define SKDCR_PLLRSH Fld(3,22) /* PLL bandwidth control */
#define SKDCR_ChargePump (1<<25) /* Charge pump control */
#define SKDCR_ClkTestMode (1<<26) /* Clock output test mode */
#define SKDCR_ClkTestEn (1<<27) /* Test clock generator */
#define SKDCR_ClkJitterCntl Fld(3,28) /* video clock jitter compensation */
#define DACDR_DACCount Fld(8,0) /* Count value */
#define DACDR1_DACCount DACDR_DACCount
#define DACDR2_DACCount DACDR_DACCount
#endif /* LANGUAGE == C */
/*
* Parallel Port Interface
*
* Registers
* IEEE_Config IEEE mode selection and programmable attributes
* IEEE_Control Controls the states of IEEE port control outputs
* IEEE_Data Forward transfer data register
* IEEE_Addr Forward transfer address register
* IEEE_Status Port IO signal status register
* IEEE_IntStatus Port interrupts status register
* IEEE_FifoLevels Rx and Tx FIFO interrupt generation levels
* IEEE_InitTime Forward timeout counter initial value
* IEEE_TimerStatus Forward timeout counter current value
* IEEE_FifoReset Reset forward transfer FIFO
* IEEE_ReloadValue Counter reload value
* IEEE_TestControl Control testmode
* IEEE_TestDataIn Test data register
* IEEE_TestDataInEn Enable test data
* IEEE_TestCtrlIn Test control signals
* IEEE_TestCtrlInEn Enable test control signals
* IEEE_TestDataStat Current data bus value
*
*/
/*
* The control registers are defined as offsets from a base address
*/
#define _IEEE( x ) _SA1101( (x) + __PARALLEL_PORT )
#define _IEEE_Config _IEEE( 0x0000 )
#define _IEEE_Control _IEEE( 0x0400 )
#define _IEEE_Data _IEEE( 0x4000 )
#define _IEEE_Addr _IEEE( 0x0800 )
#define _IEEE_Status _IEEE( 0x0c00 )
#define _IEEE_IntStatus _IEEE( 0x1000 )
#define _IEEE_FifoLevels _IEEE( 0x1400 )
#define _IEEE_InitTime _IEEE( 0x1800 )
#define _IEEE_TimerStatus _IEEE( 0x1c00 )
#define _IEEE_FifoReset _IEEE( 0x2000 )
#define _IEEE_ReloadValue _IEEE( 0x3c00 )
#define _IEEE_TestControl _IEEE( 0x2400 )
#define _IEEE_TestDataIn _IEEE( 0x2800 )
#define _IEEE_TestDataInEn _IEEE( 0x2c00 )
#define _IEEE_TestCtrlIn _IEEE( 0x3000 )
#define _IEEE_TestCtrlInEn _IEEE( 0x3400 )
#define _IEEE_TestDataStat _IEEE( 0x3800 )
#if LANGUAGE == C
#define IEEE_Config (*((volatile Word *) SA1101_p2v (_IEEE_Config)))
#define IEEE_Control (*((volatile Word *) SA1101_p2v (_IEEE_Control)))
#define IEEE_Data (*((volatile Word *) SA1101_p2v (_IEEE_Data)))
#define IEEE_Addr (*((volatile Word *) SA1101_p2v (_IEEE_Addr)))
#define IEEE_Status (*((volatile Word *) SA1101_p2v (_IEEE_Status)))
#define IEEE_IntStatus (*((volatile Word *) SA1101_p2v (_IEEE_IntStatus)))
#define IEEE_FifoLevels (*((volatile Word *) SA1101_p2v (_IEEE_FifoLevels)))
#define IEEE_InitTime (*((volatile Word *) SA1101_p2v (_IEEE_InitTime)))
#define IEEE_TimerStatus (*((volatile Word *) SA1101_p2v (_IEEE_TimerStatus)))
#define IEEE_FifoReset (*((volatile Word *) SA1101_p2v (_IEEE_FifoReset)))
#define IEEE_ReloadValue (*((volatile Word *) SA1101_p2v (_IEEE_ReloadValue)))
#define IEEE_TestControl (*((volatile Word *) SA1101_p2v (_IEEE_TestControl)))
#define IEEE_TestDataIn (*((volatile Word *) SA1101_p2v (_IEEE_TestDataIn)))
#define IEEE_TestDataInEn (*((volatile Word *) SA1101_p2v (_IEEE_TestDataInEn)))
#define IEEE_TestCtrlIn (*((volatile Word *) SA1101_p2v (_IEEE_TestCtrlIn)))
#define IEEE_TestCtrlInEn (*((volatile Word *) SA1101_p2v (_IEEE_TestCtrlInEn)))
#define IEEE_TestDataStat (*((volatile Word *) SA1101_p2v (_IEEE_TestDataStat)))
#define IEEE_Config_M Fld(3,0) /* Mode select */
#define IEEE_Config_D 0x04 /* FIFO access enable */
#define IEEE_Config_B 0x08 /* 9-bit word enable */
#define IEEE_Config_T 0x10 /* Data transfer enable */
#define IEEE_Config_A 0x20 /* Data transfer direction */
#define IEEE_Config_E 0x40 /* Timer enable */
#define IEEE_Control_A 0x08 /* AutoFd output */
#define IEEE_Control_E 0x04 /* Selectin output */
#define IEEE_Control_T 0x02 /* Strobe output */
#define IEEE_Control_I 0x01 /* Port init output */
#define IEEE_Data_C (1<<31) /* Byte count */
#define IEEE_Data_Db Fld(9,16) /* Data byte 2 */
#define IEEE_Data_Da Fld(9,0) /* Data byte 1 */
#define IEEE_Addr_A Fld(8,0) /* forward address transfer byte */
#define IEEE_Status_A 0x0100 /* nAutoFd port output status */
#define IEEE_Status_E 0x0080 /* nSelectIn port output status */
#define IEEE_Status_T 0x0040 /* nStrobe port output status */
#define IEEE_Status_I 0x0020 /* nInit port output status */
#define IEEE_Status_B 0x0010 /* Busy port inout status */
#define IEEE_Status_S 0x0008 /* Select port input status */
#define IEEE_Status_K 0x0004 /* nAck port input status */
#define IEEE_Status_F 0x0002 /* nFault port input status */
#define IEEE_Status_R 0x0001 /* pError port input status */
#define IEEE_IntStatus_IntReqDat 0x0100
#define IEEE_IntStatus_IntReqEmp 0x0080
#define IEEE_IntStatus_IntReqInt 0x0040
#define IEEE_IntStatus_IntReqRav 0x0020
#define IEEE_IntStatus_IntReqTim 0x0010
#define IEEE_IntStatus_RevAddrComp 0x0008
#define IEEE_IntStatus_RevDataComp 0x0004
#define IEEE_IntStatus_FwdAddrComp 0x0002
#define IEEE_IntStatus_FwdDataComp 0x0001
#define IEEE_FifoLevels_RevFifoLevel 2
#define IEEE_FifoLevels_FwdFifoLevel 1
#define IEEE_InitTime_TimValInit Fld(22,0)
#define IEEE_TimerStatus_TimValStat Fld(22,0)
#define IEEE_ReloadValue_Reload Fld(4,0)
#define IEEE_TestControl_RegClk 0x04
#define IEEE_TestControl_ClockSelect Fld(2,1)
#define IEEE_TestControl_TimerTestModeEn 0x01
#define IEEE_TestCtrlIn_PError 0x10
#define IEEE_TestCtrlIn_nFault 0x08
#define IEEE_TestCtrlIn_nAck 0x04
#define IEEE_TestCtrlIn_PSel 0x02
#define IEEE_TestCtrlIn_Busy 0x01
#endif /* LANGUAGE == C */
/*
* VGA Controller
*
* Registers
* VideoControl Video Control Register
* VgaTiming0 VGA Timing Register 0
* VgaTiming1 VGA Timing Register 1
* VgaTiming2 VGA Timing Register 2
* VgaTiming3 VGA Timing Register 3
* VgaBorder VGA Border Color Register
* VgaDBAR VGADMA Base Address Register
* VgaDCAR VGADMA Channel Current Address Register
* VgaStatus VGA Status Register
* VgaInterruptMask VGA Interrupt Mask Register
* VgaPalette VGA Palette Registers
* DacControl DAC Control Register
* VgaTest VGA Controller Test Register
*/
#define _VGA( x ) _SA1101( ( x ) + __VGA_CONTROL )
#define _VideoControl _VGA( 0x0000 )
#define _VgaTiming0 _VGA( 0x0400 )
#define _VgaTiming1 _VGA( 0x0800 )
#define _VgaTiming2 _VGA( 0x0c00 )
#define _VgaTiming3 _VGA( 0x1000 )
#define _VgaBorder _VGA( 0x1400 )
#define _VgaDBAR _VGA( 0x1800 )
#define _VgaDCAR _VGA( 0x1c00 )
#define _VgaStatus _VGA( 0x2000 )
#define _VgaInterruptMask _VGA( 0x2400 )
#define _VgaPalette _VGA( 0x40000 )
#define _DacControl _VGA( 0x3000 )
#define _VgaTest _VGA( 0x2c00 )
#if (LANGUAGE == C)
#define VideoControl (*((volatile Word *) SA1101_p2v (_VideoControl)))
#define VgaTiming0 (*((volatile Word *) SA1101_p2v (_VgaTiming0)))
#define VgaTiming1 (*((volatile Word *) SA1101_p2v (_VgaTiming1)))
#define VgaTiming2 (*((volatile Word *) SA1101_p2v (_VgaTiming2)))
#define VgaTiming3 (*((volatile Word *) SA1101_p2v (_VgaTiming3)))
#define VgaBorder (*((volatile Word *) SA1101_p2v (_VgaBorder)))
#define VgaDBAR (*((volatile Word *) SA1101_p2v (_VgaDBAR)))
#define VgaDCAR (*((volatile Word *) SA1101_p2v (_VgaDCAR)))
#define VgaStatus (*((volatile Word *) SA1101_p2v (_VgaStatus)))
#define VgaInterruptMask (*((volatile Word *) SA1101_p2v (_VgaInterruptMask)))
#define VgaPalette (*((volatile Word *) SA1101_p2v (_VgaPalette)))
#define DacControl (*((volatile Word *) SA1101_p2v (_DacControl)))
#define VgaTest (*((volatile Word *) SA1101_p2v (_VgaTest)))
#define VideoControl_VgaEn 0x00000000
#define VideoControl_BGR 0x00000001
#define VideoControl_VCompVal Fld(2,2)
#define VideoControl_VgaReq Fld(4,4)
#define VideoControl_VBurstL Fld(4,8)
#define VideoControl_VMode (1<<12)
#define VideoControl_PalRead (1<<13)
#define VgaTiming0_PPL Fld(6,2)
#define VgaTiming0_HSW Fld(8,8)
#define VgaTiming0_HFP Fld(8,16)
#define VgaTiming0_HBP Fld(8,24)
#define VgaTiming1_LPS Fld(10,0)
#define VgaTiming1_VSW Fld(6,10)
#define VgaTiming1_VFP Fld(8,16)
#define VgaTiming1_VBP Fld(8,24)
#define VgaTiming2_IVS 0x01
#define VgaTiming2_IHS 0x02
#define VgaTiming2_CVS 0x04
#define VgaTiming2_CHS 0x08
#define VgaTiming3_HBS Fld(8,0)
#define VgaTiming3_HBE Fld(8,8)
#define VgaTiming3_VBS Fld(8,16)
#define VgaTiming3_VBE Fld(8,24)
#define VgaBorder_BCOL Fld(24,0)
#define VgaStatus_VFUF 0x01
#define VgaStatus_VNext 0x02
#define VgaStatus_VComp 0x04
#define VgaInterruptMask_VFUFMask 0x00
#define VgaInterruptMask_VNextMask 0x01
#define VgaInterruptMask_VCompMask 0x02
#define VgaPalette_R Fld(8,0)
#define VgaPalette_G Fld(8,8)
#define VgaPalette_B Fld(8,16)
#define DacControl_DACON 0x0001
#define DacControl_COMPON 0x0002
#define DacControl_PEDON 0x0004
#define DacControl_RTrim Fld(5,4)
#define DacControl_GTrim Fld(5,9)
#define DacControl_BTrim Fld(5,14)
#define VgaTest_TDAC 0x00
#define VgaTest_Datatest Fld(4,1)
#define VgaTest_DACTESTDAC 0x10
#define VgaTest_DACTESTOUT Fld(3,5)
#endif /* LANGUAGE == C */
/*
* USB Host Interface Controller
*
* Registers
* Revision
* Control
* CommandStatus
* InterruptStatus
* InterruptEnable
* HCCA
* PeriodCurrentED
* ControlHeadED
* BulkHeadED
* BulkCurrentED
* DoneHead
* FmInterval
* FmRemaining
* FmNumber
* PeriodicStart
* LSThreshold
* RhDescriptorA
* RhDescriptorB
* RhStatus
* RhPortStatus
* USBStatus
* USBReset
* USTAR
* USWER
* USRFR
* USNFR
* USTCSR
* USSR
*
*/
#define _USB( x ) _SA1101( ( x ) + __USB_CONTROL )
#define _Revision _USB( 0x0000 )
#define _Control _USB( 0x0888 )
#define _CommandStatus _USB( 0x0c00 )
#define _InterruptStatus _USB( 0x1000 )
#define _InterruptEnable _USB( 0x1400 )
#define _HCCA _USB( 0x1800 )
#define _PeriodCurrentED _USB( 0x1c00 )
#define _ControlHeadED _USB( 0x2000 )
#define _BulkHeadED _USB( 0x2800 )
#define _BulkCurrentED _USB( 0x2c00 )
#define _DoneHead _USB( 0x3000 )
#define _FmInterval _USB( 0x3400 )
#define _FmRemaining _USB( 0x3800 )
#define _FmNumber _USB( 0x3c00 )
#define _PeriodicStart _USB( 0x4000 )
#define _LSThreshold _USB( 0x4400 )
#define _RhDescriptorA _USB( 0x4800 )
#define _RhDescriptorB _USB( 0x4c00 )
#define _RhStatus _USB( 0x5000 )
#define _RhPortStatus _USB( 0x5400 )
#define _USBStatus _USB( 0x11800 )
#define _USBReset _USB( 0x11c00 )
#define _USTAR _USB( 0x10400 )
#define _USWER _USB( 0x10800 )
#define _USRFR _USB( 0x10c00 )
#define _USNFR _USB( 0x11000 )
#define _USTCSR _USB( 0x11400 )
#define _USSR _USB( 0x11800 )
#if (LANGUAGE == C)
#define Revision (*((volatile Word *) SA1101_p2v (_Revision)))
#define Control (*((volatile Word *) SA1101_p2v (_Control)))
#define CommandStatus (*((volatile Word *) SA1101_p2v (_CommandStatus)))
#define InterruptStatus (*((volatile Word *) SA1101_p2v (_InterruptStatus)))
#define InterruptEnable (*((volatile Word *) SA1101_p2v (_InterruptEnable)))
#define HCCA (*((volatile Word *) SA1101_p2v (_HCCA)))
#define PeriodCurrentED (*((volatile Word *) SA1101_p2v (_PeriodCurrentED)))
#define ControlHeadED (*((volatile Word *) SA1101_p2v (_ControlHeadED)))
#define BulkHeadED (*((volatile Word *) SA1101_p2v (_BulkHeadED)))
#define BulkCurrentED (*((volatile Word *) SA1101_p2v (_BulkCurrentED)))
#define DoneHead (*((volatile Word *) SA1101_p2v (_DoneHead)))
#define FmInterval (*((volatile Word *) SA1101_p2v (_FmInterval)))
#define FmRemaining (*((volatile Word *) SA1101_p2v (_FmRemaining)))
#define FmNumber (*((volatile Word *) SA1101_p2v (_FmNumber)))
#define PeriodicStart (*((volatile Word *) SA1101_p2v (_PeriodicStart)))
#define LSThreshold (*((volatile Word *) SA1101_p2v (_LSThreshold)))
#define RhDescriptorA (*((volatile Word *) SA1101_p2v (_RhDescriptorA)))
#define RhDescriptorB (*((volatile Word *) SA1101_p2v (_RhDescriptorB)))
#define RhStatus (*((volatile Word *) SA1101_p2v (_RhStatus)))
#define RhPortStatus (*((volatile Word *) SA1101_p2v (_RhPortStatus)))
#define USBStatus (*((volatile Word *) SA1101_p2v (_USBStatus)))
#define USBReset (*((volatile Word *) SA1101_p2v (_USBReset)))
#define USTAR (*((volatile Word *) SA1101_p2v (_USTAR)))
#define USWER (*((volatile Word *) SA1101_p2v (_USWER)))
#define USRFR (*((volatile Word *) SA1101_p2v (_USRFR)))
#define USNFR (*((volatile Word *) SA1101_p2v (_USNFR)))
#define USTCSR (*((volatile Word *) SA1101_p2v (_USTCSR)))
#define USSR (*((volatile Word *) SA1101_p2v (_USSR)))
#define USBStatus_IrqHciRmtWkp (1<<7)
#define USBStatus_IrqHciBuffAcc (1<<8)
#define USBStatus_nIrqHciM (1<<9)
#define USBStatus_nHciMFClr (1<<10)
#define USBReset_ForceIfReset 0x01
#define USBReset_ForceHcReset 0x02
#define USBReset_ClkGenReset 0x04
#define USTCR_RdBstCntrl Fld(3,0)
#define USTCR_ByteEnable Fld(4,3)
#define USTCR_WriteEn (1<<7)
#define USTCR_FifoCir (1<<8)
#define USTCR_TestXferSel (1<<9)
#define USTCR_FifoCirAtEnd (1<<10)
#define USTCR_nSimScaleDownClk (1<<11)
#define USSR_nAppMDEmpty 0x01
#define USSR_nAppMDFirst 0x02
#define USSR_nAppMDLast 0x04
#define USSR_nAppMDFull 0x08
#define USSR_nAppMAFull 0x10
#define USSR_XferReq 0x20
#define USSR_XferEnd 0x40
#endif /* LANGUAGE == C */
/*
* Interrupt Controller
*
* Registers
* INTTEST0 Test register 0
* INTTEST1 Test register 1
* INTENABLE0 Interrupt Enable register 0
* INTENABLE1 Interrupt Enable register 1
* INTPOL0 Interrupt Polarity selection 0
* INTPOL1 Interrupt Polarity selection 1
* INTTSTSEL Interrupt source selection
* INTSTATCLR0 Interrupt Status 0
* INTSTATCLR1 Interrupt Status 1
* INTSET0 Interrupt Set 0
* INTSET1 Interrupt Set 1
*/
#define _INT( x ) _SA1101( ( x ) + __INTERRUPT_CONTROL)
#define _INTTEST0 _INT( 0x1000 )
#define _INTTEST1 _INT( 0x1400 )
#define _INTENABLE0 _INT( 0x2000 )
#define _INTENABLE1 _INT( 0x2400 )
#define _INTPOL0 _INT( 0x3000 )
#define _INTPOL1 _INT( 0x3400 )
#define _INTTSTSEL _INT( 0x5000 )
#define _INTSTATCLR0 _INT( 0x6000 )
#define _INTSTATCLR1 _INT( 0x6400 )
#define _INTSET0 _INT( 0x7000 )
#define _INTSET1 _INT( 0x7400 )
#if ( LANGUAGE == C )
#define INTTEST0 (*((volatile Word *) SA1101_p2v (_INTTEST0)))
#define INTTEST1 (*((volatile Word *) SA1101_p2v (_INTTEST1)))
#define INTENABLE0 (*((volatile Word *) SA1101_p2v (_INTENABLE0)))
#define INTENABLE1 (*((volatile Word *) SA1101_p2v (_INTENABLE1)))
#define INTPOL0 (*((volatile Word *) SA1101_p2v (_INTPOL0)))
#define INTPOL1 (*((volatile Word *) SA1101_p2v (_INTPOL1)))
#define INTTSTSEL (*((volatile Word *) SA1101_p2v (_INTTSTSEL)))
#define INTSTATCLR0 (*((volatile Word *) SA1101_p2v (_INTSTATCLR0)))
#define INTSTATCLR1 (*((volatile Word *) SA1101_p2v (_INTSTATCLR1)))
#define INTSET0 (*((volatile Word *) SA1101_p2v (_INTSET0)))
#define INTSET1 (*((volatile Word *) SA1101_p2v (_INTSET1)))
#endif /* LANGUAGE == C */
/*
* PS/2 Trackpad and Mouse Interfaces
*
* Registers (prefix kbd applies to trackpad interface, mse to mouse)
* KBDCR Control Register
* KBDSTAT Status Register
* KBDDATA Transmit/Receive Data register
* KBDCLKDIV Clock Division Register
* KBDPRECNT Clock Precount Register
* KBDTEST1 Test register 1
* KBDTEST2 Test register 2
* KBDTEST3 Test register 3
* KBDTEST4 Test register 4
* MSECR
* MSESTAT
* MSEDATA
* MSECLKDIV
* MSEPRECNT
* MSETEST1
* MSETEST2
* MSETEST3
* MSETEST4
*
*/
#define _KBD( x ) _SA1101( ( x ) + __TRACK_INTERFACE )
#define _MSE( x ) _SA1101( ( x ) + __MOUSE_INTERFACE )
#define _KBDCR _KBD( 0x0000 )
#define _KBDSTAT _KBD( 0x0400 )
#define _KBDDATA _KBD( 0x0800 )
#define _KBDCLKDIV _KBD( 0x0c00 )
#define _KBDPRECNT _KBD( 0x1000 )
#define _KBDTEST1 _KBD( 0x2000 )
#define _KBDTEST2 _KBD( 0x2400 )
#define _KBDTEST3 _KBD( 0x2800 )
#define _KBDTEST4 _KBD( 0x2c00 )
#define _MSECR _MSE( 0x0000 )
#define _MSESTAT _MSE( 0x0400 )
#define _MSEDATA _MSE( 0x0800 )
#define _MSECLKDIV _MSE( 0x0c00 )
#define _MSEPRECNT _MSE( 0x1000 )
#define _MSETEST1 _MSE( 0x2000 )
#define _MSETEST2 _MSE( 0x2400 )
#define _MSETEST3 _MSE( 0x2800 )
#define _MSETEST4 _MSE( 0x2c00 )
#if ( LANGUAGE == C )
#define KBDCR (*((volatile Word *) SA1101_p2v (_KBDCR)))
#define KBDSTAT (*((volatile Word *) SA1101_p2v (_KBDSTAT)))
#define KBDDATA (*((volatile Word *) SA1101_p2v (_KBDDATA)))
#define KBDCLKDIV (*((volatile Word *) SA1101_p2v (_KBDCLKDIV)))
#define KBDPRECNT (*((volatile Word *) SA1101_p2v (_KBDPRECNT)))
#define KBDTEST1 (*((volatile Word *) SA1101_p2v (_KBDTEST1)))
#define KBDTEST2 (*((volatile Word *) SA1101_p2v (_KBDTEST2)))
#define KBDTEST3 (*((volatile Word *) SA1101_p2v (_KBDTEST3)))
#define KBDTEST4 (*((volatile Word *) SA1101_p2v (_KBDTEST4)))
#define MSECR (*((volatile Word *) SA1101_p2v (_MSECR)))
#define MSESTAT (*((volatile Word *) SA1101_p2v (_MSESTAT)))
#define MSEDATA (*((volatile Word *) SA1101_p2v (_MSEDATA)))
#define MSECLKDIV (*((volatile Word *) SA1101_p2v (_MSECLKDIV)))
#define MSEPRECNT (*((volatile Word *) SA1101_p2v (_MSEPRECNT)))
#define MSETEST1 (*((volatile Word *) SA1101_p2v (_MSETEST1)))
#define MSETEST2 (*((volatile Word *) SA1101_p2v (_MSETEST2)))
#define MSETEST3 (*((volatile Word *) SA1101_p2v (_MSETEST3)))
#define MSETEST4 (*((volatile Word *) SA1101_p2v (_MSETEST4)))
#define KBDCR_ENA 0x08
#define KBDCR_FKD 0x02
#define KBDCR_FKC 0x01
#define KBDSTAT_TXE 0x80
#define KBDSTAT_TXB 0x40
#define KBDSTAT_RXF 0x20
#define KBDSTAT_RXB 0x10
#define KBDSTAT_ENA 0x08
#define KBDSTAT_RXP 0x04
#define KBDSTAT_KBD 0x02
#define KBDSTAT_KBC 0x01
#define KBDCLKDIV_DivVal Fld(4,0)
#define MSECR_ENA 0x08
#define MSECR_FKD 0x02
#define MSECR_FKC 0x01
#define MSESTAT_TXE 0x80
#define MSESTAT_TXB 0x40
#define MSESTAT_RXF 0x20
#define MSESTAT_RXB 0x10
#define MSESTAT_ENA 0x08
#define MSESTAT_RXP 0x04
#define MSESTAT_MSD 0x02
#define MSESTAT_MSC 0x01
#define MSECLKDIV_DivVal Fld(4,0)
#define KBDTEST1_CD 0x80
#define KBDTEST1_RC1 0x40
#define KBDTEST1_MC 0x20
#define KBDTEST1_C Fld(2,3)
#define KBDTEST1_T2 0x40
#define KBDTEST1_T1 0x20
#define KBDTEST1_T0 0x10
#define KBDTEST2_TICBnRES 0x08
#define KBDTEST2_RKC 0x04
#define KBDTEST2_RKD 0x02
#define KBDTEST2_SEL 0x01
#define KBDTEST3_ms_16 0x80
#define KBDTEST3_us_64 0x40
#define KBDTEST3_us_16 0x20
#define KBDTEST3_DIV8 0x10
#define KBDTEST3_DIn 0x08
#define KBDTEST3_CIn 0x04
#define KBDTEST3_KD 0x02
#define KBDTEST3_KC 0x01
#define KBDTEST4_BC12 0x80
#define KBDTEST4_BC11 0x40
#define KBDTEST4_TRES 0x20
#define KBDTEST4_CLKOE 0x10
#define KBDTEST4_CRES 0x08
#define KBDTEST4_RXB 0x04
#define KBDTEST4_TXB 0x02
#define KBDTEST4_SRX 0x01
#define MSETEST1_CD 0x80
#define MSETEST1_RC1 0x40
#define MSETEST1_MC 0x20
#define MSETEST1_C Fld(2,3)
#define MSETEST1_T2 0x40
#define MSETEST1_T1 0x20
#define MSETEST1_T0 0x10
#define MSETEST2_TICBnRES 0x08
#define MSETEST2_RKC 0x04
#define MSETEST2_RKD 0x02
#define MSETEST2_SEL 0x01
#define MSETEST3_ms_16 0x80
#define MSETEST3_us_64 0x40
#define MSETEST3_us_16 0x20
#define MSETEST3_DIV8 0x10
#define MSETEST3_DIn 0x08
#define MSETEST3_CIn 0x04
#define MSETEST3_KD 0x02
#define MSETEST3_KC 0x01
#define MSETEST4_BC12 0x80
#define MSETEST4_BC11 0x40
#define MSETEST4_TRES 0x20
#define MSETEST4_CLKOE 0x10
#define MSETEST4_CRES 0x08
#define MSETEST4_RXB 0x04
#define MSETEST4_TXB 0x02
#define MSETEST4_SRX 0x01
#endif /* LANGUAGE == C */
/*
* General-Purpose I/O Interface
*
* Registers
* PADWR Port A Data Write Register
* PBDWR Port B Data Write Register
* PADRR Port A Data Read Register
* PBDRR Port B Data Read Register
* PADDR Port A Data Direction Register
* PBDDR Port B Data Direction Register
* PASSR Port A Sleep State Register
* PBSSR Port B Sleep State Register
*
*/
#define _PIO( x ) _SA1101( ( x ) + __GPIO_INTERFACE )
#define _PADWR _PIO( 0x0000 )
#define _PBDWR _PIO( 0x0400 )
#define _PADRR _PIO( 0x0000 )
#define _PBDRR _PIO( 0x0400 )
#define _PADDR _PIO( 0x0800 )
#define _PBDDR _PIO( 0x0c00 )
#define _PASSR _PIO( 0x1000 )
#define _PBSSR _PIO( 0x1400 )
#if ( LANGUAGE == C )
#define PADWR (*((volatile Word *) SA1101_p2v (_PADWR)))
#define PBDWR (*((volatile Word *) SA1101_p2v (_PBDWR)))
#define PADRR (*((volatile Word *) SA1101_p2v (_PADRR)))
#define PBDRR (*((volatile Word *) SA1101_p2v (_PBDRR)))
#define PADDR (*((volatile Word *) SA1101_p2v (_PADDR)))
#define PBDDR (*((volatile Word *) SA1101_p2v (_PBDDR)))
#define PASSR (*((volatile Word *) SA1101_p2v (_PASSR)))
#define PBSSR (*((volatile Word *) SA1101_p2v (_PBSSR)))
#endif
/*
* Keypad Interface
*
* Registers
* PXDWR
* PXDRR
* PYDWR
* PYDRR
*
*/
#define _KEYPAD( x ) _SA1101( ( x ) + __KEYPAD_INTERFACE )
#define _PXDWR _KEYPAD( 0x0000 )
#define _PXDRR _KEYPAD( 0x0000 )
#define _PYDWR _KEYPAD( 0x0400 )
#define _PYDRR _KEYPAD( 0x0400 )
#if ( LANGUAGE == C )
#define PXDWR (*((volatile Word *) SA1101_p2v (_PXDWR)))
#define PXDRR (*((volatile Word *) SA1101_p2v (_PXDRR)))
#define PYDWR (*((volatile Word *) SA1101_p2v (_PYDWR)))
#define PYDRR (*((volatile Word *) SA1101_p2v (_PYDRR)))
#endif
/*
* PCMCIA Interface
*
* Registers
* PCSR Status Register
* PCCR Control Register
* PCSSR Sleep State Register
*
*/
#define _CARD( x ) _SA1101( ( x ) + __PCMCIA_INTERFACE )
#define _PCSR _CARD( 0x0000 )
#define _PCCR _CARD( 0x0400 )
#define _PCSSR _CARD( 0x0800 )
#if ( LANGUAGE == C )
#define PCSR (*((volatile Word *) SA1101_p2v (_PCSR)))
#define PCCR (*((volatile Word *) SA1101_p2v (_PCCR)))
#define PCSSR (*((volatile Word *) SA1101_p2v (_PCSSR)))
#define PCSR_S0_ready 0x0001
#define PCSR_S1_ready 0x0002
#define PCSR_S0_detected 0x0004
#define PCSR_S1_detected 0x0008
#define PCSR_S0_VS1 0x0010
#define PCSR_S0_VS2 0x0020
#define PCSR_S1_VS1 0x0040
#define PCSR_S1_VS2 0x0080
#define PCSR_S0_WP 0x0100
#define PCSR_S1_WP 0x0200
#define PCSR_S0_BVD1_nSTSCHG 0x0400
#define PCSR_S0_BVD2_nSPKR 0x0800
#define PCSR_S1_BVD1_nSTSCHG 0x1000
#define PCSR_S1_BVD2_nSPKR 0x2000
#define PCCR_S0_VPP0 0x0001
#define PCCR_S0_VPP1 0x0002
#define PCCR_S0_VCC0 0x0004
#define PCCR_S0_VCC1 0x0008
#define PCCR_S1_VPP0 0x0010
#define PCCR_S1_VPP1 0x0020
#define PCCR_S1_VCC0 0x0040
#define PCCR_S1_VCC1 0x0080
#define PCCR_S0_reset 0x0100
#define PCCR_S1_reset 0x0200
#define PCCR_S0_float 0x0400
#define PCCR_S1_float 0x0800
#define PCSSR_S0_VCC0 0x0001
#define PCSSR_S0_VCC1 0x0002
#define PCSSR_S0_VPP0 0x0004
#define PCSSR_S0_VPP1 0x0008
#define PCSSR_S0_control 0x0010
#define PCSSR_S1_VCC0 0x0020
#define PCSSR_S1_VCC1 0x0040
#define PCSSR_S1_VPP0 0x0080
#define PCSSR_S1_VPP1 0x0100
#define PCSSR_S1_control 0x0200
#endif
#undef C
#undef Assembly

4
arch/arm/mach-sa1100/include/mach/hardware.h
View File

@ -56,8 +56,4 @@ static inline unsigned long get_clock_tick_rate(void)
#include "SA-1100.h"
#ifdef CONFIG_SA1101
#include "SA-1101.h"
#endif
#endif /* _ASM_ARCH_HARDWARE_H */

8
arch/arm/mm/Kconfig
View File

@ -991,7 +991,7 @@ config CACHE_TAUROS2
config CACHE_UNIPHIER
bool "Enable the UniPhier outer cache controller"
depends on ARCH_UNIPHIER
default y
select ARM_L1_CACHE_SHIFT_7
select OUTER_CACHE
select OUTER_CACHE_SYNC
help
@ -1012,8 +1012,14 @@ config ARM_L1_CACHE_SHIFT_6
help
Setting ARM L1 cache line size to 64 Bytes.
config ARM_L1_CACHE_SHIFT_7
bool
help
Setting ARM L1 cache line size to 128 Bytes.
config ARM_L1_CACHE_SHIFT
int
default 7 if ARM_L1_CACHE_SHIFT_7
default 6 if ARM_L1_CACHE_SHIFT_6
default 5

34
arch/arm/mm/abort-lv4t.S
View File

@ -7,7 +7,7 @@
* : r4 = aborted context pc
* : r5 = aborted context psr
*
* Returns : r4-r5, r10-r11, r13 preserved
* Returns : r4-r5, r9-r11, r13 preserved
*
* Purpose : obtain information about current aborted instruction.
* Note: we read user space. This means we might cause a data
@ -48,7 +48,10 @@ ENTRY(v4t_late_abort)
/* c */ b do_DataAbort @ ldc rd, [rn], #m @ Same as ldr rd, [rn], #m
/* d */ b do_DataAbort @ ldc rd, [rn, #m]
/* e */ b .data_unknown
/* f */
/* f */ b .data_unknown
.data_unknown_r9:
ldr r9, [sp], #4
.data_unknown: @ Part of jumptable
mov r0, r4
mov r1, r8
@ -57,6 +60,7 @@ ENTRY(v4t_late_abort)
.data_arm_ldmstm:
tst r8, #1 << 21 @ check writeback bit
beq do_DataAbort @ no writeback -> no fixup
str r9, [sp, #-4]!
mov r7, #0x11
orr r7, r7, #0x1100
and r6, r8, r7
@ -75,12 +79,14 @@ ENTRY(v4t_late_abort)
subne r7, r7, r6, lsl #2 @ Undo increment
addeq r7, r7, r6, lsl #2 @ Undo decrement
str r7, [r2, r9, lsr #14] @ Put register 'Rn'
ldr r9, [sp], #4
b do_DataAbort
.data_arm_lateldrhpre:
tst r8, #1 << 21 @ Check writeback bit
beq do_DataAbort @ No writeback -> no fixup
.data_arm_lateldrhpost:
str r9, [sp, #-4]!
and r9, r8, #0x00f @ get Rm / low nibble of immediate value
tst r8, #1 << 22 @ if (immediate offset)
andne r6, r8, #0xf00 @ { immediate high nibble
@ -93,6 +99,7 @@ ENTRY(v4t_late_abort)
subne r7, r7, r6 @ Undo incrmenet
addeq r7, r7, r6 @ Undo decrement
str r7, [r2, r9, lsr #14] @ Put register 'Rn'
ldr r9, [sp], #4
b do_DataAbort
.data_arm_lateldrpreconst:
@ -101,12 +108,14 @@ ENTRY(v4t_late_abort)
.data_arm_lateldrpostconst:
movs r6, r8, lsl #20 @ Get offset
beq do_DataAbort @ zero -> no fixup
str r9, [sp, #-4]!
and r9, r8, #15 << 16 @ Extract 'n' from instruction
ldr r7, [r2, r9, lsr #14] @ Get register 'Rn'
tst r8, #1 << 23 @ Check U bit
subne r7, r7, r6, lsr #20 @ Undo increment
addeq r7, r7, r6, lsr #20 @ Undo decrement
str r7, [r2, r9, lsr #14] @ Put register 'Rn'
ldr r9, [sp], #4
b do_DataAbort
.data_arm_lateldrprereg:
@ -115,6 +124,7 @@ ENTRY(v4t_late_abort)
.data_arm_lateldrpostreg:
and r7, r8, #15 @ Extract 'm' from instruction
ldr r6, [r2, r7, lsl #2] @ Get register 'Rm'
str r9, [sp, #-4]!
mov r9, r8, lsr #7 @ get shift count
ands r9, r9, #31
and r7, r8, #0x70 @ get shift type
@ -126,33 +136,33 @@ ENTRY(v4t_late_abort)
b .data_arm_apply_r6_and_rn
b .data_arm_apply_r6_and_rn @ 1: LSL #0
nop
b .data_unknown @ 2: MUL?
b .data_unknown_r9 @ 2: MUL?
nop
b .data_unknown @ 3: MUL?
b .data_unknown_r9 @ 3: MUL?
nop
mov r6, r6, lsr r9 @ 4: LSR #!0
b .data_arm_apply_r6_and_rn
mov r6, r6, lsr #32 @ 5: LSR #32
b .data_arm_apply_r6_and_rn
b .data_unknown @ 6: MUL?
b .data_unknown_r9 @ 6: MUL?
nop
b .data_unknown @ 7: MUL?
b .data_unknown_r9 @ 7: MUL?
nop
mov r6, r6, asr r9 @ 8: ASR #!0
b .data_arm_apply_r6_and_rn
mov r6, r6, asr #32 @ 9: ASR #32
b .data_arm_apply_r6_and_rn
b .data_unknown @ A: MUL?
b .data_unknown_r9 @ A: MUL?
nop
b .data_unknown @ B: MUL?
b .data_unknown_r9 @ B: MUL?
nop
mov r6, r6, ror r9 @ C: ROR #!0
b .data_arm_apply_r6_and_rn
mov r6, r6, rrx @ D: RRX
b .data_arm_apply_r6_and_rn
b .data_unknown @ E: MUL?
b .data_unknown_r9 @ E: MUL?
nop
b .data_unknown @ F: MUL?
b .data_unknown_r9 @ F: MUL?
.data_thumb_abort:
ldrh r8, [r4] @ read instruction
@ -190,6 +200,7 @@ ENTRY(v4t_late_abort)
.data_thumb_pushpop:
tst r8, #1 << 10
beq .data_unknown
str r9, [sp, #-4]!
and r6, r8, #0x55 @ hweight8(r8) + R bit
and r9, r8, #0xaa
add r6, r6, r9, lsr #1
@ -204,9 +215,11 @@ ENTRY(v4t_late_abort)
addeq r7, r7, r6, lsl #2 @ increment SP if PUSH
subne r7, r7, r6, lsl #2 @ decrement SP if POP
str r7, [r2, #13 << 2]
ldr r9, [sp], #4
b do_DataAbort
.data_thumb_ldmstm:
str r9, [sp, #-4]!
and r6, r8, #0x55 @ hweight8(r8)
and r9, r8, #0xaa
add r6, r6, r9, lsr #1
@ -219,4 +232,5 @@ ENTRY(v4t_late_abort)
and r6, r6, #15 @ number of regs to transfer
sub r7, r7, r6, lsl #2 @ always decrement
str r7, [r2, r9, lsr #6]
ldr r9, [sp], #4
b do_DataAbort

2
arch/arm/mm/dma-mapping.c
View File

@ -1167,7 +1167,7 @@ static int __init dma_debug_do_init(void)
dma_debug_init(PREALLOC_DMA_DEBUG_ENTRIES);
return 0;
}
fs_initcall(dma_debug_do_init);
core_initcall(dma_debug_do_init);
#ifdef CONFIG_ARM_DMA_USE_IOMMU

27
arch/arm/mm/pageattr.c
View File

@ -34,28 +34,29 @@ static int change_page_range(pte_t *ptep, pgtable_t token, unsigned long addr,
return 0;
}
static bool in_range(unsigned long start, unsigned long size,
unsigned long range_start, unsigned long range_end)
{
return start >= range_start && start < range_end &&
size <= range_end - start;
}
static int change_memory_common(unsigned long addr, int numpages,
pgprot_t set_mask, pgprot_t clear_mask)
{
unsigned long start = addr;
unsigned long size = PAGE_SIZE*numpages;
unsigned long end = start + size;
unsigned long start = addr & PAGE_MASK;
unsigned long end = PAGE_ALIGN(addr) + numpages * PAGE_SIZE;
unsigned long size = end - start;
int ret;
struct page_change_data data;
if (!IS_ALIGNED(addr, PAGE_SIZE)) {
start &= PAGE_MASK;
end = start + size;
WARN_ON_ONCE(1);
}
WARN_ON_ONCE(start != addr);
if (!numpages)
if (!size)
return 0;
if (start < MODULES_VADDR || start >= MODULES_END)
return -EINVAL;
if (end < MODULES_VADDR || start >= MODULES_END)
if (!in_range(start, size, MODULES_VADDR, MODULES_END) &&
!in_range(start, size, VMALLOC_START, VMALLOC_END))
return -EINVAL;
data.set_mask = set_mask;

2
arch/arm/mm/proc-v7m.S
View File

@ -96,7 +96,7 @@ ENTRY(cpu_cm7_proc_fin)
ret lr
ENDPROC(cpu_cm7_proc_fin)
.section ".text.init", #alloc, #execinstr
.section ".init.text", #alloc, #execinstr
__v7m_cm7_setup:
mov r8, #(V7M_SCB_CCR_DC | V7M_SCB_CCR_IC| V7M_SCB_CCR_BP)

516
arch/arm/tools/mach-types
View File

@ -16,7 +16,7 @@
# are merged into mainline or have been edited in the machine database
# within the last 12 months. References to machine_is_NAME() do not count!
#
# Last update: Fri Mar 22 17:24:50 2013
# Last update: Sun Oct 30 20:21:01 2016
#
# machine_is_xxx CONFIG_xxxx MACH_TYPE_xxx number
#
@ -152,7 +152,6 @@ colibri MACH_COLIBRI COLIBRI 729
gateway7001 MACH_GATEWAY7001 GATEWAY7001 731
pcm027 MACH_PCM027 PCM027 732
anubis MACH_ANUBIS ANUBIS 734
xboardgp8 MACH_XBOARDGP8 XBOARDGP8 742
akita MACH_AKITA AKITA 744
e330 MACH_E330 E330 753
nokia770 MACH_NOKIA770 NOKIA770 755
@ -393,7 +392,6 @@ anw6410 MACH_ANW6410 ANW6410 2183
imx27_visstrim_m10 MACH_IMX27_VISSTRIM_M10 IMX27_VISSTRIM_M10 2187
portuxg20 MACH_PORTUXG20 PORTUXG20 2191
smdkc110 MACH_SMDKC110 SMDKC110 2193
cabespresso MACH_CABESPRESSO CABESPRESSO 2194
omap3517evm MACH_OMAP3517EVM OMAP3517EVM 2200
netspace_v2 MACH_NETSPACE_V2 NETSPACE_V2 2201
netspace_max_v2 MACH_NETSPACE_MAX_V2 NETSPACE_MAX_V2 2202
@ -412,7 +410,6 @@ bigdisk MACH_BIGDISK BIGDISK 2283
at91sam9g20ek_2mmc MACH_AT91SAM9G20EK_2MMC AT91SAM9G20EK_2MMC 2288
bcmring MACH_BCMRING BCMRING 2289
mahimahi MACH_MAHIMAHI MAHIMAHI 2304
cerebric MACH_CEREBRIC CEREBRIC 2311
smdk6442 MACH_SMDK6442 SMDK6442 2324
openrd_base MACH_OPENRD_BASE OPENRD_BASE 2325
devkit8000 MACH_DEVKIT8000 DEVKIT8000 2330
@ -435,9 +432,7 @@ tnetv107x MACH_TNETV107X TNETV107X 2418
smdkv210 MACH_SMDKV210 SMDKV210 2456
omap_zoom3 MACH_OMAP_ZOOM3 OMAP_ZOOM3 2464
omap_3630sdp MACH_OMAP_3630SDP OMAP_3630SDP 2465
cybook2440 MACH_CYBOOK2440 CYBOOK2440 2466
smartq7 MACH_SMARTQ7 SMARTQ7 2479
watson_efm_plugin MACH_WATSON_EFM_PLUGIN WATSON_EFM_PLUGIN 2491
g4evm MACH_G4EVM G4EVM 2493
omapl138_hawkboard MACH_OMAPL138_HAWKBOARD OMAPL138_HAWKBOARD 2495
ts41x MACH_TS41X TS41X 2502
@ -472,7 +467,6 @@ igep0030 MACH_IGEP0030 IGEP0030 2717
sbc3530 MACH_SBC3530 SBC3530 2722
saarb MACH_SAARB SAARB 2727
harmony MACH_HARMONY HARMONY 2731
cybook_orizon MACH_CYBOOK_ORIZON CYBOOK_ORIZON 2733
msm7x30_fluid MACH_MSM7X30_FLUID MSM7X30_FLUID 2741
cm_t3517 MACH_CM_T3517 CM_T3517 2750
wbd222 MACH_WBD222 WBD222 2753
@ -490,6 +484,7 @@ eukrea_cpuimx51 MACH_EUKREA_CPUIMX51 EUKREA_CPUIMX51 2823
smdkc210 MACH_SMDKC210 SMDKC210 2838
t5325 MACH_T5325 T5325 2846
income MACH_INCOME INCOME 2849
meson MACH_MESON MESON 2853
goni MACH_GONI GONI 2862
bv07 MACH_BV07 BV07 2882
openrd_ultimate MACH_OPENRD_ULTIMATE OPENRD_ULTIMATE 2884
@ -523,9 +518,9 @@ prima2_evb MACH_PRIMA2_EVB PRIMA2_EVB 3103
paz00 MACH_PAZ00 PAZ00 3128
acmenetusfoxg20 MACH_ACMENETUSFOXG20 ACMENETUSFOXG20 3129
ag5evm MACH_AG5EVM AG5EVM 3189
ics_if_voip MACH_ICS_IF_VOIP ICS_IF_VOIP 3206
wlf_cragg_6410 MACH_WLF_CRAGG_6410 WLF_CRAGG_6410 3207
trimslice MACH_TRIMSLICE TRIMSLICE 3209
mackerel MACH_MACKEREL MACKEREL 3211
kaen MACH_KAEN KAEN 3217
nokia_rm680 MACH_NOKIA_RM680 NOKIA_RM680 3220
msm8960_sim MACH_MSM8960_SIM MSM8960_SIM 3230
@ -540,469 +535,66 @@ snowball MACH_SNOWBALL SNOWBALL 3363
xilinx_ep107 MACH_XILINX_EP107 XILINX_EP107 3378
nuri MACH_NURI NURI 3379
origen MACH_ORIGEN ORIGEN 3455
xarina MACH_XARINA XARINA 3476
nspire MACH_NSPIRE NSPIRE 3503
nokia_rm696 MACH_NOKIA_RM696 NOKIA_RM696 3522
mikrap_x168 MACH_MIKRAP_X168 MIKRAP_X168 3543
deto_macarm9 MACH_DETO_MACARM9 DETO_MACARM9 3568
m28evk MACH_M28EVK M28EVK 3613
kota2 MACH_KOTA2 KOTA2 3616
bonito MACH_BONITO BONITO 3623
omap3_egf MACH_OMAP3_EGF OMAP3_EGF 3637
smdk4212 MACH_SMDK4212 SMDK4212 3638
apx4devkit MACH_APX4DEVKIT APX4DEVKIT 3712
smdk4412 MACH_SMDK4412 SMDK4412 3765
marzen MACH_MARZEN MARZEN 3790
krome MACH_KROME KROME 3797
armadillo800eva MACH_ARMADILLO800EVA ARMADILLO800EVA 3863
mx53_umobo MACH_MX53_UMOBO MX53_UMOBO 3927
mt4 MACH_MT4 MT4 3981
empc_a500 MACH_EMPC_A500 EMPC_A500 3848
u8520 MACH_U8520 U8520 3990
chupacabra MACH_CHUPACABRA CHUPACABRA 4098
scorpion MACH_SCORPION SCORPION 4099
davinci_he_hmi10 MACH_DAVINCI_HE_HMI10 DAVINCI_HE_HMI10 4100
topkick MACH_TOPKICK TOPKICK 4101
m3_auguestrush MACH_M3_AUGUESTRUSH M3_AUGUESTRUSH 4102
ipc335x MACH_IPC335X IPC335X 4103
sun4i MACH_SUN4I SUN4I 4104
imx233_olinuxino MACH_IMX233_OLINUXINO IMX233_OLINUXINO 4105
k2_wl MACH_K2_WL K2_WL 4106
k2_ul MACH_K2_UL K2_UL 4107
k2_cl MACH_K2_CL K2_CL 4108
minbari_w MACH_MINBARI_W MINBARI_W 4109
minbari_m MACH_MINBARI_M MINBARI_M 4110
k035 MACH_K035 K035 4111
ariel MACH_ARIEL ARIEL 4112
arielsaarc MACH_ARIELSAARC ARIELSAARC 4113
arieldkb MACH_ARIELDKB ARIELDKB 4114
armadillo810 MACH_ARMADILLO810 ARMADILLO810 4115
tam335x MACH_TAM335X TAM335X 4116
grouper MACH_GROUPER GROUPER 4117
mpcsa21_9g20 MACH_MPCSA21_9G20 MPCSA21_9G20 4118
m6u_cpu MACH_M6U_CPU M6U_CPU 4119
ginkgo MACH_GINKGO GINKGO 4121
cgt_qmx6 MACH_CGT_QMX6 CGT_QMX6 4122
profpga MACH_PROFPGA PROFPGA 4123
acfx100oc MACH_ACFX100OC ACFX100OC 4124
acfx100nb MACH_ACFX100NB ACFX100NB 4125
capricorn MACH_CAPRICORN CAPRICORN 4126
pisces MACH_PISCES PISCES 4127
aries MACH_ARIES ARIES 4128
cancer MACH_CANCER CANCER 4129
leo MACH_LEO LEO 4130
virgo MACH_VIRGO VIRGO 4131
sagittarius MACH_SAGITTARIUS SAGITTARIUS 4132
devil MACH_DEVIL DEVIL 4133
ballantines MACH_BALLANTINES BALLANTINES 4134
omap3_procerusvpu MACH_OMAP3_PROCERUSVPU OMAP3_PROCERUSVPU 4135
my27 MACH_MY27 MY27 4136
sun6i MACH_SUN6I SUN6I 4137
sun5i MACH_SUN5I SUN5I 4138
mx512_mx MACH_MX512_MX MX512_MX 4139
kzm9g MACH_KZM9G KZM9G 4140
vdstbn MACH_VDSTBN VDSTBN 4141
cfa10036 MACH_CFA10036 CFA10036 4142
cfa10049 MACH_CFA10049 CFA10049 4143
pcm051 MACH_PCM051 PCM051 4144
vybrid_vf7xx MACH_VYBRID_VF7XX VYBRID_VF7XX 4145
vybrid_vf6xx MACH_VYBRID_VF6XX VYBRID_VF6XX 4146
vybrid_vf5xx MACH_VYBRID_VF5XX VYBRID_VF5XX 4147
vybrid_vf4xx MACH_VYBRID_VF4XX VYBRID_VF4XX 4148
aria_g25 MACH_ARIA_G25 ARIA_G25 4149
bcm21553 MACH_BCM21553 BCM21553 4150
smdk5410 MACH_SMDK5410 SMDK5410 4151
lpc18xx MACH_LPC18XX LPC18XX 4152
oratisparty MACH_ORATISPARTY ORATISPARTY 4153
qseven MACH_QSEVEN QSEVEN 4154
gmv_generic MACH_GMV_GENERIC GMV_GENERIC 4155
th_link_eth MACH_TH_LINK_ETH TH_LINK_ETH 4156
tn_muninn MACH_TN_MUNINN TN_MUNINN 4157
rampage MACH_RAMPAGE RAMPAGE 4158
visstrim_mv10 MACH_VISSTRIM_MV10 VISSTRIM_MV10 4159
mx28_wilma MACH_MX28_WILMA MX28_WILMA 4164
msm8625_ffa MACH_MSM8625_FFA MSM8625_FFA 4166
vpu101 MACH_VPU101 VPU101 4167
baileys MACH_BAILEYS BAILEYS 4169
familybox MACH_FAMILYBOX FAMILYBOX 4170
ensemble_mx35 MACH_ENSEMBLE_MX35 ENSEMBLE_MX35 4171
sc_sps_1 MACH_SC_SPS_1 SC_SPS_1 4172
ucsimply_sam9260 MACH_UCSIMPLY_SAM9260 UCSIMPLY_SAM9260 4173
unicorn MACH_UNICORN UNICORN 4174
m9g45a MACH_M9G45A M9G45A 4175
mtwebif MACH_MTWEBIF MTWEBIF 4176
playstone MACH_PLAYSTONE PLAYSTONE 4177
chelsea MACH_CHELSEA CHELSEA 4178
bayern MACH_BAYERN BAYERN 4179
mitwo MACH_MITWO MITWO 4180
mx25_noah MACH_MX25_NOAH MX25_NOAH 4181
stm_b2020 MACH_STM_B2020 STM_B2020 4182
annax_src MACH_ANNAX_SRC ANNAX_SRC 4183
ionics_stratus MACH_IONICS_STRATUS IONICS_STRATUS 4184
hugo MACH_HUGO HUGO 4185
em300 MACH_EM300 EM300 4186
mmp3_qseven MACH_MMP3_QSEVEN MMP3_QSEVEN 4187
bosphorus2 MACH_BOSPHORUS2 BOSPHORUS2 4188
tt2200 MACH_TT2200 TT2200 4189
ocelot3 MACH_OCELOT3 OCELOT3 4190
tek_cobra MACH_TEK_COBRA TEK_COBRA 4191
protou MACH_PROTOU PROTOU 4192
msm8625_evt MACH_MSM8625_EVT MSM8625_EVT 4193
mx53_sellwood MACH_MX53_SELLWOOD MX53_SELLWOOD 4194
somiq_am35 MACH_SOMIQ_AM35 SOMIQ_AM35 4195
somiq_am37 MACH_SOMIQ_AM37 SOMIQ_AM37 4196
k2_plc_cl MACH_K2_PLC_CL K2_PLC_CL 4197
tc2 MACH_TC2 TC2 4198
dulex_j MACH_DULEX_J DULEX_J 4199
stm_b2044 MACH_STM_B2044 STM_B2044 4200
deluxe_j MACH_DELUXE_J DELUXE_J 4201
mango2443 MACH_MANGO2443 MANGO2443 4202
cp2dcg MACH_CP2DCG CP2DCG 4203
cp2dtg MACH_CP2DTG CP2DTG 4204
cp2dug MACH_CP2DUG CP2DUG 4205
var_som_am33 MACH_VAR_SOM_AM33 VAR_SOM_AM33 4206
pepper MACH_PEPPER PEPPER 4207
mango2450 MACH_MANGO2450 MANGO2450 4208
valente_wx_c9 MACH_VALENTE_WX_C9 VALENTE_WX_C9 4209
minitv MACH_MINITV MINITV 4210
u8540 MACH_U8540 U8540 4211
iv_atlas_i_z7e MACH_IV_ATLAS_I_Z7E IV_ATLAS_I_Z7E 4212
mach_type_sky MACH_MACH_TYPE_SKY MACH_TYPE_SKY 4214
bluesky MACH_BLUESKY BLUESKY 4215
ngrouter MACH_NGROUTER NGROUTER 4216
mx53_denetim MACH_MX53_DENETIM MX53_DENETIM 4217
opal MACH_OPAL OPAL 4218
gnet_us3gref MACH_GNET_US3GREF GNET_US3GREF 4219
gnet_nc3g MACH_GNET_NC3G GNET_NC3G 4220
gnet_ge3g MACH_GNET_GE3G GNET_GE3G 4221
adp2 MACH_ADP2 ADP2 4222
tqma28 MACH_TQMA28 TQMA28 4223
kacom3 MACH_KACOM3 KACOM3 4224
rrhdemo MACH_RRHDEMO RRHDEMO 4225
protodug MACH_PROTODUG PROTODUG 4226
lago MACH_LAGO LAGO 4227
ktt30 MACH_KTT30 KTT30 4228
ts43xx MACH_TS43XX TS43XX 4229
mx6q_denso MACH_MX6Q_DENSO MX6Q_DENSO 4230
comsat_gsmumts8 MACH_COMSAT_GSMUMTS8 COMSAT_GSMUMTS8 4231
dreamx MACH_DREAMX DREAMX 4232
thunderstonem MACH_THUNDERSTONEM THUNDERSTONEM 4233
yoyopad MACH_YOYOPAD YOYOPAD 4234
yoyopatient MACH_YOYOPATIENT YOYOPATIENT 4235
a10l MACH_A10L A10L 4236
mq60 MACH_MQ60 MQ60 4237
linkstation_lsql MACH_LINKSTATION_LSQL LINKSTATION_LSQL 4238
am3703gateway MACH_AM3703GATEWAY AM3703GATEWAY 4239
accipiter MACH_ACCIPITER ACCIPITER 4240
magnidug MACH_MAGNIDUG MAGNIDUG 4242
hydra MACH_HYDRA HYDRA 4243
sun3i MACH_SUN3I SUN3I 4244
stm_b2078 MACH_STM_B2078 STM_B2078 4245
at91sam9263deskv2 MACH_AT91SAM9263DESKV2 AT91SAM9263DESKV2 4246
deluxe_r MACH_DELUXE_R DELUXE_R 4247
p_98_v MACH_P_98_V P_98_V 4248
p_98_c MACH_P_98_C P_98_C 4249
davinci_am18xx_omn MACH_DAVINCI_AM18XX_OMN DAVINCI_AM18XX_OMN 4250
socfpga_cyclone5 MACH_SOCFPGA_CYCLONE5 SOCFPGA_CYCLONE5 4251
cabatuin MACH_CABATUIN CABATUIN 4252
yoyopad_ft MACH_YOYOPAD_FT YOYOPAD_FT 4253
dan2400evb MACH_DAN2400EVB DAN2400EVB 4254
dan3400evb MACH_DAN3400EVB DAN3400EVB 4255
edm_sf_imx6 MACH_EDM_SF_IMX6 EDM_SF_IMX6 4256
edm_cf_imx6 MACH_EDM_CF_IMX6 EDM_CF_IMX6 4257
vpos3xx MACH_VPOS3XX VPOS3XX 4258
vulcano_9x5 MACH_VULCANO_9X5 VULCANO_9X5 4259
spmp8000 MACH_SPMP8000 SPMP8000 4260
catalina MACH_CATALINA CATALINA 4261
rd88f5181l_fe MACH_RD88F5181L_FE RD88F5181L_FE 4262
mx535_mx MACH_MX535_MX MX535_MX 4263
armadillo840 MACH_ARMADILLO840 ARMADILLO840 4264
spc9000baseboard MACH_SPC9000BASEBOARD SPC9000BASEBOARD 4265
iris MACH_IRIS IRIS 4266
protodcg MACH_PROTODCG PROTODCG 4267
palmtree MACH_PALMTREE PALMTREE 4268
novena MACH_NOVENA NOVENA 4269
ma_um MACH_MA_UM MA_UM 4270
ma_am MACH_MA_AM MA_AM 4271
ems348 MACH_EMS348 EMS348 4272
cm_fx6 MACH_CM_FX6 CM_FX6 4273
arndale MACH_ARNDALE ARNDALE 4274
q5xr5 MACH_Q5XR5 Q5XR5 4275
willow MACH_WILLOW WILLOW 4276
omap3621_odyv3 MACH_OMAP3621_ODYV3 OMAP3621_ODYV3 4277
omapl138_presonus MACH_OMAPL138_PRESONUS OMAPL138_PRESONUS 4278
dvf99 MACH_DVF99 DVF99 4279
impression_j MACH_IMPRESSION_J IMPRESSION_J 4280
qblissa9 MACH_QBLISSA9 QBLISSA9 4281
robin_heliview10 MACH_ROBIN_HELIVIEW10 ROBIN_HELIVIEW10 4282
sun7i MACH_SUN7I SUN7I 4283
mx6q_hdmidongle MACH_MX6Q_HDMIDONGLE MX6Q_HDMIDONGLE 4284
mx6_sid2 MACH_MX6_SID2 MX6_SID2 4285
helios_v3 MACH_HELIOS_V3 HELIOS_V3 4286
helios_v4 MACH_HELIOS_V4 HELIOS_V4 4287
q7_imx6 MACH_Q7_IMX6 Q7_IMX6 4288
odroidx MACH_ODROIDX ODROIDX 4289
robpro MACH_ROBPRO ROBPRO 4290
research59if_mk1 MACH_RESEARCH59IF_MK1 RESEARCH59IF_MK1 4291
bobsleigh MACH_BOBSLEIGH BOBSLEIGH 4292
dcshgwt3 MACH_DCSHGWT3 DCSHGWT3 4293
gld1018 MACH_GLD1018 GLD1018 4294
ev10 MACH_EV10 EV10 4295
nitrogen6x MACH_NITROGEN6X NITROGEN6X 4296
p_107_bb MACH_P_107_BB P_107_BB 4297
evita_utl MACH_EVITA_UTL EVITA_UTL 4298
falconwing MACH_FALCONWING FALCONWING 4299
dct3 MACH_DCT3 DCT3 4300
cpx2e_cell MACH_CPX2E_CELL CPX2E_CELL 4301
amiro MACH_AMIRO AMIRO 4302
mx6q_brassboard MACH_MX6Q_BRASSBOARD MX6Q_BRASSBOARD 4303
dalmore MACH_DALMORE DALMORE 4304
omap3_portal7cp MACH_OMAP3_PORTAL7CP OMAP3_PORTAL7CP 4305
tegra_pluto MACH_TEGRA_PLUTO TEGRA_PLUTO 4306
mx6sl_evk MACH_MX6SL_EVK MX6SL_EVK 4307
m7 MACH_M7 M7 4308
pxm2 MACH_PXM2 PXM2 4309
haba_knx_lite MACH_HABA_KNX_LITE HABA_KNX_LITE 4310
tai MACH_TAI TAI 4311
prototd MACH_PROTOTD PROTOTD 4312
dst_tonto MACH_DST_TONTO DST_TONTO 4313
draco MACH_DRACO DRACO 4314
dxr2 MACH_DXR2 DXR2 4315
rut MACH_RUT RUT 4316
am180x_wsc MACH_AM180X_WSC AM180X_WSC 4317
deluxe_u MACH_DELUXE_U DELUXE_U 4318
deluxe_ul MACH_DELUXE_UL DELUXE_UL 4319
at91sam9260medths MACH_AT91SAM9260MEDTHS AT91SAM9260MEDTHS 4320
matrix516 MACH_MATRIX516 MATRIX516 4321
vid401x MACH_VID401X VID401X 4322
helios_v5 MACH_HELIOS_V5 HELIOS_V5 4323
playpaq2 MACH_PLAYPAQ2 PLAYPAQ2 4324
igam MACH_IGAM IGAM 4325
amico_i MACH_AMICO_I AMICO_I 4326
amico_e MACH_AMICO_E AMICO_E 4327
sentient_mm3_ck MACH_SENTIENT_MM3_CK SENTIENT_MM3_CK 4328
smx6 MACH_SMX6 SMX6 4329
pango MACH_PANGO PANGO 4330
ns115_stick MACH_NS115_STICK NS115_STICK 4331
bctrm3 MACH_BCTRM3 BCTRM3 4332
doctorws MACH_DOCTORWS DOCTORWS 4333
m2601 MACH_M2601 M2601 4334
vgg1111 MACH_VGG1111 VGG1111 4337
countach MACH_COUNTACH COUNTACH 4338
visstrim_sm20 MACH_VISSTRIM_SM20 VISSTRIM_SM20 4339
a639 MACH_A639 A639 4340
spacemonkey MACH_SPACEMONKEY SPACEMONKEY 4341
zpdu_stamp MACH_ZPDU_STAMP ZPDU_STAMP 4342
htc_g7_clone MACH_HTC_G7_CLONE HTC_G7_CLONE 4343
ft2080_corvus MACH_FT2080_CORVUS FT2080_CORVUS 4344
fisland MACH_FISLAND FISLAND 4345
zpdu MACH_ZPDU ZPDU 4346
urt MACH_URT URT 4347
conti_ovip MACH_CONTI_OVIP CONTI_OVIP 4348
omapl138_nagra MACH_OMAPL138_NAGRA OMAPL138_NAGRA 4349
da850_at3kp1 MACH_DA850_AT3KP1 DA850_AT3KP1 4350
da850_at3kp2 MACH_DA850_AT3KP2 DA850_AT3KP2 4351
surma MACH_SURMA SURMA 4352
stm_b2092 MACH_STM_B2092 STM_B2092 4353
mx535_ycr MACH_MX535_YCR MX535_YCR 4354
m7_wl MACH_M7_WL M7_WL 4355
m7_u MACH_M7_U M7_U 4356
omap3_stndt_evm MACH_OMAP3_STNDT_EVM OMAP3_STNDT_EVM 4357
m7_wlv MACH_M7_WLV M7_WLV 4358
xam3517 MACH_XAM3517 XAM3517 4359
a220 MACH_A220 A220 4360
aclima_odie MACH_ACLIMA_ODIE ACLIMA_ODIE 4361
vibble MACH_VIBBLE VIBBLE 4362
k2_u MACH_K2_U K2_U 4363
mx53_egf MACH_MX53_EGF MX53_EGF 4364
novpek_imx53 MACH_NOVPEK_IMX53 NOVPEK_IMX53 4365
novpek_imx6x MACH_NOVPEK_IMX6X NOVPEK_IMX6X 4366
mx25_smartbox MACH_MX25_SMARTBOX MX25_SMARTBOX 4367
eicg6410 MACH_EICG6410 EICG6410 4368
picasso_e3 MACH_PICASSO_E3 PICASSO_E3 4369
motonavigator MACH_MOTONAVIGATOR MOTONAVIGATOR 4370
varioconnect2 MACH_VARIOCONNECT2 VARIOCONNECT2 4371
deluxe_tw MACH_DELUXE_TW DELUXE_TW 4372
kore3 MACH_KORE3 KORE3 4374
mx6s_drs MACH_MX6S_DRS MX6S_DRS 4375
cmimx6 MACH_CMIMX6 CMIMX6 4376
roth MACH_ROTH ROTH 4377
eq4ux MACH_EQ4UX EQ4UX 4378
x1plus MACH_X1PLUS X1PLUS 4379
modimx27 MACH_MODIMX27 MODIMX27 4380
videon_hduac MACH_VIDEON_HDUAC VIDEON_HDUAC 4381
blackbird MACH_BLACKBIRD BLACKBIRD 4382
runmaster MACH_RUNMASTER RUNMASTER 4383
ceres MACH_CERES CERES 4384
nad435 MACH_NAD435 NAD435 4385
ns115_proto_type MACH_NS115_PROTO_TYPE NS115_PROTO_TYPE 4386
fs20_vcc MACH_FS20_VCC FS20_VCC 4387
meson6tv_skt MACH_MESON6TV_SKT MESON6TV_SKT 4389
keystone MACH_KEYSTONE KEYSTONE 4390
pcm052 MACH_PCM052 PCM052 4391
qrd_skud_prime MACH_QRD_SKUD_PRIME QRD_SKUD_PRIME 4393
guf_santaro MACH_GUF_SANTARO GUF_SANTARO 4395
sheepshead MACH_SHEEPSHEAD SHEEPSHEAD 4396
mx6_iwg15m_mxm MACH_MX6_IWG15M_MXM MX6_IWG15M_MXM 4397
mx6_iwg15m_q7 MACH_MX6_IWG15M_Q7 MX6_IWG15M_Q7 4398
at91sam9263if8mic MACH_AT91SAM9263IF8MIC AT91SAM9263IF8MIC 4399
marcopolo MACH_MARCOPOLO MARCOPOLO 4401
mx535_sdcr MACH_MX535_SDCR MX535_SDCR 4402
mx53_csb2733 MACH_MX53_CSB2733 MX53_CSB2733 4403
diva MACH_DIVA DIVA 4404
ncr_7744 MACH_NCR_7744 NCR_7744 4405
macallan MACH_MACALLAN MACALLAN 4406
wnr3500 MACH_WNR3500 WNR3500 4407
pgavrf MACH_PGAVRF PGAVRF 4408
helios_v6 MACH_HELIOS_V6 HELIOS_V6 4409
lcct MACH_LCCT LCCT 4410
csndug MACH_CSNDUG CSNDUG 4411
wandboard_imx6 MACH_WANDBOARD_IMX6 WANDBOARD_IMX6 4412
omap4_jet MACH_OMAP4_JET OMAP4_JET 4413
tegra_roth MACH_TEGRA_ROTH TEGRA_ROTH 4414
m7dcg MACH_M7DCG M7DCG 4415
m7dug MACH_M7DUG M7DUG 4416
m7dtg MACH_M7DTG M7DTG 4417
ap42x MACH_AP42X AP42X 4418
var_som_mx6 MACH_VAR_SOM_MX6 VAR_SOM_MX6 4419
pdlu MACH_PDLU PDLU 4420
hydrogen MACH_HYDROGEN HYDROGEN 4421
npa211e MACH_NPA211E NPA211E 4422
arcadia MACH_ARCADIA ARCADIA 4423
arcadia_l MACH_ARCADIA_L ARCADIA_L 4424
msm8930dt MACH_MSM8930DT MSM8930DT 4425
ktam3874 MACH_KTAM3874 KTAM3874 4426
cec4 MACH_CEC4 CEC4 4427
ape6evm MACH_APE6EVM APE6EVM 4428
tx6 MACH_TX6 TX6 4429
cfa10037 MACH_CFA10037 CFA10037 4431
ezp1000 MACH_EZP1000 EZP1000 4433
wgr826v MACH_WGR826V WGR826V 4434
exuma MACH_EXUMA EXUMA 4435
fregate MACH_FREGATE FREGATE 4436
osirisimx508 MACH_OSIRISIMX508 OSIRISIMX508 4437
st_exigo MACH_ST_EXIGO ST_EXIGO 4438
pismo MACH_PISMO PISMO 4439
atc7 MACH_ATC7 ATC7 4440
nspireclp MACH_NSPIRECLP NSPIRECLP 4441
nspiretp MACH_NSPIRETP NSPIRETP 4442
nspirecx MACH_NSPIRECX NSPIRECX 4443
maya MACH_MAYA MAYA 4444
wecct MACH_WECCT WECCT 4445
m2s MACH_M2S M2S 4446
msm8625q_evbd MACH_MSM8625Q_EVBD MSM8625Q_EVBD 4447
tiny210 MACH_TINY210 TINY210 4448
g3 MACH_G3 G3 4449
hurricane MACH_HURRICANE HURRICANE 4450
mx6_pod MACH_MX6_POD MX6_POD 4451
elondcn MACH_ELONDCN ELONDCN 4452
cwmx535 MACH_CWMX535 CWMX535 4453
m7_wlj MACH_M7_WLJ M7_WLJ 4454
qsp_arm MACH_QSP_ARM QSP_ARM 4455
msm8625q_skud MACH_MSM8625Q_SKUD MSM8625Q_SKUD 4456
htcmondrian MACH_HTCMONDRIAN HTCMONDRIAN 4457
watson_ead MACH_WATSON_EAD WATSON_EAD 4458
mitwoa MACH_MITWOA MITWOA 4459
omap3_wolverine MACH_OMAP3_WOLVERINE OMAP3_WOLVERINE 4460
mapletree MACH_MAPLETREE MAPLETREE 4461
msm8625_fih_sae MACH_MSM8625_FIH_SAE MSM8625_FIH_SAE 4462
epc35 MACH_EPC35 EPC35 4463
smartrtu MACH_SMARTRTU SMARTRTU 4464
rcm101 MACH_RCM101 RCM101 4465
amx_imx53_mxx MACH_AMX_IMX53_MXX AMX_IMX53_MXX 4466
acer_a12 MACH_ACER_A12 ACER_A12 4470
sbc6x MACH_SBC6X SBC6X 4471
u2 MACH_U2 U2 4472
smdk4270 MACH_SMDK4270 SMDK4270 4473
priscillag MACH_PRISCILLAG PRISCILLAG 4474
priscillac MACH_PRISCILLAC PRISCILLAC 4475
priscilla MACH_PRISCILLA PRISCILLA 4476
innova_shpu_v2 MACH_INNOVA_SHPU_V2 INNOVA_SHPU_V2 4477
mach_type_dep2410 MACH_MACH_TYPE_DEP2410 MACH_TYPE_DEP2410 4479
bctre3 MACH_BCTRE3 BCTRE3 4480
omap_m100 MACH_OMAP_M100 OMAP_M100 4481
flo MACH_FLO FLO 4482
nanobone MACH_NANOBONE NANOBONE 4483
stm_b2105 MACH_STM_B2105 STM_B2105 4484
omap4_bsc_bap_v3 MACH_OMAP4_BSC_BAP_V3 OMAP4_BSC_BAP_V3 4485
ss1pam MACH_SS1PAM SS1PAM 4486
primominiu MACH_PRIMOMINIU PRIMOMINIU 4488
mrt_35hd_dualnas_e MACH_MRT_35HD_DUALNAS_E MRT_35HD_DUALNAS_E 4489
kiwi MACH_KIWI KIWI 4490
hw90496 MACH_HW90496 HW90496 4491
mep2440 MACH_MEP2440 MEP2440 4492
colibri_t30 MACH_COLIBRI_T30 COLIBRI_T30 4493
cwv1 MACH_CWV1 CWV1 4494
nsa325 MACH_NSA325 NSA325 4495
dpxmtc MACH_DPXMTC DPXMTC 4497
tt_stuttgart MACH_TT_STUTTGART TT_STUTTGART 4498
miranda_apcii MACH_MIRANDA_APCII MIRANDA_APCII 4499
mx6q_moderox MACH_MX6Q_MODEROX MX6Q_MODEROX 4500
mudskipper MACH_MUDSKIPPER MUDSKIPPER 4501
urania MACH_URANIA URANIA 4502
stm_b2112 MACH_STM_B2112 STM_B2112 4503
mx6q_ats_phoenix MACH_MX6Q_ATS_PHOENIX MX6Q_ATS_PHOENIX 4505
stm_b2116 MACH_STM_B2116 STM_B2116 4506
mythology MACH_MYTHOLOGY MYTHOLOGY 4507
fc360v1 MACH_FC360V1 FC360V1 4508
gps_sensor MACH_GPS_SENSOR GPS_SENSOR 4509
gazelle MACH_GAZELLE GAZELLE 4510
mpq8064_dma MACH_MPQ8064_DMA MPQ8064_DMA 4511
wems_asd01 MACH_WEMS_ASD01 WEMS_ASD01 4512
apalis_t30 MACH_APALIS_T30 APALIS_T30 4513
armstonea9 MACH_ARMSTONEA9 ARMSTONEA9 4515
omap_blazetablet MACH_OMAP_BLAZETABLET OMAP_BLAZETABLET 4516
ar6mxq MACH_AR6MXQ AR6MXQ 4517
ar6mxs MACH_AR6MXS AR6MXS 4518
gwventana MACH_GWVENTANA GWVENTANA 4520
igep0033 MACH_IGEP0033 IGEP0033 4521
h52c1_concerto MACH_H52C1_CONCERTO H52C1_CONCERTO 4524
fcmbrd MACH_FCMBRD FCMBRD 4525
pcaaxs1 MACH_PCAAXS1 PCAAXS1 4526
ls_orca MACH_LS_ORCA LS_ORCA 4527
pcm051lb MACH_PCM051LB PCM051LB 4528
mx6s_lp507_gvci MACH_MX6S_LP507_GVCI MX6S_LP507_GVCI 4529
dido MACH_DIDO DIDO 4530
swarco_itc3_9g20 MACH_SWARCO_ITC3_9G20 SWARCO_ITC3_9G20 4531
robo_roady MACH_ROBO_ROADY ROBO_ROADY 4532
rskrza1 MACH_RSKRZA1 RSKRZA1 4533
swarco_sid MACH_SWARCO_SID SWARCO_SID 4534
mx6_iwg15s_sbc MACH_MX6_IWG15S_SBC MX6_IWG15S_SBC 4535
mx6q_camaro MACH_MX6Q_CAMARO MX6Q_CAMARO 4536
hb6mxs MACH_HB6MXS HB6MXS 4537
lager MACH_LAGER LAGER 4538
lp8x4x MACH_LP8X4X LP8X4X 4539
tegratab7 MACH_TEGRATAB7 TEGRATAB7 4540
andromeda MACH_ANDROMEDA ANDROMEDA 4541
bootes MACH_BOOTES BOOTES 4542
nethmi MACH_NETHMI NETHMI 4543
tegratab MACH_TEGRATAB TEGRATAB 4544
som5_evb MACH_SOM5_EVB SOM5_EVB 4545
venaticorum MACH_VENATICORUM VENATICORUM 4546
stm_b2110 MACH_STM_B2110 STM_B2110 4547
elux_hathor MACH_ELUX_HATHOR ELUX_HATHOR 4548
helios_v7 MACH_HELIOS_V7 HELIOS_V7 4549
xc10v1 MACH_XC10V1 XC10V1 4550
cp2u MACH_CP2U CP2U 4551
iap_f MACH_IAP_F IAP_F 4552
iap_g MACH_IAP_G IAP_G 4553
aae MACH_AAE AAE 4554
pegasus MACH_PEGASUS PEGASUS 4555
cygnus MACH_CYGNUS CYGNUS 4556
centaurus MACH_CENTAURUS CENTAURUS 4557
msm8930_qrd8930 MACH_MSM8930_QRD8930 MSM8930_QRD8930 4558
quby_tim MACH_QUBY_TIM QUBY_TIM 4559
zedi3250a MACH_ZEDI3250A ZEDI3250A 4560
grus MACH_GRUS GRUS 4561
apollo3 MACH_APOLLO3 APOLLO3 4562
cowon_r7 MACH_COWON_R7 COWON_R7 4563
tonga3 MACH_TONGA3 TONGA3 4564
p535 MACH_P535 P535 4565
sa3874i MACH_SA3874I SA3874I 4566
mx6_navico_com MACH_MX6_NAVICO_COM MX6_NAVICO_COM 4567
proxmobil2 MACH_PROXMOBIL2 PROXMOBIL2 4568
ubinux1 MACH_UBINUX1 UBINUX1 4569
istos MACH_ISTOS ISTOS 4570
benvolio4 MACH_BENVOLIO4 BENVOLIO4 4571
eco5_bx2 MACH_ECO5_BX2 ECO5_BX2 4572
eukrea_cpuimx28sd MACH_EUKREA_CPUIMX28SD EUKREA_CPUIMX28SD 4573
domotab MACH_DOMOTAB DOMOTAB 4574
pfla03 MACH_PFLA03 PFLA03 4575
ckb_rza1h MACH_CKB_RZA1H CKB_RZA1H 4780
bcm2835 MACH_BCM2835 BCM2835 4828
cm_3g MACH_CM_3G CM_3G 4943
empc_aimx6 MACH_EMPC_AIMX6 EMPC_AIMX6 4958
diyefis6410 MACH_DIYEFIS6410 DIYEFIS6410 5063
mx53_turing MACH_MX53_TURING MX53_TURING 5064
mx6dl_turing MACH_MX6DL_TURING MX6DL_TURING 5066
mx53_indash MACH_MX53_INDASH MX53_INDASH 5067
mx6q_indash MACH_MX6Q_INDASH MX6Q_INDASH 5068
mx6dl_indash MACH_MX6DL_INDASH MX6DL_INDASH 5069
rts_g6 MACH_RTS_G6 RTS_G6 5070
ka_titan MACH_KA_TITAN KA_TITAN 5071
cl_som_imx7 MACH_CL_SOM_IMX7 CL_SOM_IMX7 5072
vvdn_mgsi_vsis MACH_VVDN_MGSI_VSIS VVDN_MGSI_VSIS 5073
mx6q_nano MACH_MX6Q_NANO MX6Q_NANO 5074
pdu001 MACH_PDU001 PDU001 5075
cab_proyk MACH_CAB_PROYK CAB_PROYK 5076
klin MACH_KLIN KLIN 5077
enman_steuerbox MACH_ENMAN_STEUERBOX ENMAN_STEUERBOX 5078
ls_stingray MACH_LS_STINGRAY LS_STINGRAY 5079
ipdu MACH_IPDU IPDU 5080
linda MACH_LINDA LINDA 5081
mx6q_openrex MACH_MX6Q_OPENREX MX6Q_OPENREX 5082
on100 MACH_ON100 ON100 5083
eminds_rtu12 MACH_EMINDS_RTU12 EMINDS_RTU12 5084
eminds_avl10 MACH_EMINDS_AVL10 EMINDS_AVL10 5085
main_plc_lme MACH_MAIN_PLC_LME MAIN_PLC_LME 5086
mspx MACH_MSPX MSPX 5087
cgw_300 MACH_CGW_300 CGW_300 5088
mx7d_cicada MACH_MX7D_CICADA MX7D_CICADA 5089
virt2real_dm365 MACH_VIRT2REAL_DM365 VIRT2REAL_DM365 5090
dm365_virt2real MACH_DM365_VIRT2REAL DM365_VIRT2REAL 5091
h6073 MACH_H6073 H6073 5092
gtgateway MACH_GTGATEWAY GTGATEWAY 5093
xarina_standard MACH_XARINA_STANDARD XARINA_STANDARD 5094
novasoms MACH_NOVASOMS NOVASOMS 5095
novasomp MACH_NOVASOMP NOVASOMP 5096
novasomu MACH_NOVASOMU NOVASOMU 5097
mx6q_mpbd MACH_MX6Q_MPBD MX6Q_MPBD 5098
ncr_1930 MACH_NCR_1930 NCR_1930 5099
uap301 MACH_UAP301 UAP301 5100
urt02 MACH_URT02 URT02 5101
atc8 MACH_ATC8 ATC8 5102
iot_gateway MACH_IOT_GATEWAY IOT_GATEWAY 5103
hsm_phoenix MACH_HSM_PHOENIX HSM_PHOENIX 5104
missouri MACH_MISSOURI MISSOURI 5105
remarkable MACH_REMARKABLE REMARKABLE 5106
fa0113 MACH_FA0113 FA0113 5107
innova_statnettawm MACH_INNOVA_STATNETTAWM INNOVA_STATNETTAWM 5108

10
arch/arm/vfp/vfp.h
View File

@ -155,8 +155,8 @@ struct vfp_single {
u32 significand;
};
extern s32 vfp_get_float(unsigned int reg);
extern void vfp_put_float(s32 val, unsigned int reg);
asmlinkage s32 vfp_get_float(unsigned int reg);
asmlinkage void vfp_put_float(s32 val, unsigned int reg);
/*
* VFP_SINGLE_MANTISSA_BITS - number of bits in the mantissa
@ -270,8 +270,8 @@ struct vfp_double {
#else
#define VFP_REG_ZERO 16
#endif
extern u64 vfp_get_double(unsigned int reg);
extern void vfp_put_double(u64 val, unsigned int reg);
asmlinkage u64 vfp_get_double(unsigned int reg);
asmlinkage void vfp_put_double(u64 val, unsigned int reg);
#define VFP_DOUBLE_MANTISSA_BITS (52)
#define VFP_DOUBLE_EXPONENT_BITS (11)
@ -377,4 +377,4 @@ struct op {
u32 flags;
};
extern void vfp_save_state(void *location, u32 fpexc);
asmlinkage void vfp_save_state(void *location, u32 fpexc);

8
arch/arm/vfp/vfpmodule.c
View File

@ -34,11 +34,11 @@
/*
* Our undef handlers (in entry.S)
*/
void vfp_testing_entry(void);
void vfp_support_entry(void);
void vfp_null_entry(void);
asmlinkage void vfp_testing_entry(void);
asmlinkage void vfp_support_entry(void);
asmlinkage void vfp_null_entry(void);
void (*vfp_vector)(void) = vfp_null_entry;
asmlinkage void (*vfp_vector)(void) = vfp_null_entry;
/*
* Dual-use variable.