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dt-bindings: PCI: dra7xx: Add DT bindings for PCI dra7xx EP mode

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Add device tree binding documentation for PCI dra7xx EP mode.

Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
This commit is contained in:
Kishon Vijay Abraham I 2017-03-27 15:15:09 +05:30 committed by Bjorn Helgaas
parent 608793e27b
commit 40cc72e2b5
1 changed files with 30 additions and 7 deletions
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37
Documentation/devicetree/bindings/pci/ti-pci.txt
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@ -1,17 +1,22 @@
TI PCI Controllers TI PCI Controllers
PCIe Designware Controller PCIe Designware Controller
- compatible: Should be "ti,dra7-pcie"" - compatible: Should be "ti,dra7-pcie" for RC
- reg : Two register ranges as listed in the reg-names property Should be "ti,dra7-pcie-ep" for EP
- reg-names : The first entry must be "ti-conf" for the TI specific registers
The second entry must be "rc-dbics" for the designware pcie
registers
The third entry must be "config" for the PCIe configuration space
- phys : list of PHY specifiers (used by generic PHY framework) - phys : list of PHY specifiers (used by generic PHY framework)
- phy-names : must be "pcie-phy0", "pcie-phy1", "pcie-phyN".. based on the - phy-names : must be "pcie-phy0", "pcie-phy1", "pcie-phyN".. based on the
number of PHYs as specified in *phys* property. number of PHYs as specified in *phys* property.
- ti,hwmods : Name of the hwmod associated to the pcie, "pcie<X>", - ti,hwmods : Name of the hwmod associated to the pcie, "pcie<X>",
where <X> is the instance number of the pcie from the HW spec. where <X> is the instance number of the pcie from the HW spec.
- num-lanes as specified in ../designware-pcie.txt
HOST MODE
=========
- reg : Two register ranges as listed in the reg-names property
- reg-names : The first entry must be "ti-conf" for the TI specific registers
The second entry must be "rc-dbics" for the DesignWare PCIe
registers
The third entry must be "config" for the PCIe configuration space
- interrupts : Two interrupt entries must be specified. The first one is for - interrupts : Two interrupt entries must be specified. The first one is for
main interrupt line and the second for MSI interrupt line. main interrupt line and the second for MSI interrupt line.
- #address-cells, - #address-cells,
@ -19,13 +24,31 @@ PCIe Designware Controller
#interrupt-cells, #interrupt-cells,
device_type, device_type,
ranges, ranges,
num-lanes,
interrupt-map-mask, interrupt-map-mask,
interrupt-map : as specified in ../designware-pcie.txt interrupt-map : as specified in ../designware-pcie.txt
DEVICE MODE
===========
- reg : Four register ranges as listed in the reg-names property
- reg-names : "ti-conf" for the TI specific registers
"ep_dbics" for the standard configuration registers as
they are locally accessed within the DIF CS space
"ep_dbics2" for the standard configuration registers as
they are locally accessed within the DIF CS2 space
"addr_space" used to map remote RC address space
- interrupts : one interrupt entries must be specified for main interrupt.
- num-ib-windows : number of inbound address translation windows
- num-ob-windows : number of outbound address translation windows
Optional Property: Optional Property:
- gpios : Should be added if a gpio line is required to drive PERST# line - gpios : Should be added if a gpio line is required to drive PERST# line
NOTE: Two DT nodes may be added for each PCI controller; one for host
mode and another for device mode. So in order for PCI to
work in host mode, EP mode DT node should be disabled and in order to PCI to
work in EP mode, host mode DT node should be disabled. Host mode and EP
mode are mutually exclusive.
Example: Example:
axi { axi {
compatible = "simple-bus"; compatible = "simple-bus";