drm/amd/display: Use stream validation hook.
Use dc_validate_stream from crtc atomic_check for single stream validation. Signed-off-by: Andrey Grodzovsky <Andrey.Grodzovsky@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Harry Wentland <Harry.Wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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@ -64,6 +64,24 @@ struct dm_connector_state {
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#define to_dm_connector_state(x)\
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#define to_dm_connector_state(x)\
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container_of((x), struct dm_connector_state, base)
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container_of((x), struct dm_connector_state, base)
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static bool modeset_required(struct drm_crtc_state *crtc_state)
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{
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if (!drm_atomic_crtc_needs_modeset(crtc_state))
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return false;
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if (!crtc_state->enable)
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return false;
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return crtc_state->active;
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}
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static bool modereset_required(struct drm_crtc_state *crtc_state)
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{
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if (!drm_atomic_crtc_needs_modeset(crtc_state))
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return false;
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return !crtc_state->enable || !crtc_state->active;
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}
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void amdgpu_dm_encoder_destroy(struct drm_encoder *encoder)
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void amdgpu_dm_encoder_destroy(struct drm_encoder *encoder)
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{
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{
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@ -1268,11 +1286,9 @@ int amdgpu_dm_connector_mode_valid(
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int result = MODE_ERROR;
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int result = MODE_ERROR;
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struct dc_sink *dc_sink;
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struct dc_sink *dc_sink;
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struct amdgpu_device *adev = connector->dev->dev_private;
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struct amdgpu_device *adev = connector->dev->dev_private;
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struct dc_validation_set val_set = { 0 };
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/* TODO: Unhardcode stream count */
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/* TODO: Unhardcode stream count */
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struct dc_stream *stream;
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struct dc_stream *stream;
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struct amdgpu_connector *aconnector = to_amdgpu_connector(connector);
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struct amdgpu_connector *aconnector = to_amdgpu_connector(connector);
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struct validate_context *context;
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if ((mode->flags & DRM_MODE_FLAG_INTERLACE) ||
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if ((mode->flags & DRM_MODE_FLAG_INTERLACE) ||
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(mode->flags & DRM_MODE_FLAG_DBLSCAN))
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(mode->flags & DRM_MODE_FLAG_DBLSCAN))
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@ -1289,35 +1305,28 @@ int amdgpu_dm_connector_mode_valid(
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if (NULL == dc_sink) {
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if (NULL == dc_sink) {
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DRM_ERROR("dc_sink is NULL!\n");
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DRM_ERROR("dc_sink is NULL!\n");
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goto null_sink;
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goto fail;
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}
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}
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stream = dc_create_stream_for_sink(dc_sink);
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stream = dc_create_stream_for_sink(dc_sink);
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if (NULL == stream) {
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if (NULL == stream) {
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DRM_ERROR("Failed to create stream for sink!\n");
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DRM_ERROR("Failed to create stream for sink!\n");
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goto stream_create_fail;
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goto fail;
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}
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}
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drm_mode_set_crtcinfo(mode, 0);
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drm_mode_set_crtcinfo(mode, 0);
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fill_stream_properties_from_drm_display_mode(stream, mode, connector);
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fill_stream_properties_from_drm_display_mode(stream, mode, connector);
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val_set.stream = stream;
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val_set.surface_count = 0;
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stream->src.width = mode->hdisplay;
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stream->src.width = mode->hdisplay;
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stream->src.height = mode->vdisplay;
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stream->src.height = mode->vdisplay;
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stream->dst = stream->src;
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stream->dst = stream->src;
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context = dc_get_validate_context(adev->dm.dc, &val_set, 1);
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if (dc_validate_stream(adev->dm.dc, stream))
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if (context) {
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result = MODE_OK;
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result = MODE_OK;
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dc_release_validate_context(context);
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}
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dc_stream_release(stream);
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dc_stream_release(stream);
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stream_create_fail:
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fail:
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null_sink:
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/* TODO: error handling*/
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/* TODO: error handling*/
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return result;
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return result;
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}
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}
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@ -1343,7 +1352,24 @@ static int dm_crtc_helper_atomic_check(
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struct drm_crtc *crtc,
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struct drm_crtc *crtc,
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struct drm_crtc_state *state)
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struct drm_crtc_state *state)
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{
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{
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return 0;
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struct amdgpu_device *adev = crtc->dev->dev_private;
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struct dc *dc = adev->dm.dc;
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struct dm_crtc_state *dm_crtc_state = to_dm_crtc_state(state);
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int ret = -EINVAL;
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if (unlikely(!dm_crtc_state->stream && modeset_required(state))) {
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WARN_ON(1);
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return ret;
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}
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/* In some use cases, like reset, no stream is attached */
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if (!dm_crtc_state->stream)
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return 0;
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if (dc_validate_stream(dc, dm_crtc_state->stream))
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return 0;
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return ret;
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}
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}
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static bool dm_crtc_helper_mode_fixup(
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static bool dm_crtc_helper_mode_fixup(
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@ -2119,25 +2145,6 @@ int amdgpu_dm_encoder_init(
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return res;
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return res;
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}
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}
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static bool modeset_required(struct drm_crtc_state *crtc_state)
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{
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if (!drm_atomic_crtc_needs_modeset(crtc_state))
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return false;
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if (!crtc_state->enable)
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return false;
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return crtc_state->active;
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}
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static bool modereset_required(struct drm_crtc_state *crtc_state)
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{
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if (!drm_atomic_crtc_needs_modeset(crtc_state))
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return false;
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return !crtc_state->enable || !crtc_state->active;
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}
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static void manage_dm_interrupts(
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static void manage_dm_interrupts(
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struct amdgpu_device *adev,
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struct amdgpu_device *adev,
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struct amdgpu_crtc *acrtc,
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struct amdgpu_crtc *acrtc,
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@ -2935,7 +2942,7 @@ int amdgpu_dm_atomic_check(struct drm_device *dev,
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*/
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*/
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bool lock_and_validation_needed = false;
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bool lock_and_validation_needed = false;
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ret = drm_atomic_helper_check(dev, state);
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ret = drm_atomic_helper_check_modeset(dev, state);
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if (ret) {
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if (ret) {
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DRM_ERROR("Atomic state validation failed with error :%d !\n", ret);
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DRM_ERROR("Atomic state validation failed with error :%d !\n", ret);
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@ -2957,6 +2964,7 @@ int amdgpu_dm_atomic_check(struct drm_device *dev,
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}
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}
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}
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}
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/*TODO Move this code into dm_crtc_atomic_check once we get rid of dc_validation_set */
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/* update changed items */
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/* update changed items */
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for_each_crtc_in_state(state, crtc, crtc_state, i) {
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for_each_crtc_in_state(state, crtc, crtc_state, i) {
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struct amdgpu_crtc *acrtc = NULL;
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struct amdgpu_crtc *acrtc = NULL;
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@ -3089,10 +3097,7 @@ int amdgpu_dm_atomic_check(struct drm_device *dev,
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if (plane->type == DRM_PLANE_TYPE_CURSOR)
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if (plane->type == DRM_PLANE_TYPE_CURSOR)
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continue;
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continue;
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if (!fb || !plane_crtc || crtc != plane_crtc ||
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if (!fb || !plane_crtc || crtc != plane_crtc || !crtc_state->active)
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(!crtc_state->planes_changed &&
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!crtc_state->color_mgmt_changed) ||
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!crtc_state->active)
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continue;
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continue;
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WARN_ON(!new_acrtc_state->stream);
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WARN_ON(!new_acrtc_state->stream);
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@ -3128,6 +3133,11 @@ int amdgpu_dm_atomic_check(struct drm_device *dev,
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}
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}
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}
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}
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/* Run this here since we want to validate the streams we created */
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ret = drm_atomic_helper_check_planes(dev, state);
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if (ret)
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goto fail;
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/*
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/*
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* For full updates case when
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* For full updates case when
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* removing/adding/updating streams on once CRTC while flipping
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* removing/adding/updating streams on once CRTC while flipping
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