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drm/i915: Automatic i915_switch_context for legacy

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During request construction, after pinning the context we know whether
or not we have to emit a context switch. So move this common operation
from every caller into i915_gem_request_alloc() itself.

v2: Always submit the request if we emitted some commands during request
construction, as typically it also involves changes in global state.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Mika Kuoppala <mika.kuoppala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20171120102002.22254-2-chris@chris-wilson.co.uk
This commit is contained in:
Chris Wilson 2017-11-20 10:20:02 +00:00
parent 2113184c6f
commit 3fef5cda97
10 changed files with 14 additions and 43 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
drivers/gpu/drm/i915/i915_gem.c
View File

@ -5045,7 +5045,7 @@ static int __intel_engines_record_defaults(struct drm_i915_private *i915)
goto out_ctx;
}
err = i915_switch_context(rq);
err = 0;
if (engine->init_context)
err = engine->init_context(rq);

7
drivers/gpu/drm/i915/i915_gem_context.c
View File

@ -842,8 +842,7 @@ int i915_switch_context(struct drm_i915_gem_request *req)
struct intel_engine_cs *engine = req->engine;
lockdep_assert_held(&req->i915->drm.struct_mutex);
if (i915_modparams.enable_execlists)
return 0;
GEM_BUG_ON(i915_modparams.enable_execlists);
if (!req->ctx->engine[engine->id].state) {
struct i915_gem_context *to = req->ctx;
@ -899,7 +898,6 @@ int i915_gem_switch_to_kernel_context(struct drm_i915_private *dev_priv)
for_each_engine(engine, dev_priv, id) {
struct drm_i915_gem_request *req;
int ret;
if (engine_has_idle_kernel_context(engine))
continue;
@ -922,10 +920,7 @@ int i915_gem_switch_to_kernel_context(struct drm_i915_private *dev_priv)
GFP_KERNEL);
}
ret = i915_switch_context(req);
i915_add_request(req);
if (ret)
return ret;
}
return 0;

8
drivers/gpu/drm/i915/i915_gem_execbuffer.c
View File

@ -1111,10 +1111,6 @@ static int __reloc_gpu_alloc(struct i915_execbuffer *eb,
if (err)
goto err_request;
err = i915_switch_context(rq);
if (err)
goto err_request;
err = eb->engine->emit_bb_start(rq,
batch->node.start, PAGE_SIZE,
cache->gen > 5 ? 0 : I915_DISPATCH_SECURE);
@ -1960,10 +1956,6 @@ static int eb_submit(struct i915_execbuffer *eb)
if (err)
return err;
err = i915_switch_context(eb->request);
if (err)
return err;
if (eb->args->flags & I915_EXEC_GEN7_SOL_RESET) {
err = i915_reset_gen7_sol_offsets(eb->request);
if (err)

4
drivers/gpu/drm/i915/i915_gem_request.c
View File

@ -624,6 +624,10 @@ i915_gem_request_alloc(struct intel_engine_cs *engine,
if (ret)
goto err_unpin;
ret = intel_ring_wait_for_space(ring, MIN_SPACE_FOR_ADD_REQUEST);
if (ret)
goto err_unreserve;
/* Move the oldest request to the slab-cache (if not in use!) */
req = list_first_entry_or_null(&engine->timeline->requests,
typeof(*req), link);

3
drivers/gpu/drm/i915/i915_perf.c
View File

@ -1726,10 +1726,9 @@ static int gen8_switch_to_updated_kernel_context(struct drm_i915_private *dev_pr
GFP_KERNEL);
}
ret = i915_switch_context(req);
i915_add_request(req);
return ret;
return 0;
}
/*

4
drivers/gpu/drm/i915/intel_ringbuffer.c
View File

@ -1592,6 +1592,10 @@ static int ring_request_alloc(struct drm_i915_gem_request *request)
if (ret)
return ret;
ret = i915_switch_context(request);
if (ret)
return ret;
request->reserved_space -= LEGACY_REQUEST_SIZE;
return 0;
}

10
drivers/gpu/drm/i915/selftests/huge_pages.c
View File

@ -989,13 +989,9 @@ static int gpu_write(struct i915_vma *vma,
i915_vma_unpin(batch);
i915_vma_close(batch);
err = i915_switch_context(rq);
if (err)
goto err_request;
err = rq->engine->emit_bb_start(rq,
batch->node.start, batch->node.size,
flags);
err = engine->emit_bb_start(rq,
batch->node.start, batch->node.size,
flags);
if (err)
goto err_request;

4
drivers/gpu/drm/i915/selftests/i915_gem_context.c
View File

@ -158,10 +158,6 @@ static int gpu_fill(struct drm_i915_gem_object *obj,
goto err_batch;
}
err = i915_switch_context(rq);
if (err)
goto err_request;
flags = 0;
if (INTEL_GEN(vm->i915) <= 5)
flags |= I915_DISPATCH_SECURE;

10
drivers/gpu/drm/i915/selftests/i915_gem_request.c
View File

@ -459,10 +459,6 @@ empty_request(struct intel_engine_cs *engine,
if (IS_ERR(request))
return request;
err = i915_switch_context(request);
if (err)
goto out_request;
err = engine->emit_bb_start(request,
batch->node.start,
batch->node.size,
@ -671,9 +667,6 @@ static int live_all_engines(void *arg)
goto out_request;
}
err = i915_switch_context(request[id]);
GEM_BUG_ON(err);
err = engine->emit_bb_start(request[id],
batch->node.start,
batch->node.size,
@ -790,9 +783,6 @@ static int live_sequential_engines(void *arg)
}
}
err = i915_switch_context(request[id]);
GEM_BUG_ON(err);
err = engine->emit_bb_start(request[id],
batch->node.start,
batch->node.size,

5
drivers/gpu/drm/i915/selftests/intel_hangcheck.c
View File

@ -114,10 +114,6 @@ static int emit_recurse_batch(struct hang *h,
if (err)
goto unpin_vma;
err = i915_switch_context(rq);
if (err)
goto unpin_hws;
i915_vma_move_to_active(vma, rq, 0);
if (!i915_gem_object_has_active_reference(vma->obj)) {
i915_gem_object_get(vma->obj);
@ -169,7 +165,6 @@ static int emit_recurse_batch(struct hang *h,
err = rq->engine->emit_bb_start(rq, vma->node.start, PAGE_SIZE, flags);
unpin_hws:
i915_vma_unpin(hws);
unpin_vma:
i915_vma_unpin(vma);