From 9a0baee960a718b2fde249b7d9197641fb8eb08d Mon Sep 17 00:00:00 2001 From: Jon Hunter Date: Wed, 3 Jun 2015 12:43:41 +0100 Subject: [PATCH 01/25] ARM: tegra: Enable CPUFreq support for Tegra124 Chromebooks Add the device-tree DFLL clock node and CPU regulator phandle for Tegra124 Chromebooks to enable CPUFreq support on these boards. Signed-off-by: Jon Hunter Reviewed-by: Tomeu Vizoso Signed-off-by: Thierry Reding --- arch/arm/boot/dts/tegra124-nyan.dtsi | 15 ++++++++++++++- 1 file changed, 14 insertions(+), 1 deletion(-) diff --git a/arch/arm/boot/dts/tegra124-nyan.dtsi b/arch/arm/boot/dts/tegra124-nyan.dtsi index a9aec23e06f2..40c23a0b7cfc 100644 --- a/arch/arm/boot/dts/tegra124-nyan.dtsi +++ b/arch/arm/boot/dts/tegra124-nyan.dtsi @@ -159,7 +159,7 @@ vin-ldo9-10-supply = <&vdd_5v0_sys>; vin-ldo11-supply = <&vdd_3v3_run>; - sd0 { + vdd_cpu: sd0 { regulator-name = "+VDD_CPU_AP"; regulator-min-microvolt = <700000>; regulator-max-microvolt = <1350000>; @@ -397,6 +397,13 @@ non-removable; }; + /* CPU DFLL clock */ + clock@0,70110000 { + status = "okay"; + vdd-cpu-supply = <&vdd_cpu>; + nvidia,i2c-fs-rate = <400000>; + }; + ahub@0,70300000 { i2s@0,70301100 { status = "okay"; @@ -487,6 +494,12 @@ }; }; + cpus { + cpu@0 { + vdd-cpu-supply = <&vdd_cpu>; + }; + }; + gpio-keys { compatible = "gpio-keys"; From d8b316b2509f224308e851036653364c22222c61 Mon Sep 17 00:00:00 2001 From: Marcel Ziswiler Date: Thu, 27 Aug 2015 11:44:48 +0200 Subject: [PATCH 02/25] ARM: tegra: Whitespace clean-up for Tegra20/30/124 There were a few cases of eight spaces being used instead of a tab character plus one case of using two spaces after an equal sign instead of just one which this patch fixes. Signed-off-by: Marcel Ziswiler Signed-off-by: Thierry Reding --- arch/arm/boot/dts/tegra124.dtsi | 2 +- arch/arm/boot/dts/tegra20.dtsi | 4 ++-- arch/arm/boot/dts/tegra30.dtsi | 10 +++++----- 3 files changed, 8 insertions(+), 8 deletions(-) diff --git a/arch/arm/boot/dts/tegra124.dtsi b/arch/arm/boot/dts/tegra124.dtsi index 1e204a6de12c..a5c878edd44e 100644 --- a/arch/arm/boot/dts/tegra124.dtsi +++ b/arch/arm/boot/dts/tegra124.dtsi @@ -636,7 +636,7 @@ reg = <0x0 0x70030000 0x0 0x10000>; interrupts = ; clocks = <&tegra_car TEGRA124_CLK_HDA>, - <&tegra_car TEGRA124_CLK_HDA2HDMI>, + <&tegra_car TEGRA124_CLK_HDA2HDMI>, <&tegra_car TEGRA124_CLK_HDA2CODEC_2X>; clock-names = "hda", "hda2hdmi", "hda2codec_2x"; resets = <&tegra_car 125>, /* hda */ diff --git a/arch/arm/boot/dts/tegra20.dtsi b/arch/arm/boot/dts/tegra20.dtsi index e058709e6d98..0a8d1a6c9ebe 100644 --- a/arch/arm/boot/dts/tegra20.dtsi +++ b/arch/arm/boot/dts/tegra20.dtsi @@ -601,8 +601,8 @@ <&tegra_car TEGRA20_CLK_PLL_E>; clock-names = "pex", "afi", "pll_e"; resets = <&tegra_car 70>, - <&tegra_car 72>, - <&tegra_car 74>; + <&tegra_car 72>, + <&tegra_car 74>; reset-names = "pex", "afi", "pcie_x"; status = "disabled"; diff --git a/arch/arm/boot/dts/tegra30.dtsi b/arch/arm/boot/dts/tegra30.dtsi index fe04fb5e155f..38e1e276bafc 100644 --- a/arch/arm/boot/dts/tegra30.dtsi +++ b/arch/arm/boot/dts/tegra30.dtsi @@ -42,8 +42,8 @@ <&tegra_car TEGRA30_CLK_CML0>; clock-names = "pex", "afi", "pll_e", "cml"; resets = <&tegra_car 70>, - <&tegra_car 72>, - <&tegra_car 74>; + <&tegra_car 72>, + <&tegra_car 74>; reset-names = "pex", "afi", "pcie_x"; status = "disabled"; @@ -153,7 +153,7 @@ &tegra_car TEGRA30_CLK_GR3D2>; clock-names = "3d", "3d2"; resets = <&tegra_car 24>, - <&tegra_car 98>; + <&tegra_car 98>; reset-names = "3d", "3d2"; }; @@ -455,7 +455,7 @@ }; i2c@7000c000 { - compatible = "nvidia,tegra30-i2c", "nvidia,tegra20-i2c"; + compatible = "nvidia,tegra30-i2c", "nvidia,tegra20-i2c"; reg = <0x7000c000 0x100>; interrupts = ; #address-cells = <1>; @@ -660,7 +660,7 @@ reg = <0x70030000 0x10000>; interrupts = ; clocks = <&tegra_car TEGRA30_CLK_HDA>, - <&tegra_car TEGRA30_CLK_HDA2HDMI>, + <&tegra_car TEGRA30_CLK_HDA2HDMI>, <&tegra_car TEGRA30_CLK_HDA2CODEC_2X>; clock-names = "hda", "hda2hdmi", "hda2codec_2x"; resets = <&tegra_car 125>, /* hda */ From a5e27206b3b560f91aa421e166029db02b15a7dd Mon Sep 17 00:00:00 2001 From: Marcel Ziswiler Date: Fri, 28 Aug 2015 14:42:28 +0200 Subject: [PATCH 03/25] ARM: tegra: apalis: Update hardware revisions compatibility comment Update introductory comment about what exact hardware revisions this device tree is compatible with as a hint for our customers. Signed-off-by: Marcel Ziswiler Signed-off-by: Thierry Reding --- arch/arm/boot/dts/tegra30-apalis.dtsi | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/arch/arm/boot/dts/tegra30-apalis.dtsi b/arch/arm/boot/dts/tegra30-apalis.dtsi index a5446cba9804..3bff4d7a1d88 100644 --- a/arch/arm/boot/dts/tegra30-apalis.dtsi +++ b/arch/arm/boot/dts/tegra30-apalis.dtsi @@ -1,8 +1,9 @@ #include "tegra30.dtsi" /* - * Toradex Apalis T30 Device Tree - * Compatible for Revisions 1GB: V1.0A; 2GB: V1.0B, V1.0C + * Toradex Apalis T30 Module Device Tree + * Compatible for Revisions 1GB: V1.0A, V1.1A; 1GB IT: V1.1A; + * 2GB: V1.0B, V1.0C, V1.0E, V1.1A */ / { model = "Toradex Apalis T30"; From 654b7d6aec9e55ca5e67adb3bdf0fefd9533c900 Mon Sep 17 00:00:00 2001 From: Marcel Ziswiler Date: Fri, 28 Aug 2015 14:42:29 +0200 Subject: [PATCH 04/25] ARM: tegra: apalis: Fix HDMI power supplies Fix HDMI supplies (both regular VDD as well as PLL ones) being switched by the TPS65911 PMIC's GPIO6 aka EN_VDD_HDMI by introducing two new GPIO switched fixed regulators avdd_hdmi_pll_1v8_reg and avdd_hdmi_3v3_reg. Signed-off-by: Marcel Ziswiler Signed-off-by: Thierry Reding --- arch/arm/boot/dts/tegra30-apalis.dtsi | 32 ++++++++++++++++++++++----- 1 file changed, 27 insertions(+), 5 deletions(-) diff --git a/arch/arm/boot/dts/tegra30-apalis.dtsi b/arch/arm/boot/dts/tegra30-apalis.dtsi index 3bff4d7a1d88..fd6c94e0eeac 100644 --- a/arch/arm/boot/dts/tegra30-apalis.dtsi +++ b/arch/arm/boot/dts/tegra30-apalis.dtsi @@ -34,8 +34,8 @@ host1x@50000000 { hdmi@54280000 { - vdd-supply = <&sys_3v3_reg>; - pll-supply = <&vio_reg>; + vdd-supply = <&avdd_hdmi_3v3_reg>; + pll-supply = <&avdd_hdmi_pll_1v8_reg>; nvidia,hpd-gpio = <&gpio TEGRA_GPIO(N, 7) GPIO_ACTIVE_HIGH>; @@ -667,18 +667,40 @@ #address-cells = <1>; #size-cells = <0>; - sys_3v3_reg: regulator@100 { + avdd_hdmi_pll_1v8_reg: regulator@100 { compatible = "regulator-fixed"; reg = <100>; + regulator-name = "+V1.8_AVDD_HDMI_PLL"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + enable-active-high; + gpio = <&pmic 6 GPIO_ACTIVE_HIGH>; + vin-supply = <&vio_reg>; + }; + + sys_3v3_reg: regulator@101 { + compatible = "regulator-fixed"; + reg = <101>; regulator-name = "3v3"; regulator-min-microvolt = <3300000>; regulator-max-microvolt = <3300000>; regulator-always-on; }; - charge_pump_5v0_reg: regulator@101 { + avdd_hdmi_3v3_reg: regulator@102 { compatible = "regulator-fixed"; - reg = <101>; + reg = <102>; + regulator-name = "+V3.3_AVDD_HDMI"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + enable-active-high; + gpio = <&pmic 6 GPIO_ACTIVE_HIGH>; + vin-supply = <&sys_3v3_reg>; + }; + + charge_pump_5v0_reg: regulator@103 { + compatible = "regulator-fixed"; + reg = <103>; regulator-name = "5v0"; regulator-min-microvolt = <5000000>; regulator-max-microvolt = <5000000>; From 0f44de6cb8904e9a686188aaa51323280d37e127 Mon Sep 17 00:00:00 2001 From: Marcel Ziswiler Date: Fri, 28 Aug 2015 14:42:30 +0200 Subject: [PATCH 05/25] ARM: tegra: apalis: Fix pin muxing Fix pin muxing which got broken due to certain stuff having been fixed or renamed since. Signed-off-by: Marcel Ziswiler Signed-off-by: Thierry Reding --- arch/arm/boot/dts/tegra30-apalis.dtsi | 18 +++++++++--------- 1 file changed, 9 insertions(+), 9 deletions(-) diff --git a/arch/arm/boot/dts/tegra30-apalis.dtsi b/arch/arm/boot/dts/tegra30-apalis.dtsi index fd6c94e0eeac..84744dc446c4 100644 --- a/arch/arm/boot/dts/tegra30-apalis.dtsi +++ b/arch/arm/boot/dts/tegra30-apalis.dtsi @@ -66,7 +66,7 @@ /* BKL1_PWM_EN#, disable TPS65911 PMIC PWM backlight */ uart3_cts_n_pa1 { nvidia,pins = "uart3_cts_n_pa1"; - nvidia,function = "rsvd1"; + nvidia,function = "rsvd2"; nvidia,pull = ; nvidia,tristate = ; }; @@ -152,32 +152,32 @@ }; /* Apalis PWM1 */ - gpio_pu6 { - nvidia,pins = "gpio_pu6"; + pu6 { + nvidia,pins = "pu6"; nvidia,function = "pwm3"; nvidia,pull = ; nvidia,tristate = ; }; /* Apalis PWM2 */ - gpio_pu5 { - nvidia,pins = "gpio_pu5"; + pu5 { + nvidia,pins = "pu5"; nvidia,function = "pwm2"; nvidia,pull = ; nvidia,tristate = ; }; /* Apalis PWM3 */ - gpio_pu4 { - nvidia,pins = "gpio_pu4"; + pu4 { + nvidia,pins = "pu4"; nvidia,function = "pwm1"; nvidia,pull = ; nvidia,tristate = ; }; /* Apalis PWM4 */ - gpio_pu3 { - nvidia,pins = "gpio_pu3"; + pu3 { + nvidia,pins = "pu3"; nvidia,function = "pwm0"; nvidia,pull = ; nvidia,tristate = ; From 7be74b0594a51a1b0fb1eba1001e7beda6a4b9de Mon Sep 17 00:00:00 2001 From: Marcel Ziswiler Date: Fri, 28 Aug 2015 14:42:31 +0200 Subject: [PATCH 06/25] ARM: tegra: apalis: Add comment concerning eMMC Instead of adding an otherwise unused emmc label just add a comment describing what the SDHCI is routed to. Signed-off-by: Marcel Ziswiler Signed-off-by: Thierry Reding --- arch/arm/boot/dts/tegra30-apalis.dtsi | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm/boot/dts/tegra30-apalis.dtsi b/arch/arm/boot/dts/tegra30-apalis.dtsi index 84744dc446c4..d1b24b10f22d 100644 --- a/arch/arm/boot/dts/tegra30-apalis.dtsi +++ b/arch/arm/boot/dts/tegra30-apalis.dtsi @@ -636,6 +636,7 @@ nvidia,sys-clock-req-active-high; }; + /* eMMC */ sdhci@78000600 { status = "okay"; bus-width = <8>; From 4399f40b2bebde152171112253990f1a88abd912 Mon Sep 17 00:00:00 2001 From: Marcel Ziswiler Date: Fri, 28 Aug 2015 14:42:32 +0200 Subject: [PATCH 07/25] ARM: tegra: apalis: Add digital audio pin muxing Add Apalis digital audio pin muxing which is e.g. used for HDA operation together with the Realtek HDA codec as found on the Apalis Evaluation board. Signed-off-by: Marcel Ziswiler Signed-off-by: Thierry Reding --- arch/arm/boot/dts/tegra30-apalis.dtsi | 24 ++++++++++++++++++++++++ 1 file changed, 24 insertions(+) diff --git a/arch/arm/boot/dts/tegra30-apalis.dtsi b/arch/arm/boot/dts/tegra30-apalis.dtsi index d1b24b10f22d..4a6ca389595c 100644 --- a/arch/arm/boot/dts/tegra30-apalis.dtsi +++ b/arch/arm/boot/dts/tegra30-apalis.dtsi @@ -109,6 +109,30 @@ nvidia,enable-input = ; }; + /* Apalis Digital Audio */ + clk1_req_pee2 { + nvidia,pins = "clk1_req_pee2"; + nvidia,function = "hda"; + nvidia,pull = ; + nvidia,tristate = ; + }; + clk2_out_pw5 { + nvidia,pins = "clk2_out_pw5"; + nvidia,function = "extperiph2"; + nvidia,pull = ; + nvidia,tristate = ; + nvidia,enable-input = ; + }; + dap1_fs_pn0 { + nvidia,pins = "dap1_fs_pn0", + "dap1_din_pn1", + "dap1_dout_pn2", + "dap1_sclk_pn3"; + nvidia,function = "hda"; + nvidia,pull = ; + nvidia,tristate = ; + }; + /* Apalis I2C3 */ cam_i2c_scl_pbb1 { nvidia,pins = "cam_i2c_scl_pbb1", From 40699b926df77ccfe2a85c14ede6ac61e515bb40 Mon Sep 17 00:00:00 2001 From: Thierry Reding Date: Tue, 15 Sep 2015 10:29:57 +0200 Subject: [PATCH 08/25] ARM: tegra: apalis: Properly align pin names Align pin names on subsequent lines with the first the name of the first pin in the first line. Signed-off-by: Thierry Reding --- arch/arm/boot/dts/tegra30-apalis.dtsi | 152 +++++++++++++------------- 1 file changed, 76 insertions(+), 76 deletions(-) diff --git a/arch/arm/boot/dts/tegra30-apalis.dtsi b/arch/arm/boot/dts/tegra30-apalis.dtsi index 4a6ca389595c..bf361277fe10 100644 --- a/arch/arm/boot/dts/tegra30-apalis.dtsi +++ b/arch/arm/boot/dts/tegra30-apalis.dtsi @@ -58,14 +58,14 @@ /* Apalis BKL1_PWM */ uart3_rts_n_pc0 { - nvidia,pins = "uart3_rts_n_pc0"; + nvidia,pins = "uart3_rts_n_pc0"; nvidia,function = "pwm0"; nvidia,pull = ; nvidia,tristate = ; }; /* BKL1_PWM_EN#, disable TPS65911 PMIC PWM backlight */ uart3_cts_n_pa1 { - nvidia,pins = "uart3_cts_n_pa1"; + nvidia,pins = "uart3_cts_n_pa1"; nvidia,function = "rsvd2"; nvidia,pull = ; nvidia,tristate = ; @@ -73,10 +73,10 @@ /* Apalis CAN1 on SPI6 */ spi2_cs0_n_px3 { - nvidia,pins = "spi2_cs0_n_px3", - "spi2_miso_px1", - "spi2_mosi_px0", - "spi2_sck_px2"; + nvidia,pins = "spi2_cs0_n_px3", + "spi2_miso_px1", + "spi2_mosi_px0", + "spi2_sck_px2"; nvidia,function = "spi6"; nvidia,pull = ; nvidia,tristate = ; @@ -92,10 +92,10 @@ /* Apalis CAN2 on SPI4 */ gmi_a16_pj7 { - nvidia,pins = "gmi_a16_pj7", - "gmi_a17_pb0", - "gmi_a18_pb1", - "gmi_a19_pk7"; + nvidia,pins = "gmi_a16_pj7", + "gmi_a17_pb0", + "gmi_a18_pb1", + "gmi_a19_pk7"; nvidia,function = "spi4"; nvidia,pull = ; nvidia,tristate = ; @@ -111,7 +111,7 @@ /* Apalis Digital Audio */ clk1_req_pee2 { - nvidia,pins = "clk1_req_pee2"; + nvidia,pins = "clk1_req_pee2"; nvidia,function = "hda"; nvidia,pull = ; nvidia,tristate = ; @@ -124,10 +124,10 @@ nvidia,enable-input = ; }; dap1_fs_pn0 { - nvidia,pins = "dap1_fs_pn0", - "dap1_din_pn1", - "dap1_dout_pn2", - "dap1_sclk_pn3"; + nvidia,pins = "dap1_fs_pn0", + "dap1_din_pn1", + "dap1_dout_pn2", + "dap1_sclk_pn3"; nvidia,function = "hda"; nvidia,pull = ; nvidia,tristate = ; @@ -147,21 +147,21 @@ /* Apalis MMC1 */ sdmmc3_clk_pa6 { - nvidia,pins = "sdmmc3_clk_pa6", - "sdmmc3_cmd_pa7"; + nvidia,pins = "sdmmc3_clk_pa6", + "sdmmc3_cmd_pa7"; nvidia,function = "sdmmc3"; nvidia,pull = ; nvidia,tristate = ; }; sdmmc3_dat0_pb7 { - nvidia,pins = "sdmmc3_dat0_pb7", - "sdmmc3_dat1_pb6", - "sdmmc3_dat2_pb5", - "sdmmc3_dat3_pb4", - "sdmmc3_dat4_pd1", - "sdmmc3_dat5_pd0", - "sdmmc3_dat6_pd3", - "sdmmc3_dat7_pd4"; + nvidia,pins = "sdmmc3_dat0_pb7", + "sdmmc3_dat1_pb6", + "sdmmc3_dat2_pb5", + "sdmmc3_dat3_pb4", + "sdmmc3_dat4_pd1", + "sdmmc3_dat5_pd0", + "sdmmc3_dat6_pd3", + "sdmmc3_dat7_pd4"; nvidia,function = "sdmmc3"; nvidia,pull = ; nvidia,tristate = ; @@ -177,7 +177,7 @@ /* Apalis PWM1 */ pu6 { - nvidia,pins = "pu6"; + nvidia,pins = "pu6"; nvidia,function = "pwm3"; nvidia,pull = ; nvidia,tristate = ; @@ -185,7 +185,7 @@ /* Apalis PWM2 */ pu5 { - nvidia,pins = "pu5"; + nvidia,pins = "pu5"; nvidia,function = "pwm2"; nvidia,pull = ; nvidia,tristate = ; @@ -193,7 +193,7 @@ /* Apalis PWM3 */ pu4 { - nvidia,pins = "pu4"; + nvidia,pins = "pu4"; nvidia,function = "pwm1"; nvidia,pull = ; nvidia,tristate = ; @@ -201,7 +201,7 @@ /* Apalis PWM4 */ pu3 { - nvidia,pins = "pu3"; + nvidia,pins = "pu3"; nvidia,function = "pwm0"; nvidia,pull = ; nvidia,tristate = ; @@ -223,11 +223,11 @@ nvidia,tristate = ; }; sdmmc1_cmd_pz1 { - nvidia,pins = "sdmmc1_cmd_pz1", - "sdmmc1_dat0_py7", - "sdmmc1_dat1_py6", - "sdmmc1_dat2_py5", - "sdmmc1_dat3_py4"; + nvidia,pins = "sdmmc1_cmd_pz1", + "sdmmc1_dat0_py7", + "sdmmc1_dat1_py6", + "sdmmc1_dat2_py5", + "sdmmc1_dat3_py4"; nvidia,function = "sdmmc1"; nvidia,pull = ; nvidia,tristate = ; @@ -243,10 +243,10 @@ /* Apalis SPI1 */ spi1_sck_px5 { - nvidia,pins = "spi1_sck_px5", - "spi1_mosi_px4", - "spi1_miso_px7", - "spi1_cs0_n_px6"; + nvidia,pins = "spi1_sck_px5", + "spi1_mosi_px4", + "spi1_miso_px7", + "spi1_cs0_n_px6"; nvidia,function = "spi1"; nvidia,pull = ; nvidia,tristate = ; @@ -254,10 +254,10 @@ /* Apalis SPI2 */ lcd_sck_pz4 { - nvidia,pins = "lcd_sck_pz4", - "lcd_sdout_pn5", - "lcd_sdin_pz2", - "lcd_cs0_n_pn4"; + nvidia,pins = "lcd_sck_pz4", + "lcd_sdout_pn5", + "lcd_sdin_pz2", + "lcd_cs0_n_pn4"; nvidia,function = "spi5"; nvidia,pull = ; nvidia,tristate = ; @@ -265,14 +265,14 @@ /* Apalis UART1 */ ulpi_data0 { - nvidia,pins = "ulpi_data0_po1", - "ulpi_data1_po2", - "ulpi_data2_po3", - "ulpi_data3_po4", - "ulpi_data4_po5", - "ulpi_data5_po6", - "ulpi_data6_po7", - "ulpi_data7_po0"; + nvidia,pins = "ulpi_data0_po1", + "ulpi_data1_po2", + "ulpi_data2_po3", + "ulpi_data3_po4", + "ulpi_data4_po5", + "ulpi_data5_po6", + "ulpi_data6_po7", + "ulpi_data7_po0"; nvidia,function = "uarta"; nvidia,pull = ; nvidia,tristate = ; @@ -280,10 +280,10 @@ /* Apalis UART2 */ ulpi_clk_py0 { - nvidia,pins = "ulpi_clk_py0", - "ulpi_dir_py1", - "ulpi_nxt_py2", - "ulpi_stp_py3"; + nvidia,pins = "ulpi_clk_py0", + "ulpi_dir_py1", + "ulpi_nxt_py2", + "ulpi_stp_py3"; nvidia,function = "uartd"; nvidia,pull = ; nvidia,tristate = ; @@ -291,8 +291,8 @@ /* Apalis UART3 */ uart2_rxd_pc3 { - nvidia,pins = "uart2_rxd_pc3", - "uart2_txd_pc2"; + nvidia,pins = "uart2_rxd_pc3", + "uart2_txd_pc2"; nvidia,function = "uartb"; nvidia,pull = ; nvidia,tristate = ; @@ -300,8 +300,8 @@ /* Apalis UART4 */ uart3_rxd_pw7 { - nvidia,pins = "uart3_rxd_pw7", - "uart3_txd_pw6"; + nvidia,pins = "uart3_rxd_pw7", + "uart3_txd_pw6"; nvidia,function = "uartc"; nvidia,pull = ; nvidia,tristate = ; @@ -337,21 +337,21 @@ /* eMMC (On-module) */ sdmmc4_clk_pcc4 { - nvidia,pins = "sdmmc4_clk_pcc4", - "sdmmc4_rst_n_pcc3"; + nvidia,pins = "sdmmc4_clk_pcc4", + "sdmmc4_rst_n_pcc3"; nvidia,function = "sdmmc4"; nvidia,pull = ; nvidia,tristate = ; }; sdmmc4_dat0_paa0 { - nvidia,pins = "sdmmc4_dat0_paa0", - "sdmmc4_dat1_paa1", - "sdmmc4_dat2_paa2", - "sdmmc4_dat3_paa3", - "sdmmc4_dat4_paa4", - "sdmmc4_dat5_paa5", - "sdmmc4_dat6_paa6", - "sdmmc4_dat7_paa7"; + nvidia,pins = "sdmmc4_dat0_paa0", + "sdmmc4_dat1_paa1", + "sdmmc4_dat2_paa2", + "sdmmc4_dat3_paa3", + "sdmmc4_dat4_paa4", + "sdmmc4_dat5_paa5", + "sdmmc4_dat6_paa6", + "sdmmc4_dat7_paa7"; nvidia,function = "sdmmc4"; nvidia,pull = ; nvidia,tristate = ; @@ -359,10 +359,10 @@ /* LVDS Transceiver Configuration */ pbb0 { - nvidia,pins = "pbb0", - "pbb7", - "pcc1", - "pcc2"; + nvidia,pins = "pbb0", + "pbb7", + "pcc1", + "pcc2"; nvidia,function = "rsvd2"; nvidia,pull = ; nvidia,tristate = ; @@ -370,10 +370,10 @@ nvidia,lock = ; }; pbb3 { - nvidia,pins = "pbb3", - "pbb4", - "pbb5", - "pbb6"; + nvidia,pins = "pbb3", + "pbb4", + "pbb5", + "pbb6"; nvidia,function = "displayb"; nvidia,pull = ; nvidia,tristate = ; From 26f660d9db98582e28b85a95cd2318ba2dc9df8a Mon Sep 17 00:00:00 2001 From: Marcel Ziswiler Date: Fri, 28 Aug 2015 14:42:33 +0200 Subject: [PATCH 09/25] ARM: tegra: apalis-eval: Enable HDA controller Actually enable HDA now that it should otherwise be supported by the driver and the device tree. Signed-off-by: Marcel Ziswiler Signed-off-by: Thierry Reding --- arch/arm/boot/dts/tegra30-apalis-eval.dts | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/arch/arm/boot/dts/tegra30-apalis-eval.dts b/arch/arm/boot/dts/tegra30-apalis-eval.dts index 6236bdecb48b..5a49f03c5f34 100644 --- a/arch/arm/boot/dts/tegra30-apalis-eval.dts +++ b/arch/arm/boot/dts/tegra30-apalis-eval.dts @@ -126,6 +126,10 @@ }; }; + hda@70030000 { + status = "okay"; + }; + sd1: sdhci@78000000 { status = "okay"; bus-width = <4>; From ea147c8f0e8e5265143f43e602b978ff1859a1b1 Mon Sep 17 00:00:00 2001 From: Marcel Ziswiler Date: Fri, 28 Aug 2015 14:42:34 +0200 Subject: [PATCH 10/25] ARM: tegra: apalis-eval: Set OTG dr_mode This has currently no functional effect as neither USB device nor OTG is currently supported on any Tegras in mainline as of yet. However once we use the same device tree on U-Boot this will actually make it work properly there. Signed-off-by: Marcel Ziswiler Signed-off-by: Thierry Reding --- arch/arm/boot/dts/tegra30-apalis-eval.dts | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm/boot/dts/tegra30-apalis-eval.dts b/arch/arm/boot/dts/tegra30-apalis-eval.dts index 5a49f03c5f34..37437c6e59ee 100644 --- a/arch/arm/boot/dts/tegra30-apalis-eval.dts +++ b/arch/arm/boot/dts/tegra30-apalis-eval.dts @@ -153,6 +153,7 @@ usb-phy@7d000000 { status = "okay"; + dr_mode = "otg"; vbus-supply = <&usbo1_vbus_reg>; }; From 9ecf78c277ab721f793cccc84312d7f55011b40c Mon Sep 17 00:00:00 2001 From: Marcel Ziswiler Date: Fri, 28 Aug 2015 14:42:35 +0200 Subject: [PATCH 11/25] ARM: tegra: apalis-eval: Fix backlight PWM comment Fix the backlight PWM comment as it is actually called PWM_BKL1 rather than just PWM0. Signed-off-by: Marcel Ziswiler Signed-off-by: Thierry Reding --- arch/arm/boot/dts/tegra30-apalis-eval.dts | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/boot/dts/tegra30-apalis-eval.dts b/arch/arm/boot/dts/tegra30-apalis-eval.dts index 37437c6e59ee..c832c157f76a 100644 --- a/arch/arm/boot/dts/tegra30-apalis-eval.dts +++ b/arch/arm/boot/dts/tegra30-apalis-eval.dts @@ -180,7 +180,7 @@ backlight: backlight { compatible = "pwm-backlight"; - /* PWM0 */ + /* PWM_BKL1 */ pwms = <&pwm 0 5000000>; brightness-levels = <255 231 223 207 191 159 127 0>; default-brightness-level = <6>; From 21db15df49e9095326ce672209ec47c022105422 Mon Sep 17 00:00:00 2001 From: Marcel Ziswiler Date: Fri, 28 Aug 2015 14:42:36 +0200 Subject: [PATCH 12/25] ARM: tegra: apalis-eval: Fix power/wakeup key Rather than a power key, WAKE1_MICO is actually a standard Apalis MXM3 pin used for wake-up purposes which this patch fixes. Signed-off-by: Marcel Ziswiler Signed-off-by: Thierry Reding --- arch/arm/boot/dts/tegra30-apalis-eval.dts | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/arch/arm/boot/dts/tegra30-apalis-eval.dts b/arch/arm/boot/dts/tegra30-apalis-eval.dts index c832c157f76a..f2879cfcca62 100644 --- a/arch/arm/boot/dts/tegra30-apalis-eval.dts +++ b/arch/arm/boot/dts/tegra30-apalis-eval.dts @@ -191,10 +191,10 @@ gpio-keys { compatible = "gpio-keys"; - power { - label = "Power"; + wakeup { + label = "WAKE1_MICO"; gpios = <&gpio TEGRA_GPIO(V, 1) GPIO_ACTIVE_LOW>; - linux,code = ; + linux,code = ; debounce-interval = <10>; gpio-key,wakeup; }; From 39ebbf61d4a71dc0f47ac443c9d3fb433b057283 Mon Sep 17 00:00:00 2001 From: Marcel Ziswiler Date: Fri, 28 Aug 2015 17:59:36 +0200 Subject: [PATCH 13/25] ARM: tegra: colibri: Update hardware revisions compatibility Update introductory comment about what exact hardware revisions this device tree is compatible with as a hint for our customers. Signed-off-by: Marcel Ziswiler Signed-off-by: Thierry Reding --- arch/arm/boot/dts/tegra30-colibri.dtsi | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/arm/boot/dts/tegra30-colibri.dtsi b/arch/arm/boot/dts/tegra30-colibri.dtsi index c4ed1bec4d92..83ba3f2b47db 100644 --- a/arch/arm/boot/dts/tegra30-colibri.dtsi +++ b/arch/arm/boot/dts/tegra30-colibri.dtsi @@ -2,8 +2,8 @@ #include "tegra30.dtsi" /* - * Toradex Colibri T30 Device Tree - * Compatible for Revisions 1.1B/1.1C/1.1D + * Toradex Colibri T30 Module Device Tree + * Compatible for Revisions V1.1B, V1.1C, V1.1D, V1.1E; IT: V1.1A */ / { model = "Toradex Colibri T30"; From 312d373225fb9f05a9b45207087378d236026b4e Mon Sep 17 00:00:00 2001 From: Marcel Ziswiler Date: Fri, 28 Aug 2015 17:59:37 +0200 Subject: [PATCH 14/25] ARM: tegra: colibri: Fix HDMI supplies Fix HDMI supplies (both regular VDD as well as PLL ones) being switched by the TPS65911 PMIC's GPIO6 aka EN_VDD_HDMI by introducing two new GPIO witched fixed regulators avdd_hdmi_pll_1v8_reg and avdd_hdmi_3v3_reg. Signed-off-by: Marcel Ziswiler Signed-off-by: Thierry Reding --- arch/arm/boot/dts/tegra30-colibri.dtsi | 32 ++++++++++++++++++++++---- 1 file changed, 27 insertions(+), 5 deletions(-) diff --git a/arch/arm/boot/dts/tegra30-colibri.dtsi b/arch/arm/boot/dts/tegra30-colibri.dtsi index 83ba3f2b47db..5e6a47edacfd 100644 --- a/arch/arm/boot/dts/tegra30-colibri.dtsi +++ b/arch/arm/boot/dts/tegra30-colibri.dtsi @@ -15,8 +15,8 @@ host1x@50000000 { hdmi@54280000 { - vdd-supply = <&sys_3v3_reg>; - pll-supply = <&vio_reg>; + vdd-supply = <&avdd_hdmi_3v3_reg>; + pll-supply = <&avdd_hdmi_pll_1v8_reg>; nvidia,hpd-gpio = <&gpio TEGRA_GPIO(N, 7) GPIO_ACTIVE_HIGH>; @@ -365,18 +365,40 @@ #address-cells = <1>; #size-cells = <0>; - sys_3v3_reg: regulator@100 { + avdd_hdmi_pll_1v8_reg: regulator@100 { compatible = "regulator-fixed"; reg = <100>; + regulator-name = "+V1.8_AVDD_HDMI_PLL"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + enable-active-high; + gpio = <&pmic 6 GPIO_ACTIVE_HIGH>; + vin-supply = <&vio_reg>; + }; + + sys_3v3_reg: regulator@101 { + compatible = "regulator-fixed"; + reg = <101>; regulator-name = "3v3"; regulator-min-microvolt = <3300000>; regulator-max-microvolt = <3300000>; regulator-always-on; }; - charge_pump_5v0_reg: regulator@101 { + avdd_hdmi_3v3_reg: regulator@102 { compatible = "regulator-fixed"; - reg = <101>; + reg = <102>; + regulator-name = "+V3.3_AVDD_HDMI"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + enable-active-high; + gpio = <&pmic 6 GPIO_ACTIVE_HIGH>; + vin-supply = <&sys_3v3_reg>; + }; + + charge_pump_5v0_reg: regulator@103 { + compatible = "regulator-fixed"; + reg = <103>; regulator-name = "5v0"; regulator-min-microvolt = <5000000>; regulator-max-microvolt = <5000000>; From 62bcaba1ab2fb1a9ce5e6d7540ca5efa609fe480 Mon Sep 17 00:00:00 2001 From: Marcel Ziswiler Date: Fri, 28 Aug 2015 17:59:38 +0200 Subject: [PATCH 15/25] ARM: tegra: colibri: Improve comment about thermal alert pin Improve the comment about the THERMD_ALERT# pin which is the unlatched I2C address pin of the LM95245 temperature sensor and therefore requires disabling for now otherwise it won't get detected properly. While at it also move that pin further down to have it alphabetically sorted again. Signed-off-by: Marcel Ziswiler Signed-off-by: Thierry Reding --- arch/arm/boot/dts/tegra30-colibri.dtsi | 22 +++++++++++++--------- 1 file changed, 13 insertions(+), 9 deletions(-) diff --git a/arch/arm/boot/dts/tegra30-colibri.dtsi b/arch/arm/boot/dts/tegra30-colibri.dtsi index 5e6a47edacfd..074123fa48ce 100644 --- a/arch/arm/boot/dts/tegra30-colibri.dtsi +++ b/arch/arm/boot/dts/tegra30-colibri.dtsi @@ -66,15 +66,6 @@ nvidia,enable-input = ; }; - /* Thermal alert, need to be disabled */ - lcd_dc1_pd2 { - nvidia,pins = "lcd_dc1_pd2"; - nvidia,function = "rsvd3"; - nvidia,pull = ; - nvidia,tristate = ; - nvidia,enable-input = ; - }; - /* Colibri MMC */ kb_row10_ps2 { nvidia,pins = "kb_row10_ps2"; @@ -167,6 +158,19 @@ nvidia,pull = ; nvidia,tristate = ; }; + + /* + * THERMD_ALERT#, unlatched I2C address pin of LM95245 + * temperature sensor therefore requires disabling for + * now + */ + lcd_dc1_pd2 { + nvidia,pins = "lcd_dc1_pd2"; + nvidia,function = "rsvd3"; + nvidia,pull = ; + nvidia,tristate = ; + nvidia,enable-input = ; + }; }; }; From e48f6c0eaac087519f9343297eedc6dc117bb153 Mon Sep 17 00:00:00 2001 From: Marcel Ziswiler Date: Fri, 28 Aug 2015 17:59:39 +0200 Subject: [PATCH 16/25] ARM: tegra: colibri: Add pin muxing for on-module power I2C Add pin muxing for the on-module power I2C bus which connects to the PMICs, temperature sensor and touch screen controller. Signed-off-by: Marcel Ziswiler Signed-off-by: Thierry Reding --- arch/arm/boot/dts/tegra30-colibri.dtsi | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/arch/arm/boot/dts/tegra30-colibri.dtsi b/arch/arm/boot/dts/tegra30-colibri.dtsi index 074123fa48ce..4ddccfad8521 100644 --- a/arch/arm/boot/dts/tegra30-colibri.dtsi +++ b/arch/arm/boot/dts/tegra30-colibri.dtsi @@ -159,6 +159,18 @@ nvidia,tristate = ; }; + /* Power I2C (On-module) */ + pwr_i2c_scl_pz6 { + nvidia,pins = "pwr_i2c_scl_pz6", + "pwr_i2c_sda_pz7"; + nvidia,function = "i2cpwr"; + nvidia,pull = ; + nvidia,tristate = ; + nvidia,enable-input = ; + nvidia,lock = ; + nvidia,open-drain = ; + }; + /* * THERMD_ALERT#, unlatched I2C address pin of LM95245 * temperature sensor therefore requires disabling for From b038e3b916cf5c6f4f27f1fbaa10b657a941be54 Mon Sep 17 00:00:00 2001 From: Marcel Ziswiler Date: Fri, 28 Aug 2015 17:59:40 +0200 Subject: [PATCH 17/25] ARM: tegra: colibri: Fix comment about 3v3 fixed supply Fix the comment about the 3v3 fixed supply as the previous v3_3 was bogus. Signed-off-by: Marcel Ziswiler Signed-off-by: Thierry Reding --- arch/arm/boot/dts/tegra30-colibri.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/boot/dts/tegra30-colibri.dtsi b/arch/arm/boot/dts/tegra30-colibri.dtsi index 4ddccfad8521..57335c30a013 100644 --- a/arch/arm/boot/dts/tegra30-colibri.dtsi +++ b/arch/arm/boot/dts/tegra30-colibri.dtsi @@ -252,7 +252,7 @@ /* * EN_+V3.3 switching via FET: * +V3.3_AUDIO_AVDD_S, +V3.3 and +V1.8_VDD_LAN - * see also v3_3 fixed supply + * see also 3v3 fixed supply */ ldo2_reg: ldo2 { regulator-name = "en_3v3"; From 6456e9c5a27fad0345d2b24ea35ce5562917a352 Mon Sep 17 00:00:00 2001 From: Marcel Ziswiler Date: Fri, 28 Aug 2015 17:59:41 +0200 Subject: [PATCH 18/25] ARM: tegra: colibri: Add touch pen interrupt pin muxing Add TOUCH_PEN_INT# pin muxing required for proper STMPE811 touch screen controller operation. Signed-off-by: Marcel Ziswiler Signed-off-by: Thierry Reding --- arch/arm/boot/dts/tegra30-colibri.dtsi | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/arch/arm/boot/dts/tegra30-colibri.dtsi b/arch/arm/boot/dts/tegra30-colibri.dtsi index 57335c30a013..fba3d2a8b9fc 100644 --- a/arch/arm/boot/dts/tegra30-colibri.dtsi +++ b/arch/arm/boot/dts/tegra30-colibri.dtsi @@ -183,6 +183,15 @@ nvidia,tristate = ; nvidia,enable-input = ; }; + + /* TOUCH_PEN_INT# */ + pv0 { + nvidia,pins = "pv0"; + nvidia,function = "rsvd1"; + nvidia,pull = ; + nvidia,tristate = ; + nvidia,enable-input = ; + }; }; }; From 737a7c26a8917f4789884f728e66856a5d526556 Mon Sep 17 00:00:00 2001 From: Marcel Ziswiler Date: Fri, 28 Aug 2015 17:59:42 +0200 Subject: [PATCH 19/25] ARM: tegra: colibri: Activate STMPE811 touch controller Activate STMPE811 touch controller as found on Colibri T30 modules. Signed-off-by: Marcel Ziswiler Signed-off-by: Thierry Reding --- arch/arm/boot/dts/tegra30-colibri.dtsi | 40 ++++++++++++++++++++++++++ 1 file changed, 40 insertions(+) diff --git a/arch/arm/boot/dts/tegra30-colibri.dtsi b/arch/arm/boot/dts/tegra30-colibri.dtsi index fba3d2a8b9fc..5f8ec5cafe9e 100644 --- a/arch/arm/boot/dts/tegra30-colibri.dtsi +++ b/arch/arm/boot/dts/tegra30-colibri.dtsi @@ -320,6 +320,46 @@ }; }; + /* STMPE811 touch screen controller */ + stmpe811@41 { + compatible = "st,stmpe811"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x41>; + interrupts = ; + interrupt-parent = <&gpio>; + interrupt-controller; + id = <0>; + blocks = <0x5>; + irq-trigger = <0x1>; + + stmpe_touchscreen { + compatible = "st,stmpe-ts"; + reg = <0>; + /* 3.25 MHz ADC clock speed */ + st,adc-freq = <1>; + /* 8 sample average control */ + st,ave-ctrl = <3>; + /* 7 length fractional part in z */ + st,fraction-z = <7>; + /* + * 50 mA typical 80 mA max touchscreen drivers + * current limit value + */ + st,i-drive = <1>; + /* 12-bit ADC */ + st,mod-12b = <1>; + /* internal ADC reference */ + st,ref-sel = <0>; + /* ADC converstion time: 80 clocks */ + st,sample-time = <4>; + /* 1 ms panel driver settling time */ + st,settling = <3>; + /* 5 ms touch detect interrupt delay */ + st,touch-det-delay = <5>; + }; + }; + /* * LM95245 temperature sensor * Note: OVERT_N directly connected to PMIC PWRDN From 3791d1cc4bb1aa78c1032873a637ceeaf304a704 Mon Sep 17 00:00:00 2001 From: Marcel Ziswiler Date: Fri, 28 Aug 2015 17:59:43 +0200 Subject: [PATCH 20/25] ARM: tegra: colibri: Replace eMMC label by comment Rather than a bogus label just add a comment identifying the SDHCI instance connected to the on-module eMMC. Signed-off-by: Marcel Ziswiler Signed-off-by: Thierry Reding --- arch/arm/boot/dts/tegra30-colibri.dtsi | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/arch/arm/boot/dts/tegra30-colibri.dtsi b/arch/arm/boot/dts/tegra30-colibri.dtsi index 5f8ec5cafe9e..67ba9431e386 100644 --- a/arch/arm/boot/dts/tegra30-colibri.dtsi +++ b/arch/arm/boot/dts/tegra30-colibri.dtsi @@ -396,7 +396,8 @@ nvidia,sys-clock-req-active-high; }; - emmc: sdhci@78000600 { + /* eMMC */ + sdhci@78000600 { status = "okay"; bus-width = <8>; non-removable; From d5edc4ecc84edc6a336592a39946f44543158cf3 Mon Sep 17 00:00:00 2001 From: Thierry Reding Date: Tue, 15 Sep 2015 10:29:57 +0200 Subject: [PATCH 21/25] ARM: tegra: colibri: Properly align pin names Align pin names on subsequent lines with the first the name of the first pin in the first line. Signed-off-by: Thierry Reding --- arch/arm/boot/dts/tegra30-colibri.dtsi | 72 +++++++++++++------------- 1 file changed, 36 insertions(+), 36 deletions(-) diff --git a/arch/arm/boot/dts/tegra30-colibri.dtsi b/arch/arm/boot/dts/tegra30-colibri.dtsi index 67ba9431e386..2d8c58fd9357 100644 --- a/arch/arm/boot/dts/tegra30-colibri.dtsi +++ b/arch/arm/boot/dts/tegra30-colibri.dtsi @@ -39,7 +39,7 @@ /* Colibri Backlight PWM */ sdmmc3_dat3_pb4 { - nvidia,pins = "sdmmc3_dat3_pb4"; + nvidia,pins = "sdmmc3_dat3_pb4"; nvidia,function = "pwm0"; nvidia,pull = ; nvidia,tristate = ; @@ -74,11 +74,11 @@ nvidia,tristate = ; }; kb_row11_ps3 { - nvidia,pins = "kb_row11_ps3", - "kb_row12_ps4", - "kb_row13_ps5", - "kb_row14_ps6", - "kb_row15_ps7"; + nvidia,pins = "kb_row11_ps3", + "kb_row12_ps4", + "kb_row13_ps5", + "kb_row14_ps6", + "kb_row15_ps7"; nvidia,function = "sdmmc2"; nvidia,pull = ; nvidia,tristate = ; @@ -86,17 +86,17 @@ /* Colibri SSP */ ulpi_clk_py0 { - nvidia,pins = "ulpi_clk_py0", - "ulpi_dir_py1", - "ulpi_nxt_py2", - "ulpi_stp_py3"; + nvidia,pins = "ulpi_clk_py0", + "ulpi_dir_py1", + "ulpi_nxt_py2", + "ulpi_stp_py3"; nvidia,function = "spi1"; nvidia,pull = ; nvidia,tristate = ; }; sdmmc3_dat6_pd3 { - nvidia,pins = "sdmmc3_dat6_pd3", - "sdmmc3_dat7_pd4"; + nvidia,pins = "sdmmc3_dat6_pd3", + "sdmmc3_dat7_pd4"; nvidia,function = "spdif"; nvidia,pull = ; nvidia,tristate = ; @@ -104,14 +104,14 @@ /* Colibri UART_A */ ulpi_data0 { - nvidia,pins = "ulpi_data0_po1", - "ulpi_data1_po2", - "ulpi_data2_po3", - "ulpi_data3_po4", - "ulpi_data4_po5", - "ulpi_data5_po6", - "ulpi_data6_po7", - "ulpi_data7_po0"; + nvidia,pins = "ulpi_data0_po1", + "ulpi_data1_po2", + "ulpi_data2_po3", + "ulpi_data3_po4", + "ulpi_data4_po5", + "ulpi_data5_po6", + "ulpi_data6_po7", + "ulpi_data7_po0"; nvidia,function = "uarta"; nvidia,pull = ; nvidia,tristate = ; @@ -119,10 +119,10 @@ /* Colibri UART_B */ gmi_a16_pj7 { - nvidia,pins = "gmi_a16_pj7", - "gmi_a17_pb0", - "gmi_a18_pb1", - "gmi_a19_pk7"; + nvidia,pins = "gmi_a16_pj7", + "gmi_a17_pb0", + "gmi_a18_pb1", + "gmi_a19_pk7"; nvidia,function = "uartd"; nvidia,pull = ; nvidia,tristate = ; @@ -130,8 +130,8 @@ /* Colibri UART_C */ uart2_rxd { - nvidia,pins = "uart2_rxd_pc3", - "uart2_txd_pc2"; + nvidia,pins = "uart2_rxd_pc3", + "uart2_txd_pc2"; nvidia,function = "uartb"; nvidia,pull = ; nvidia,tristate = ; @@ -139,21 +139,21 @@ /* eMMC */ sdmmc4_clk_pcc4 { - nvidia,pins = "sdmmc4_clk_pcc4", - "sdmmc4_rst_n_pcc3"; + nvidia,pins = "sdmmc4_clk_pcc4", + "sdmmc4_rst_n_pcc3"; nvidia,function = "sdmmc4"; nvidia,pull = ; nvidia,tristate = ; }; sdmmc4_dat0_paa0 { - nvidia,pins = "sdmmc4_dat0_paa0", - "sdmmc4_dat1_paa1", - "sdmmc4_dat2_paa2", - "sdmmc4_dat3_paa3", - "sdmmc4_dat4_paa4", - "sdmmc4_dat5_paa5", - "sdmmc4_dat6_paa6", - "sdmmc4_dat7_paa7"; + nvidia,pins = "sdmmc4_dat0_paa0", + "sdmmc4_dat1_paa1", + "sdmmc4_dat2_paa2", + "sdmmc4_dat3_paa3", + "sdmmc4_dat4_paa4", + "sdmmc4_dat5_paa5", + "sdmmc4_dat6_paa6", + "sdmmc4_dat7_paa7"; nvidia,function = "sdmmc4"; nvidia,pull = ; nvidia,tristate = ; From e4212ffa41361aae7824844609ea4ac9f78513d8 Mon Sep 17 00:00:00 2001 From: Marcel Ziswiler Date: Fri, 28 Aug 2015 17:59:44 +0200 Subject: [PATCH 22/25] ARM: tegra: colibri-eval: Fix vendor string of M41T0M6 RTC Fix compatible vendor string of M41T0M6 real time clock as found on the Colibri Evaluation board. Signed-off-by: Marcel Ziswiler Signed-off-by: Thierry Reding --- arch/arm/boot/dts/tegra30-colibri-eval-v3.dts | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/boot/dts/tegra30-colibri-eval-v3.dts b/arch/arm/boot/dts/tegra30-colibri-eval-v3.dts index 4d3ddc585641..46a7c2d34f38 100644 --- a/arch/arm/boot/dts/tegra30-colibri-eval-v3.dts +++ b/arch/arm/boot/dts/tegra30-colibri-eval-v3.dts @@ -55,7 +55,7 @@ /* M41T0M6 real time clock on carrier board */ rtc@68 { - compatible = "stm,m41t00"; + compatible = "st,m41t00"; reg = <0x68>; }; }; From ccb43161b0bde0d22692dbfb34383f2c0228abc3 Mon Sep 17 00:00:00 2001 From: Marcel Ziswiler Date: Fri, 28 Aug 2015 17:59:45 +0200 Subject: [PATCH 23/25] ARM: tegra: colibri-eval: Add comment concerning SD/MMC Instead of adding an otherwise unused sdmmc label just add a comment. Signed-off-by: Marcel Ziswiler Signed-off-by: Thierry Reding --- arch/arm/boot/dts/tegra30-colibri-eval-v3.dts | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm/boot/dts/tegra30-colibri-eval-v3.dts b/arch/arm/boot/dts/tegra30-colibri-eval-v3.dts index 46a7c2d34f38..a6c98b19a6bb 100644 --- a/arch/arm/boot/dts/tegra30-colibri-eval-v3.dts +++ b/arch/arm/boot/dts/tegra30-colibri-eval-v3.dts @@ -84,6 +84,7 @@ }; }; + /* SD/MMC */ sdhci@78000200 { status = "okay"; bus-width = <4>; From 3f5331324f187b3dc7634c4fb4351f7bd36fad21 Mon Sep 17 00:00:00 2001 From: Marcel Ziswiler Date: Fri, 28 Aug 2015 17:59:46 +0200 Subject: [PATCH 24/25] ARM: tegra: colibri-eval: Fix power/wakeup key Rather than a power key SODIMM pin 45 is actually used for wake-up purposes which this patch fixes. Signed-off-by: Marcel Ziswiler Signed-off-by: Thierry Reding --- arch/arm/boot/dts/tegra30-colibri-eval-v3.dts | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/arch/arm/boot/dts/tegra30-colibri-eval-v3.dts b/arch/arm/boot/dts/tegra30-colibri-eval-v3.dts index a6c98b19a6bb..3ff019f47d00 100644 --- a/arch/arm/boot/dts/tegra30-colibri-eval-v3.dts +++ b/arch/arm/boot/dts/tegra30-colibri-eval-v3.dts @@ -137,10 +137,10 @@ gpio-keys { compatible = "gpio-keys"; - power { - label = "Power"; + wakeup { + label = "SODIMM pin 45 wakeup"; gpios = <&gpio TEGRA_GPIO(V, 1) GPIO_ACTIVE_HIGH>; - linux,code = ; + linux,code = ; debounce-interval = <10>; gpio-key,wakeup; }; From 481b4f1a3f64c529333186a9e94eab41b271e3d8 Mon Sep 17 00:00:00 2001 From: Thierry Reding Date: Thu, 24 Sep 2015 10:00:05 +0200 Subject: [PATCH 25/25] ARM: tegra: Use consistent indentation for SATA node The indentation for properties in the SATA device tree node on Tegra124 deviates from the rest of the device tree file. Restore consistency and get rid of a couple of gratuitous blank lines while at it. Signed-off-by: Thierry Reding --- arch/arm/boot/dts/tegra124.dtsi | 18 ++++++------------ 1 file changed, 6 insertions(+), 12 deletions(-) diff --git a/arch/arm/boot/dts/tegra124.dtsi b/arch/arm/boot/dts/tegra124.dtsi index a5c878edd44e..8aa6e96b5b5c 100644 --- a/arch/arm/boot/dts/tegra124.dtsi +++ b/arch/arm/boot/dts/tegra124.dtsi @@ -608,26 +608,20 @@ sata@0,70020000 { compatible = "nvidia,tegra124-ahci"; - reg = <0x0 0x70027000 0x0 0x2000>, /* AHCI */ - <0x0 0x70020000 0x0 0x7000>; /* SATA */ - + <0x0 0x70020000 0x0 0x7000>; /* SATA */ interrupts = ; - clocks = <&tegra_car TEGRA124_CLK_SATA>, - <&tegra_car TEGRA124_CLK_SATA_OOB>, - <&tegra_car TEGRA124_CLK_CML1>, - <&tegra_car TEGRA124_CLK_PLL_E>; + <&tegra_car TEGRA124_CLK_SATA_OOB>, + <&tegra_car TEGRA124_CLK_CML1>, + <&tegra_car TEGRA124_CLK_PLL_E>; clock-names = "sata", "sata-oob", "cml1", "pll_e"; - resets = <&tegra_car 124>, - <&tegra_car 123>, - <&tegra_car 129>; + <&tegra_car 123>, + <&tegra_car 129>; reset-names = "sata", "sata-oob", "sata-cold"; - phys = <&padctl TEGRA_XUSB_PADCTL_SATA>; phy-names = "sata-phy"; - status = "disabled"; };