forked from Minki/linux
[PATCH] ppc32: cleanup AMCC PPC40x eval boards to support U-Boot
Cleanup PPC40x eval boards (bubinga, walnut and sycamore) to support U-Boot as bootloader. The OpenBIOS bd_info struct is not used in the kernel anymore (only U-Boot now). uImage (U-Boot) tested on walnut, sycamore and bubinga zImage (OpenBIOS) tested on sycamore, bubinga and ebony Signed-off-by: Stefan Roese <sr@denx.de> Signed-off-by: Matt Porter <mporter@kernel.crashing.org> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
This commit is contained in:
Matt Porter
Linus Torvalds
parent
90eb266584
commit
3e9e7c1d0b
@ -67,6 +67,12 @@ zimageinitrd-$(CONFIG_BAMBOO) := zImage.initrd-TREE
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entrypoint-$(CONFIG_BAMBOO) := 0x01000000
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extra.o-$(CONFIG_BAMBOO) := pibs.o
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zimage-$(CONFIG_BUBINGA) := zImage-TREE
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zimageinitrd-$(CONFIG_BUBINGA) := zImage.initrd-TREE
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end-$(CONFIG_BUBINGA) := bubinga
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entrypoint-$(CONFIG_BUBINGA) := 0x01000000
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extra.o-$(CONFIG_BUBINGA) := openbios.o
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zimage-$(CONFIG_EBONY) := zImage-TREE
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zimageinitrd-$(CONFIG_EBONY) := zImage.initrd-TREE
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end-$(CONFIG_EBONY) := ebony
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@ -91,6 +97,18 @@ zimageinitrd-$(CONFIG_OCOTEA) := zImage.initrd-TREE
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entrypoint-$(CONFIG_OCOTEA) := 0x01000000
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extra.o-$(CONFIG_OCOTEA) := pibs.o
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zimage-$(CONFIG_SYCAMORE) := zImage-TREE
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zimageinitrd-$(CONFIG_SYCAMORE) := zImage.initrd-TREE
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end-$(CONFIG_SYCAMORE) := sycamore
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entrypoint-$(CONFIG_SYCAMORE) := 0x01000000
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extra.o-$(CONFIG_SYCAMORE) := openbios.o
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zimage-$(CONFIG_WALNUT) := zImage-TREE
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zimageinitrd-$(CONFIG_WALNUT) := zImage.initrd-TREE
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end-$(CONFIG_WALNUT) := walnut
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entrypoint-$(CONFIG_WALNUT) := 0x01000000
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extra.o-$(CONFIG_WALNUT) := openbios.o
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extra.o-$(CONFIG_EV64260) := misc-ev64260.o
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end-$(CONFIG_EV64260) := ev64260
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cacheflag-$(CONFIG_EV64260) := -include $(clear_L2_L3)
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@ -168,7 +186,8 @@ OBJCOPY_ARGS := -O elf32-powerpc
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# head.o and relocate.o must be at the start.
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boot-y := head.o relocate.o $(extra.o-y) $(misc-y)
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boot-$(CONFIG_40x) += embed_config.o
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boot-$(CONFIG_REDWOOD_5) += embed_config.o
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boot-$(CONFIG_REDWOOD_6) += embed_config.o
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boot-$(CONFIG_8xx) += embed_config.o
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boot-$(CONFIG_8260) += embed_config.o
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boot-$(CONFIG_BSEIP) += iic.o
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@ -23,7 +23,7 @@
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#include <asm/page.h>
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#include <asm/mmu.h>
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#include <asm/bootinfo.h>
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#ifdef CONFIG_44x
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#ifdef CONFIG_4xx
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#include <asm/ibm4xx.h>
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#endif
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#include <asm/reg.h>
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@ -88,6 +88,14 @@ get_mem_size(void)
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return 0;
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}
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#if defined(CONFIG_40x)
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#define PPC4xx_EMAC0_MR0 EMAC0_BASE
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#endif
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#if defined(CONFIG_44x) && defined(PPC44x_EMAC0_MR0)
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#define PPC4xx_EMAC0_MR0 PPC44x_EMAC0_MR0
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#endif
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struct bi_record *
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decompress_kernel(unsigned long load_addr, int num_words, unsigned long cksum)
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{
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@ -103,13 +111,13 @@ decompress_kernel(unsigned long load_addr, int num_words, unsigned long cksum)
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com_port = serial_init(0, NULL);
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#endif
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#if defined(CONFIG_44x) && defined(PPC44x_EMAC0_MR0)
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#if defined(PPC4xx_EMAC0_MR0)
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/* Reset MAL */
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mtdcr(DCRN_MALCR(DCRN_MAL_BASE), MALCR_MMSR);
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/* Wait for reset */
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while (mfdcr(DCRN_MALCR(DCRN_MAL_BASE)) & MALCR_MMSR) {};
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/* Reset EMAC */
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*(volatile unsigned long *)PPC44x_EMAC0_MR0 = 0x20000000;
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*(volatile unsigned long *)PPC4xx_EMAC0_MR0 = 0x20000000;
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__asm__ __volatile__("eieio");
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#endif
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@ -164,7 +172,9 @@ decompress_kernel(unsigned long load_addr, int num_words, unsigned long cksum)
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puts(" "); puthex((unsigned long)(&__ramdisk_end));puts("\n");
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}
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#ifndef CONFIG_40x /* don't overwrite the 40x image located at 0x00400000! */
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avail_ram = (char *)0x00400000;
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#endif
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end_avail = (char *)0x00800000;
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puts("avail ram: "); puthex((unsigned long)avail_ram); puts(" ");
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puthex((unsigned long)end_avail); puts("\n");
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@ -1,19 +1,43 @@
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/*
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* arch/ppc/boot/simple/openbios.c
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*
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* 2005 (c) SYSGO AG - g.jaeger@sysgo.com
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* Copyright (c) 2005 DENX Software Engineering
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* Stefan Roese <sr@denx.de>
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*
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* Based on original work by
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* 2005 (c) SYSGO AG - g.jaeger@sysgo.com
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*
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* This file is licensed under the terms of the GNU General Public
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* License version 2. This program is licensed "as is" without
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* any warranty of any kind, whether express or implied.
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*
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* Derived from arch/ppc/boot/simple/pibs.c (from MontaVista)
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*/
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#include <linux/types.h>
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#include <linux/config.h>
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#include <linux/string.h>
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#include <asm/ppcboot.h>
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#include <platforms/4xx/ebony.h>
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#include <asm/ibm4xx.h>
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#include <asm/reg.h>
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#ifdef CONFIG_40x
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#include <asm/io.h>
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#endif
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#if defined(CONFIG_BUBINGA)
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#define BOARD_INFO_VECTOR 0xFFF80B50 /* openbios 1.19 moved this vector down - armin */
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#else
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#define BOARD_INFO_VECTOR 0xFFFE0B50
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#endif
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#ifdef CONFIG_40x
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/* Supply a default Ethernet address for those eval boards that don't
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* ship with one. This is an address from the MBX board I have, so
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* it is unlikely you will find it on your network.
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*/
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static ushort def_enet_addr[] = { 0x0800, 0x3e26, 0x1559 };
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extern unsigned long timebase_period_ns;
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#endif /* CONFIG_40x */
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extern unsigned long decompress_kernel(unsigned long load_addr, int num_words,
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unsigned long cksum);
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@ -23,15 +47,85 @@ extern unsigned long decompress_kernel(unsigned long load_addr, int num_words,
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bd_t hold_resid_buf __attribute__ ((__section__ (".data.boot")));
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bd_t *hold_residual = &hold_resid_buf;
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typedef struct openbios_board_info {
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unsigned char bi_s_version[4]; /* Version of this structure */
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unsigned char bi_r_version[30]; /* Version of the IBM ROM */
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unsigned int bi_memsize; /* DRAM installed, in bytes */
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#ifdef CONFIG_405EP
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unsigned char bi_enetaddr[2][6]; /* Local Ethernet MAC address */
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#else /* CONFIG_405EP */
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unsigned char bi_enetaddr[6]; /* Local Ethernet MAC address */
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#endif /* CONFIG_405EP */
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unsigned char bi_pci_enetaddr[6]; /* PCI Ethernet MAC address */
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unsigned int bi_intfreq; /* Processor speed, in Hz */
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unsigned int bi_busfreq; /* PLB Bus speed, in Hz */
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unsigned int bi_pci_busfreq; /* PCI Bus speed, in Hz */
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#ifdef CONFIG_405EP
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unsigned int bi_opb_busfreq; /* OPB Bus speed, in Hz */
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unsigned int bi_pllouta_freq; /* PLL OUTA speed, in Hz */
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#endif /* CONFIG_405EP */
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} openbios_bd_t;
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void *
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load_kernel(unsigned long load_addr, int num_words, unsigned long cksum,
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void *ign1, void *ign2)
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{
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decompress_kernel(load_addr, num_words, cksum);
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#ifdef CONFIG_40x
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openbios_bd_t *openbios_bd = NULL;
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openbios_bd_t *(*get_board_info)(void) =
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(openbios_bd_t *(*)(void))(*(unsigned long *)BOARD_INFO_VECTOR);
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/*
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* On 40x platforms we not only need the MAC-addresses, but also the
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* clocks and memsize. Now try to get all values using the OpenBIOS
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* "get_board_info()" callback.
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*/
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if ((openbios_bd = get_board_info()) != NULL) {
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/*
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* Copy bd_info from OpenBIOS struct into U-Boot struct
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* used by kernel
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*/
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hold_residual->bi_memsize = openbios_bd->bi_memsize;
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hold_residual->bi_intfreq = openbios_bd->bi_intfreq;
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hold_residual->bi_busfreq = openbios_bd->bi_busfreq;
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hold_residual->bi_pci_busfreq = openbios_bd->bi_pci_busfreq;
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memcpy(hold_residual->bi_pci_enetaddr, openbios_bd->bi_pci_enetaddr, 6);
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#ifdef CONFIG_405EP
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memcpy(hold_residual->bi_enetaddr, openbios_bd->bi_enetaddr[0], 6);
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memcpy(hold_residual->bi_enet1addr, openbios_bd->bi_enetaddr[1], 6);
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hold_residual->bi_opbfreq = openbios_bd->bi_opb_busfreq;
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hold_residual->bi_procfreq = openbios_bd->bi_pllouta_freq;
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#else /* CONFIG_405EP */
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memcpy(hold_residual->bi_enetaddr, openbios_bd->bi_enetaddr, 6);
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#endif /* CONFIG_405EP */
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} else {
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/* Hmmm...better try to stuff some defaults.
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*/
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hold_residual->bi_memsize = 16 * 1024 * 1024;
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hold_residual->bi_intfreq = 200000000;
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hold_residual->bi_busfreq = 100000000;
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hold_residual->bi_pci_busfreq = 66666666;
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/*
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* Only supply one mac-address in this fallback
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*/
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memcpy(hold_residual->bi_enetaddr, (void *)def_enet_addr, 6);
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#ifdef CONFIG_405EP
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hold_residual->bi_opbfreq = 50000000;
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hold_residual->bi_procfreq = 200000000;
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#endif /* CONFIG_405EP */
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}
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timebase_period_ns = 1000000000 / hold_residual->bi_intfreq;
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#endif /* CONFIG_40x */
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#ifdef CONFIG_440GP
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/* simply copy the MAC addresses */
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memcpy(hold_residual->bi_enetaddr, (char *)EBONY_OPENBIOS_MAC_BASE, 6);
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memcpy(hold_residual->bi_enet1addr, (char *)(EBONY_OPENBIOS_MAC_BASE+EBONY_OPENBIOS_MAC_OFFSET), 6);
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memcpy(hold_residual->bi_enetaddr, (char *)OPENBIOS_MAC_BASE, 6);
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memcpy(hold_residual->bi_enet1addr, (char *)(OPENBIOS_MAC_BASE+OPENBIOS_MAC_OFFSET), 6);
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#endif /* CONFIG_440GP */
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decompress_kernel(load_addr, num_words, cksum);
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return (void *)hold_residual;
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}
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@ -225,7 +225,7 @@ config EMBEDDEDBOOT
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config IBM_OPENBIOS
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bool
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depends on ASH || BUBINGA || REDWOOD_5 || REDWOOD_6 || SYCAMORE || WALNUT
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depends on ASH || REDWOOD_5 || REDWOOD_6
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default y
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config PPC4xx_DMA
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@ -89,7 +89,7 @@ bubinga_early_serial_map(void)
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* by 16.
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*/
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uart_div = (mfdcr(DCRN_CPC0_UCR_BASE) & DCRN_CPC0_UCR_U0DIV);
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uart_clock = __res.bi_pllouta_freq / uart_div;
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uart_clock = __res.bi_procfreq / uart_div;
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/* Setup serial port access */
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memset(&port, 0, sizeof(port));
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@ -1,52 +1,34 @@
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/*
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* Support for IBM PPC 405EP evaluation board (Bubinga).
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* arch/ppc/platforms/4xx/bubinga.h
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*
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* Author: SAW (IBM), derived from walnut.h.
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* Maintained by MontaVista Software <source@mvista.com>
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* Bubinga board definitions
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*
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* Copyright (c) 2005 DENX Software Engineering
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* Stefan Roese <sr@denx.de>
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*
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* Based on original work by
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* SAW (IBM)
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* 2003 (c) MontaVista Softare Inc.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the
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* Free Software Foundation; either version 2 of the License, or (at your
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* option) any later version.
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*
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* 2003 (c) MontaVista Softare Inc. This file is licensed under the
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* terms of the GNU General Public License version 2. This program is
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* licensed "as is" without any warranty of any kind, whether express
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* or implied.
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*/
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#ifdef __KERNEL__
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#ifndef __BUBINGA_H__
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#define __BUBINGA_H__
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/* 405EP */
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#include <linux/config.h>
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#include <platforms/4xx/ibm405ep.h>
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#ifndef __ASSEMBLY__
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/*
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* Data structure defining board information maintained by the boot
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* ROM on IBM's evaluation board. An effort has been made to
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* keep the field names consistent with the 8xx 'bd_t' board info
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* structures.
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*/
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typedef struct board_info {
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unsigned char bi_s_version[4]; /* Version of this structure */
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unsigned char bi_r_version[30]; /* Version of the IBM ROM */
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unsigned int bi_memsize; /* DRAM installed, in bytes */
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unsigned char bi_enetaddr[2][6]; /* Local Ethernet MAC address */ unsigned char bi_pci_enetaddr[6]; /* PCI Ethernet MAC address */
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unsigned int bi_intfreq; /* Processor speed, in Hz */
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unsigned int bi_busfreq; /* PLB Bus speed, in Hz */
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unsigned int bi_pci_busfreq; /* PCI Bus speed, in Hz */
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unsigned int bi_opb_busfreq; /* OPB Bus speed, in Hz */
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unsigned int bi_pllouta_freq; /* PLL OUTA speed, in Hz */
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} bd_t;
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/* Some 4xx parts use a different timebase frequency from the internal clock.
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*/
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#define bi_tbfreq bi_intfreq
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#include <asm/ppcboot.h>
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/* Memory map for the Bubinga board.
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* Generic 4xx plus RTC.
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*/
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extern void *bubinga_rtc_base;
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#define BUBINGA_RTC_PADDR ((uint)0xf0000000)
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#define BUBINGA_RTC_VADDR BUBINGA_RTC_PADDR
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#define BUBINGA_RTC_SIZE ((uint)8*1024)
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@ -58,12 +40,18 @@ extern void *bubinga_rtc_base;
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* for typical configurations at various CPU speeds.
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* The base baud is calculated as (FWDA / EXT UART DIV / 16)
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*/
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#define BASE_BAUD 0
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#define BASE_BAUD 0
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#define BUBINGA_FPGA_BASE 0xF0300000
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/* Flash */
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#define PPC40x_FPGA_BASE 0xF0300000
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#define PPC40x_FPGA_REG_OFFS 1 /* offset to flash map reg */
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#define PPC40x_FLASH_ONBD_N(x) (x & 0x02)
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#define PPC40x_FLASH_SRAM_SEL(x) (x & 0x01)
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#define PPC40x_FLASH_LOW 0xFFF00000
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#define PPC40x_FLASH_HIGH 0xFFF80000
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#define PPC40x_FLASH_SIZE 0x80000
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#define PPC4xx_MACHINE_NAME "IBM Bubinga"
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#define PPC4xx_MACHINE_NAME "IBM Bubinga"
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#endif /* !__ASSEMBLY__ */
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#endif /* __BUBINGA_H__ */
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#endif /* __KERNEL__ */
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@ -24,8 +24,8 @@
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#define PPC44x_EMAC0_MR0 0xE0000800
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/* Where to find the MAC info */
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#define EBONY_OPENBIOS_MAC_BASE 0xfffffe0c
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#define EBONY_OPENBIOS_MAC_OFFSET 0x0c
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#define OPENBIOS_MAC_BASE 0xfffffe0c
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#define OPENBIOS_MAC_OFFSET 0x0c
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/* Default clock rates for Rev. B and Rev. C silicon */
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#define EBONY_440GP_RB_SYSCLK 33000000
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@ -88,9 +88,6 @@ ppc405_map_irq(struct pci_dev *dev, unsigned char idsel, unsigned char pin)
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void __init
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sycamore_setup_arch(void)
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{
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#define SYCAMORE_PS2_BASE 0xF0100000
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#define SYCAMORE_FPGA_BASE 0xF0300000
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void *fpga_brdc;
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unsigned char fpga_brdc_data;
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void *fpga_enable;
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@ -100,7 +97,7 @@ sycamore_setup_arch(void)
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ppc4xx_setup_arch();
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ibm_ocp_set_emac(0, 1);
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ibm_ocp_set_emac(0, 0);
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kb_data = ioremap(SYCAMORE_PS2_BASE, 8);
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if (!kb_data) {
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@ -111,7 +108,7 @@ sycamore_setup_arch(void)
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kb_cs = kb_data + 1;
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fpga_status = ioremap(SYCAMORE_FPGA_BASE, 8);
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fpga_status = ioremap(PPC40x_FPGA_BASE, 8);
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if (!fpga_status) {
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printk(KERN_CRIT
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"sycamore_setup_arch() fpga_status ioremap failed\n");
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@ -1,67 +1,52 @@
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/*
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* arch/ppc/platforms/4xx/sycamore.h
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*
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* Macros, definitions, and data structures specific to the IBM PowerPC
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* 405GPr "Sycamore" evaluation board.
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* Sycamore board definitions
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*
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* Author: Armin Kuster <akuster@mvista.com>
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* Copyright (c) 2005 DENX Software Engineering
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* Stefan Roese <sr@denx.de>
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*
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* Based on original work by
|
||||
* Armin Kuster <akuster@mvista.com>
|
||||
* 2000 (c) MontaVista, Software, Inc.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify it
|
||||
* under the terms of the GNU General Public License as published by the
|
||||
* Free Software Foundation; either version 2 of the License, or (at your
|
||||
* option) any later version.
|
||||
*
|
||||
* 2000 (c) MontaVista, Software, Inc. This file is licensed under
|
||||
* the terms of the GNU General Public License version 2. This program
|
||||
* is licensed "as is" without any warranty of any kind, whether express
|
||||
* or implied.
|
||||
*/
|
||||
|
||||
#ifdef __KERNEL__
|
||||
#ifndef __ASM_SYCAMORE_H__
|
||||
#define __ASM_SYCAMORE_H__
|
||||
|
||||
#include <linux/config.h>
|
||||
#include <platforms/4xx/ibm405gpr.h>
|
||||
#include <asm/ppcboot.h>
|
||||
|
||||
#ifndef __ASSEMBLY__
|
||||
/*
|
||||
* Data structure defining board information maintained by the boot
|
||||
* ROM on IBM's "Sycamore" evaluation board. An effort has been made to
|
||||
* keep the field names consistent with the 8xx 'bd_t' board info
|
||||
* structures.
|
||||
*/
|
||||
|
||||
typedef struct board_info {
|
||||
unsigned char bi_s_version[4]; /* Version of this structure */
|
||||
unsigned char bi_r_version[30]; /* Version of the IBM ROM */
|
||||
unsigned int bi_memsize; /* DRAM installed, in bytes */
|
||||
unsigned char bi_enetaddr[6]; /* Local Ethernet MAC address */
|
||||
unsigned char bi_pci_enetaddr[6]; /* PCI Ethernet MAC address */
|
||||
unsigned int bi_intfreq; /* Processor speed, in Hz */
|
||||
unsigned int bi_busfreq; /* PLB Bus speed, in Hz */
|
||||
unsigned int bi_pci_busfreq; /* PCI Bus speed, in Hz */
|
||||
} bd_t;
|
||||
|
||||
/* Some 4xx parts use a different timebase frequency from the internal clock.
|
||||
*/
|
||||
#define bi_tbfreq bi_intfreq
|
||||
|
||||
|
||||
/* Memory map for the IBM "Sycamore" 405GP evaluation board.
|
||||
/* Memory map for the IBM "Sycamore" 405GPr evaluation board.
|
||||
* Generic 4xx plus RTC.
|
||||
*/
|
||||
|
||||
extern void *sycamore_rtc_base;
|
||||
#define SYCAMORE_RTC_PADDR ((uint)0xf0000000)
|
||||
#define SYCAMORE_RTC_VADDR SYCAMORE_RTC_PADDR
|
||||
#define SYCAMORE_RTC_SIZE ((uint)8*1024)
|
||||
#define SYCAMORE_RTC_SIZE ((uint)8*1024)
|
||||
|
||||
#ifdef CONFIG_PPC405GP_INTERNAL_CLOCK
|
||||
#define BASE_BAUD 201600
|
||||
#else
|
||||
#define BASE_BAUD 691200
|
||||
#endif
|
||||
|
||||
#define SYCAMORE_PS2_BASE 0xF0100000
|
||||
#define SYCAMORE_FPGA_BASE 0xF0300000
|
||||
#define SYCAMORE_PS2_BASE 0xF0100000
|
||||
|
||||
/* Flash */
|
||||
#define PPC40x_FPGA_BASE 0xF0300000
|
||||
#define PPC40x_FPGA_REG_OFFS 5 /* offset to flash map reg */
|
||||
#define PPC40x_FLASH_ONBD_N(x) (x & 0x02)
|
||||
#define PPC40x_FLASH_SRAM_SEL(x) (x & 0x01)
|
||||
#define PPC40x_FLASH_LOW 0xFFF00000
|
||||
#define PPC40x_FLASH_HIGH 0xFFF80000
|
||||
#define PPC40x_FLASH_SIZE 0x80000
|
||||
|
||||
#define PPC4xx_MACHINE_NAME "IBM Sycamore"
|
||||
|
||||
#endif /* !__ASSEMBLY__ */
|
||||
#endif /* __ASM_SYCAMORE_H__ */
|
||||
#endif /* __KERNEL__ */
|
||||
|
||||
@ -90,7 +90,7 @@ walnut_setup_arch(void)
|
||||
|
||||
kb_cs = kb_data + 1;
|
||||
|
||||
fpga_status = ioremap(WALNUT_FPGA_BASE, 8);
|
||||
fpga_status = ioremap(PPC40x_FPGA_BASE, 8);
|
||||
if (!fpga_status) {
|
||||
printk(KERN_CRIT
|
||||
"walnut_setup_arch() fpga_status ioremap failed\n");
|
||||
|
||||
@ -1,72 +1,55 @@
|
||||
/*
|
||||
* arch/ppc/platforms/4xx/walnut.h
|
||||
*
|
||||
* Macros, definitions, and data structures specific to the IBM PowerPC
|
||||
* 405GP "Walnut" evaluation board.
|
||||
* Walnut board definitions
|
||||
*
|
||||
* Authors: Grant Erickson <grant@lcse.umn.edu>, Frank Rowand
|
||||
* <frank_rowand@mvista.com>, Debbie Chu <debbie_chu@mvista.com> or
|
||||
* source@mvista.com
|
||||
* Copyright (c) 2005 DENX Software Engineering
|
||||
* Stefan Roese <sr@denx.de>
|
||||
*
|
||||
* Copyright (c) 1999 Grant Erickson <grant@lcse.umn.edu>
|
||||
* Based on original work by
|
||||
* Copyright (c) 1999 Grant Erickson <grant@lcse.umn.edu>
|
||||
* Frank Rowand <frank_rowand@mvista.com>
|
||||
* Debbie Chu <debbie_chu@mvista.com>
|
||||
* 2000 (c) MontaVista, Software, Inc.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify it
|
||||
* under the terms of the GNU General Public License as published by the
|
||||
* Free Software Foundation; either version 2 of the License, or (at your
|
||||
* option) any later version.
|
||||
*
|
||||
* 2000 (c) MontaVista, Software, Inc. This file is licensed under
|
||||
* the terms of the GNU General Public License version 2. This program
|
||||
* is licensed "as is" without any warranty of any kind, whether express
|
||||
* or implied.
|
||||
*/
|
||||
|
||||
#ifdef __KERNEL__
|
||||
#ifndef __ASM_WALNUT_H__
|
||||
#define __ASM_WALNUT_H__
|
||||
|
||||
/* We have a 405GP core */
|
||||
#include <linux/config.h>
|
||||
#include <platforms/4xx/ibm405gp.h>
|
||||
|
||||
#ifndef __ASSEMBLY__
|
||||
/*
|
||||
* Data structure defining board information maintained by the boot
|
||||
* ROM on IBM's "Walnut" evaluation board. An effort has been made to
|
||||
* keep the field names consistent with the 8xx 'bd_t' board info
|
||||
* structures.
|
||||
*/
|
||||
|
||||
typedef struct board_info {
|
||||
unsigned char bi_s_version[4]; /* Version of this structure */
|
||||
unsigned char bi_r_version[30]; /* Version of the IBM ROM */
|
||||
unsigned int bi_memsize; /* DRAM installed, in bytes */
|
||||
unsigned char bi_enetaddr[6]; /* Local Ethernet MAC address */
|
||||
unsigned char bi_pci_enetaddr[6]; /* PCI Ethernet MAC address */
|
||||
unsigned int bi_intfreq; /* Processor speed, in Hz */
|
||||
unsigned int bi_busfreq; /* PLB Bus speed, in Hz */
|
||||
unsigned int bi_pci_busfreq; /* PCI Bus speed, in Hz */
|
||||
} bd_t;
|
||||
|
||||
/* Some 4xx parts use a different timebase frequency from the internal clock.
|
||||
*/
|
||||
#define bi_tbfreq bi_intfreq
|
||||
|
||||
#include <asm/ppcboot.h>
|
||||
|
||||
/* Memory map for the IBM "Walnut" 405GP evaluation board.
|
||||
* Generic 4xx plus RTC.
|
||||
*/
|
||||
|
||||
extern void *walnut_rtc_base;
|
||||
#define WALNUT_RTC_PADDR ((uint)0xf0000000)
|
||||
#define WALNUT_RTC_VADDR WALNUT_RTC_PADDR
|
||||
#define WALNUT_RTC_SIZE ((uint)8*1024)
|
||||
|
||||
#ifdef CONFIG_PPC405GP_INTERNAL_CLOCK
|
||||
#define BASE_BAUD 201600
|
||||
#else
|
||||
#define BASE_BAUD 691200
|
||||
#endif
|
||||
|
||||
#define WALNUT_PS2_BASE 0xF0100000
|
||||
#define WALNUT_FPGA_BASE 0xF0300000
|
||||
|
||||
/* Flash */
|
||||
#define PPC40x_FPGA_BASE 0xF0300000
|
||||
#define PPC40x_FPGA_REG_OFFS 5 /* offset to flash map reg */
|
||||
#define PPC40x_FLASH_ONBD_N(x) (x & 0x02)
|
||||
#define PPC40x_FLASH_SRAM_SEL(x) (x & 0x01)
|
||||
#define PPC40x_FLASH_LOW 0xFFF00000
|
||||
#define PPC40x_FLASH_HIGH 0xFFF80000
|
||||
#define PPC40x_FLASH_SIZE 0x80000
|
||||
#define WALNUT_FPGA_BASE PPC40x_FPGA_BASE
|
||||
|
||||
#define PPC4xx_MACHINE_NAME "IBM Walnut"
|
||||
|
||||
#endif /* !__ASSEMBLY__ */
|
||||
#endif /* __ASM_WALNUT_H__ */
|
||||
#endif /* __KERNEL__ */
|
||||
|
||||
@ -131,9 +131,22 @@ static inline void ibm_ocp_set_emac(int start, int end)
|
||||
/* Copy MAC addresses to EMAC additions */
|
||||
for (i=start; i<=end; i++) {
|
||||
def = ocp_get_one_device(OCP_VENDOR_IBM, OCP_FUNC_EMAC, i);
|
||||
memcpy(((struct ocp_func_emac_data *)def->additions)->mac_addr,
|
||||
&__res.bi_enetaddr[i],
|
||||
6);
|
||||
if (i == 0)
|
||||
memcpy(((struct ocp_func_emac_data *)def->additions)->mac_addr,
|
||||
__res.bi_enetaddr, 6);
|
||||
#if defined(CONFIG_405EP) || defined(CONFIG_44x)
|
||||
else if (i == 1)
|
||||
memcpy(((struct ocp_func_emac_data *)def->additions)->mac_addr,
|
||||
__res.bi_enet1addr, 6);
|
||||
#endif
|
||||
#if defined(CONFIG_440GX)
|
||||
else if (i == 2)
|
||||
memcpy(((struct ocp_func_emac_data *)def->additions)->mac_addr,
|
||||
__res.bi_enet2addr, 6);
|
||||
else if (i == 3)
|
||||
memcpy(((struct ocp_func_emac_data *)def->additions)->mac_addr,
|
||||
__res.bi_enet3addr, 6);
|
||||
#endif
|
||||
}
|
||||
}
|
||||
#endif
|
||||
|
||||
@ -73,8 +73,8 @@ typedef struct bd_info {
|
||||
#if defined(CONFIG_HYMOD)
|
||||
hymod_conf_t bi_hymod_conf; /* hymod configuration information */
|
||||
#endif
|
||||
#if defined(CONFIG_EVB64260) || defined(CONFIG_44x) || defined(CONFIG_85xx) ||\
|
||||
defined(CONFIG_83xx)
|
||||
#if defined(CONFIG_EVB64260) || defined(CONFIG_405EP) || defined(CONFIG_44x) || \
|
||||
defined(CONFIG_85xx) || defined(CONFIG_83xx)
|
||||
/* second onboard ethernet port */
|
||||
unsigned char bi_enet1addr[6];
|
||||
#endif
|
||||
@ -96,5 +96,7 @@ typedef struct bd_info {
|
||||
#endif
|
||||
} bd_t;
|
||||
|
||||
#define bi_tbfreq bi_intfreq
|
||||
|
||||
#endif /* __ASSEMBLY__ */
|
||||
#endif /* __ASM_PPCBOOT_H__ */
|
||||
|
||||
Loading…
Reference in New Issue
Block a user