tile: comment assumption about __insn_mtspr for <asm/irqflags.h>
The arch_local_irq_save(), etc., routines are required to function as compiler barriers. They do, but it's subtle and requires knowing that the gcc builtin __insn_mtspr() is marked as a memory clobber. Provide a comment explaining the assumption. Signed-off-by: Chris Metcalf <cmetcalf@tilera.com> [ This came about from me wondering about the synchronization rules of __insn_mtspr() - Linus ] Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
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@ -40,7 +40,15 @@
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#include <asm/percpu.h>
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#include <asm/percpu.h>
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#include <arch/spr_def.h>
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#include <arch/spr_def.h>
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/* Set and clear kernel interrupt masks. */
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/*
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* Set and clear kernel interrupt masks.
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*
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* NOTE: __insn_mtspr() is a compiler builtin marked as a memory
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* clobber. We rely on it being equivalent to a compiler barrier in
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* this code since arch_local_irq_save() and friends must act as
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* compiler barriers. This compiler semantic is baked into enough
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* places that the compiler will maintain it going forward.
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*/
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#if CHIP_HAS_SPLIT_INTR_MASK()
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#if CHIP_HAS_SPLIT_INTR_MASK()
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#if INT_PERF_COUNT < 32 || INT_AUX_PERF_COUNT < 32 || INT_MEM_ERROR >= 32
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#if INT_PERF_COUNT < 32 || INT_AUX_PERF_COUNT < 32 || INT_MEM_ERROR >= 32
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# error Fix assumptions about which word various interrupts are in
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# error Fix assumptions about which word various interrupts are in
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