forked from Minki/linux
ASoC: SOF: Intel: hda: define check_ipc_irq op
Define the check_ipc_irq op for HDA platforms and use it when checking if it is an IPC IRQ. Signed-off-by: Ranjani Sridharan <ranjani.sridharan@linux.intel.com> Signed-off-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com> Reviewed-by: Péter Ujfalusi <peter.ujfalusi@linux.intel.com> Link: https://lore.kernel.org/r/20220414184817.362215-13-pierre-louis.bossart@linux.intel.com Signed-off-by: Mark Brown <broonie@kernel.org>
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@ -75,5 +75,6 @@ const struct sof_intel_dsp_desc apl_chip_info = {
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.ssp_count = APL_SSP_COUNT,
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.ssp_base_offset = APL_SSP_BASE_OFFSET,
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.quirks = SOF_INTEL_PROCEN_FMT_QUIRK,
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.check_ipc_irq = hda_dsp_check_ipc_irq,
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};
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EXPORT_SYMBOL_NS(apl_chip_info, SND_SOC_SOF_INTEL_HDA_COMMON);
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@ -295,6 +295,7 @@ const struct sof_intel_dsp_desc cnl_chip_info = {
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.sdw_shim_base = SDW_SHIM_BASE,
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.sdw_alh_base = SDW_ALH_BASE,
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.check_sdw_irq = hda_common_check_sdw_irq,
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.check_ipc_irq = hda_dsp_check_ipc_irq,
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};
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EXPORT_SYMBOL_NS(cnl_chip_info, SND_SOC_SOF_INTEL_HDA_COMMON);
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@ -321,5 +322,6 @@ const struct sof_intel_dsp_desc jsl_chip_info = {
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.sdw_shim_base = SDW_SHIM_BASE,
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.sdw_alh_base = SDW_ALH_BASE,
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.check_sdw_irq = hda_common_check_sdw_irq,
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.check_ipc_irq = hda_dsp_check_ipc_irq,
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};
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EXPORT_SYMBOL_NS(jsl_chip_info, SND_SOC_SOF_INTEL_HDA_COMMON);
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@ -493,6 +493,17 @@ void hda_dsp_dump(struct snd_sof_dev *sdev, u32 flags)
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}
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}
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static bool hda_check_ipc_irq(struct snd_sof_dev *sdev)
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{
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const struct sof_intel_dsp_desc *chip;
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chip = get_chip_info(sdev->pdata);
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if (chip && chip->check_ipc_irq)
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return chip->check_ipc_irq(sdev);
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return false;
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}
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void hda_ipc_irq_dump(struct snd_sof_dev *sdev)
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{
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struct hdac_bus *bus = sof_to_bus(sdev);
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@ -816,7 +827,7 @@ static irqreturn_t hda_dsp_interrupt_thread(int irq, void *context)
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if (hda_dsp_check_stream_irq(sdev))
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hda_dsp_stream_threaded_handler(irq, sdev);
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if (hda_dsp_check_ipc_irq(sdev))
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if (hda_check_ipc_irq(sdev))
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sof_ops(sdev)->irq_thread(irq, sdev);
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if (hda_dsp_check_sdw_irq(sdev))
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@ -140,5 +140,6 @@ const struct sof_intel_dsp_desc icl_chip_info = {
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.sdw_shim_base = SDW_SHIM_BASE,
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.sdw_alh_base = SDW_ALH_BASE,
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.check_sdw_irq = hda_common_check_sdw_irq,
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.check_ipc_irq = hda_dsp_check_ipc_irq,
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};
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EXPORT_SYMBOL_NS(icl_chip_info, SND_SOC_SOF_INTEL_HDA_COMMON);
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@ -171,6 +171,7 @@ struct sof_intel_dsp_desc {
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u32 sdw_alh_base;
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u32 quirks;
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bool (*check_sdw_irq)(struct snd_sof_dev *sdev);
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bool (*check_ipc_irq)(struct snd_sof_dev *sdev);
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};
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extern struct snd_sof_dsp_ops sof_tng_ops;
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@ -111,6 +111,7 @@ const struct sof_intel_dsp_desc tgl_chip_info = {
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.sdw_shim_base = SDW_SHIM_BASE,
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.sdw_alh_base = SDW_ALH_BASE,
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.check_sdw_irq = hda_common_check_sdw_irq,
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.check_ipc_irq = hda_dsp_check_ipc_irq,
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};
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EXPORT_SYMBOL_NS(tgl_chip_info, SND_SOC_SOF_INTEL_HDA_COMMON);
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@ -130,6 +131,7 @@ const struct sof_intel_dsp_desc tglh_chip_info = {
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.sdw_shim_base = SDW_SHIM_BASE,
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.sdw_alh_base = SDW_ALH_BASE,
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.check_sdw_irq = hda_common_check_sdw_irq,
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.check_ipc_irq = hda_dsp_check_ipc_irq,
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};
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EXPORT_SYMBOL_NS(tglh_chip_info, SND_SOC_SOF_INTEL_HDA_COMMON);
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@ -149,6 +151,7 @@ const struct sof_intel_dsp_desc ehl_chip_info = {
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.sdw_shim_base = SDW_SHIM_BASE,
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.sdw_alh_base = SDW_ALH_BASE,
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.check_sdw_irq = hda_common_check_sdw_irq,
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.check_ipc_irq = hda_dsp_check_ipc_irq,
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};
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EXPORT_SYMBOL_NS(ehl_chip_info, SND_SOC_SOF_INTEL_HDA_COMMON);
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@ -168,5 +171,6 @@ const struct sof_intel_dsp_desc adls_chip_info = {
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.sdw_shim_base = SDW_SHIM_BASE,
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.sdw_alh_base = SDW_ALH_BASE,
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.check_sdw_irq = hda_common_check_sdw_irq,
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.check_ipc_irq = hda_dsp_check_ipc_irq,
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};
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EXPORT_SYMBOL_NS(adls_chip_info, SND_SOC_SOF_INTEL_HDA_COMMON);
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