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ARM64: dts: marvell: armada-cp110: Add registers clock for the crypto node

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This extra clock is needed to access the registers of the safexcel EIP97
used on CP110 component of the Armada 7K/8K SoCs.

This follow the changes already made in the binding documentation (as
well as in the driver): "crypto: inside-secure - fix clock resource by
adding a register clock"

Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
This commit is contained in:
Gregory CLEMENT 2018-03-14 17:19:26 +01:00
parent cc4d5aed82
commit 3c7f7f1503
1 changed files with 3 additions and 1 deletions
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4
arch/arm64/boot/dts/marvell/armada-cp110.dtsi
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@ -402,7 +402,9 @@
<ICU_GRP_NSR 92 IRQ_TYPE_LEVEL_HIGH>; <ICU_GRP_NSR 92 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "mem", "ring0", "ring1", interrupt-names = "mem", "ring0", "ring1",
"ring2", "ring3", "eip"; "ring2", "ring3", "eip";
clocks = <&CP110_LABEL(clk) 1 26>; clock-names = "core", "reg";
clocks = <&CP110_LABEL(clk) 1 26>,
<&CP110_LABEL(clk) 1 17>;
dma-coherent; dma-coherent;
}; };
}; };