forked from Minki/linux
bpf: Refactor x86 JIT into helpers
Refactor x86 JITing of LDX, STX, CALL instructions into separate helper functions. No functional changes in LDX and STX helpers. There is a minor change in CALL helper. It will populate target address correctly on the first pass of JIT instead of second pass. That won't reduce total number of JIT passes though. Signed-off-by: Alexei Starovoitov <ast@kernel.org> Signed-off-by: Daniel Borkmann <daniel@iogearbox.net> Acked-by: Song Liu <songliubraving@fb.com> Acked-by: Andrii Nakryiko <andriin@fb.com> Link: https://lore.kernel.org/bpf/20191114185720.1641606-3-ast@kernel.org
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c3d6324f84
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@ -198,6 +198,8 @@ struct jit_context {
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/* Maximum number of bytes emitted while JITing one eBPF insn */
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#define BPF_MAX_INSN_SIZE 128
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#define BPF_INSN_SAFETY 64
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/* number of bytes emit_call() needs to generate call instruction */
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#define X86_CALL_SIZE 5
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#define PROLOGUE_SIZE 20
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@ -390,6 +392,99 @@ static void emit_mov_reg(u8 **pprog, bool is64, u32 dst_reg, u32 src_reg)
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*pprog = prog;
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}
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/* LDX: dst_reg = *(u8*)(src_reg + off) */
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static void emit_ldx(u8 **pprog, u32 size, u32 dst_reg, u32 src_reg, int off)
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{
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u8 *prog = *pprog;
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int cnt = 0;
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switch (size) {
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case BPF_B:
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/* Emit 'movzx rax, byte ptr [rax + off]' */
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EMIT3(add_2mod(0x48, src_reg, dst_reg), 0x0F, 0xB6);
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break;
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case BPF_H:
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/* Emit 'movzx rax, word ptr [rax + off]' */
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EMIT3(add_2mod(0x48, src_reg, dst_reg), 0x0F, 0xB7);
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break;
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case BPF_W:
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/* Emit 'mov eax, dword ptr [rax+0x14]' */
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if (is_ereg(dst_reg) || is_ereg(src_reg))
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EMIT2(add_2mod(0x40, src_reg, dst_reg), 0x8B);
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else
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EMIT1(0x8B);
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break;
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case BPF_DW:
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/* Emit 'mov rax, qword ptr [rax+0x14]' */
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EMIT2(add_2mod(0x48, src_reg, dst_reg), 0x8B);
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break;
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}
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/*
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* If insn->off == 0 we can save one extra byte, but
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* special case of x86 R13 which always needs an offset
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* is not worth the hassle
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*/
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if (is_imm8(off))
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EMIT2(add_2reg(0x40, src_reg, dst_reg), off);
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else
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EMIT1_off32(add_2reg(0x80, src_reg, dst_reg), off);
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*pprog = prog;
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}
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/* STX: *(u8*)(dst_reg + off) = src_reg */
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static void emit_stx(u8 **pprog, u32 size, u32 dst_reg, u32 src_reg, int off)
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{
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u8 *prog = *pprog;
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int cnt = 0;
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switch (size) {
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case BPF_B:
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/* Emit 'mov byte ptr [rax + off], al' */
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if (is_ereg(dst_reg) || is_ereg(src_reg) ||
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/* We have to add extra byte for x86 SIL, DIL regs */
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src_reg == BPF_REG_1 || src_reg == BPF_REG_2)
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EMIT2(add_2mod(0x40, dst_reg, src_reg), 0x88);
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else
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EMIT1(0x88);
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break;
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case BPF_H:
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if (is_ereg(dst_reg) || is_ereg(src_reg))
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EMIT3(0x66, add_2mod(0x40, dst_reg, src_reg), 0x89);
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else
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EMIT2(0x66, 0x89);
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break;
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case BPF_W:
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if (is_ereg(dst_reg) || is_ereg(src_reg))
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EMIT2(add_2mod(0x40, dst_reg, src_reg), 0x89);
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else
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EMIT1(0x89);
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break;
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case BPF_DW:
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EMIT2(add_2mod(0x48, dst_reg, src_reg), 0x89);
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break;
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}
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if (is_imm8(off))
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EMIT2(add_2reg(0x40, dst_reg, src_reg), off);
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else
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EMIT1_off32(add_2reg(0x80, dst_reg, src_reg), off);
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*pprog = prog;
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}
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static int emit_call(u8 **pprog, void *func, void *ip)
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{
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u8 *prog = *pprog;
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int cnt = 0;
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s64 offset;
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offset = func - (ip + X86_CALL_SIZE);
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if (!is_simm32(offset)) {
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pr_err("Target call %p is out of range\n", func);
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return -EINVAL;
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}
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EMIT1_off32(0xE8, offset);
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*pprog = prog;
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return 0;
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}
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static bool ex_handler_bpf(const struct exception_table_entry *x,
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struct pt_regs *regs, int trapnr,
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@ -773,68 +868,22 @@ st: if (is_imm8(insn->off))
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/* STX: *(u8*)(dst_reg + off) = src_reg */
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case BPF_STX | BPF_MEM | BPF_B:
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/* Emit 'mov byte ptr [rax + off], al' */
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if (is_ereg(dst_reg) || is_ereg(src_reg) ||
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/* We have to add extra byte for x86 SIL, DIL regs */
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src_reg == BPF_REG_1 || src_reg == BPF_REG_2)
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EMIT2(add_2mod(0x40, dst_reg, src_reg), 0x88);
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else
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EMIT1(0x88);
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goto stx;
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case BPF_STX | BPF_MEM | BPF_H:
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if (is_ereg(dst_reg) || is_ereg(src_reg))
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EMIT3(0x66, add_2mod(0x40, dst_reg, src_reg), 0x89);
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else
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EMIT2(0x66, 0x89);
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goto stx;
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case BPF_STX | BPF_MEM | BPF_W:
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if (is_ereg(dst_reg) || is_ereg(src_reg))
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EMIT2(add_2mod(0x40, dst_reg, src_reg), 0x89);
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else
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EMIT1(0x89);
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goto stx;
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case BPF_STX | BPF_MEM | BPF_DW:
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EMIT2(add_2mod(0x48, dst_reg, src_reg), 0x89);
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stx: if (is_imm8(insn->off))
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EMIT2(add_2reg(0x40, dst_reg, src_reg), insn->off);
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else
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EMIT1_off32(add_2reg(0x80, dst_reg, src_reg),
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insn->off);
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emit_stx(&prog, BPF_SIZE(insn->code), dst_reg, src_reg, insn->off);
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break;
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/* LDX: dst_reg = *(u8*)(src_reg + off) */
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case BPF_LDX | BPF_MEM | BPF_B:
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case BPF_LDX | BPF_PROBE_MEM | BPF_B:
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/* Emit 'movzx rax, byte ptr [rax + off]' */
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EMIT3(add_2mod(0x48, src_reg, dst_reg), 0x0F, 0xB6);
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goto ldx;
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case BPF_LDX | BPF_MEM | BPF_H:
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case BPF_LDX | BPF_PROBE_MEM | BPF_H:
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/* Emit 'movzx rax, word ptr [rax + off]' */
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EMIT3(add_2mod(0x48, src_reg, dst_reg), 0x0F, 0xB7);
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goto ldx;
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case BPF_LDX | BPF_MEM | BPF_W:
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case BPF_LDX | BPF_PROBE_MEM | BPF_W:
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/* Emit 'mov eax, dword ptr [rax+0x14]' */
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if (is_ereg(dst_reg) || is_ereg(src_reg))
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EMIT2(add_2mod(0x40, src_reg, dst_reg), 0x8B);
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else
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EMIT1(0x8B);
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goto ldx;
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case BPF_LDX | BPF_MEM | BPF_DW:
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case BPF_LDX | BPF_PROBE_MEM | BPF_DW:
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/* Emit 'mov rax, qword ptr [rax+0x14]' */
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EMIT2(add_2mod(0x48, src_reg, dst_reg), 0x8B);
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ldx: /*
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* If insn->off == 0 we can save one extra byte, but
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* special case of x86 R13 which always needs an offset
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* is not worth the hassle
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*/
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if (is_imm8(insn->off))
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EMIT2(add_2reg(0x40, src_reg, dst_reg), insn->off);
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else
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EMIT1_off32(add_2reg(0x80, src_reg, dst_reg),
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insn->off);
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emit_ldx(&prog, BPF_SIZE(insn->code), dst_reg, src_reg, insn->off);
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if (BPF_MODE(insn->code) == BPF_PROBE_MEM) {
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struct exception_table_entry *ex;
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u8 *_insn = image + proglen;
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@ -899,13 +948,8 @@ xadd: if (is_imm8(insn->off))
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/* call */
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case BPF_JMP | BPF_CALL:
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func = (u8 *) __bpf_call_base + imm32;
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jmp_offset = func - (image + addrs[i]);
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if (!imm32 || !is_simm32(jmp_offset)) {
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pr_err("unsupported BPF func %d addr %p image %p\n",
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imm32, func, image);
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if (!imm32 || emit_call(&prog, func, image + addrs[i - 1]))
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return -EINVAL;
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}
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EMIT1_off32(0xE8, jmp_offset);
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break;
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case BPF_JMP | BPF_TAIL_CALL:
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