forked from Minki/linux
irqchip/gic-v4.1: Ensure accessing the correct RD when writing INVALLR
The GICv4.1 spec tells us that it's CONSTRAINED UNPREDICTABLE to issue a register-based invalidation operation for a vPEID not mapped to that RD, or another RD within the same CommonLPIAff group. To follow this rule, commitf3a059219b
("irqchip/gic-v4.1: Ensure mutual exclusion between vPE affinity change and RD access") tried to address the race between the RD accesses and the vPE affinity change, but somehow forgot to take GICR_INVALLR into account. Let's take the vpe_lock before evaluating vpe->col_idx to fix it. Fixes:f3a059219b
("irqchip/gic-v4.1: Ensure mutual exclusion between vPE affinity change and RD access") Signed-off-by: Zenghui Yu <yuzenghui@huawei.com> Signed-off-by: Marc Zyngier <maz@kernel.org> Cc: stable@vger.kernel.org Link: https://lore.kernel.org/r/20200720092328.708-1-yuzenghui@huawei.com
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@ -4079,18 +4079,22 @@ static void its_vpe_4_1_deschedule(struct its_vpe *vpe,
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static void its_vpe_4_1_invall(struct its_vpe *vpe)
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{
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void __iomem *rdbase;
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unsigned long flags;
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u64 val;
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int cpu;
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val = GICR_INVALLR_V;
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val |= FIELD_PREP(GICR_INVALLR_VPEID, vpe->vpe_id);
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/* Target the redistributor this vPE is currently known on */
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raw_spin_lock(&gic_data_rdist_cpu(vpe->col_idx)->rd_lock);
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rdbase = per_cpu_ptr(gic_rdists->rdist, vpe->col_idx)->rd_base;
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cpu = vpe_to_cpuid_lock(vpe, &flags);
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raw_spin_lock(&gic_data_rdist_cpu(cpu)->rd_lock);
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rdbase = per_cpu_ptr(gic_rdists->rdist, cpu)->rd_base;
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gic_write_lpir(val, rdbase + GICR_INVALLR);
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wait_for_syncr(rdbase);
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raw_spin_unlock(&gic_data_rdist_cpu(vpe->col_idx)->rd_lock);
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raw_spin_unlock(&gic_data_rdist_cpu(cpu)->rd_lock);
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vpe_to_cpuid_unlock(vpe, flags);
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}
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static int its_vpe_4_1_set_vcpu_affinity(struct irq_data *d, void *vcpu_info)
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