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Actions Semi ARM64 based SoC DT for v4.15

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This updates the Bubblegum-96 DT with a clock node for the debug UART.
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v2
 
 iQIcBAABAgAGBQJZ/ZW8AAoJEPou0S0+fgE/6SIP/1RTgErTZWuNJR8IQjlAqvzm
 Ni+UR2N31ra6+akx/WhhWUbozwbiFDwMHqNoDW4s4fi7sXsWvEE/18BqlGpYanIh
 XDs+QvJ0oQ0RVA5F+KqzXhf04o0XaW5Vpkf07a/2X6ZlBWtSQtoKbeNwlvvKRpaq
 VAuRcRzIKJ1Ys70XtYQ3+xFTDT0E2hbjNIvIQHWWEslWXzpWq8q58hg/bq+VXHTM
 e13XJ8NBafGdnhLhKU+5zh7OjPZ1bumZHk42aFWzG40wPqwYHcomNmrAmOcjza4N
 Tk1E0YYb8sutLJlGDGw9T2abFTMwJue7vlxRAjecmNA09YPJOzANfSSzQ4t02t4a
 M4Oi2qS/om3J6ARTTrwkfLWwMSxk/NT/QMl1YsE3dXhVdeLacRq+Ef3uTi44Jm0D
 IrTd6CGF4g7vedJjd7BVExcwymSRIrqAjxFRZZUyImfZ0UQIMWkwaxVTetdEV0AM
 WgfUS/3mVOGMDEP/BXhzd4VYb058JzyNo4CiBL3Bzn37Ng5SSQKFLLJzI7rhzacq
 WiywgywlV/dx2MEvxrpiWSEnIGAUlNEO0bvwyq2PYkq7zfhrK/nUAp9OqwUvv8gq
 wk5gsbNMuMx4UoVpRZeIDM54uwdIMvDSQb64ynWRDZkkg5pi34wyeXcMbsRkkUCe
 MVv0Dl+lVg7FyYyIRAnx
 =5o4s
 -----END PGP SIGNATURE-----

Merge tag 'actions-arm64-dt-for-4.15' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/afaerber/linux-actions into next/dt

Pull "Actions Semi ARM64 based SoC DT for v4.15" from Andreas Färber:

This updates the Bubblegum-96 DT with a clock node for the debug UART.

* tag 'actions-arm64-dt-for-4.15' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/afaerber/linux-actions:
  arm64: dts: actions: s900-bubblegum-96: Add fake uart5 clock
This commit is contained in:
Arnd Bergmann 2017-11-07 16:06:26 +01:00
commit 3ab6dd0416
1 changed files with 7 additions and 0 deletions
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7
arch/arm64/boot/dts/actions/s900-bubblegum-96.dts
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@ -24,6 +24,12 @@
device_type = "memory";
reg = <0x0 0x0 0x0 0x80000000>;
};
uart5_clk: uart5-clk {
compatible = "fixed-clock";
clock-frequency = <921600>;
#clock-cells = <0>;
};
};
&timer {
@ -32,4 +38,5 @@
&uart5 {
status = "okay";
clocks = <&uart5_clk>;
};