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x86/fpu: Rename 'xsave_hdr' to 'header'

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Code like:

           fpu->state->xsave.xsave_hdr.xstate_bv |= XSTATE_FP;

is an eyesore, because not only is the words 'xsave' and 'state'
are repeated twice times (!), but also because of the 'hdr' and 'bv'
abbreviations that are pretty meaningless at a first glance.

Start cleaning this up by renaming 'xsave_hdr' to 'header'.

Reviewed-by: Borislav Petkov <bp@alien8.de>
Cc: Andy Lutomirski <luto@amacapital.net>
Cc: Dave Hansen <dave.hansen@linux.intel.com>
Cc: Fenghua Yu <fenghua.yu@intel.com>
Cc: H. Peter Anvin <hpa@zytor.com>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Oleg Nesterov <oleg@redhat.com>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Ingo Molnar <mingo@kernel.org>
This commit is contained in:
Ingo Molnar 2015-04-24 10:14:36 +02:00
parent 8dcea8db79
commit 3a54450b5e
8 changed files with 30 additions and 30 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
arch/x86/include/asm/fpu/internal.h
View File

@ -261,7 +261,7 @@ static inline int fpu_save_init(struct fpu *fpu)
/*
* xsave header may indicate the init state of the FP.
*/
if (!(fpu->state->xsave.xsave_hdr.xstate_bv & XSTATE_FP))
if (!(fpu->state->xsave.header.xstate_bv & XSTATE_FP))
return 1;
} else if (use_fxsr()) {
fpu_fxsave(fpu);

4
arch/x86/include/asm/fpu/types.h
View File

@ -99,7 +99,7 @@ struct bndcsr {
u64 bndstatus;
} __packed;
struct xsave_hdr_struct {
struct xstate_header {
u64 xstate_bv;
u64 xcomp_bv;
u64 reserved[6];
@ -107,7 +107,7 @@ struct xsave_hdr_struct {
struct xsave_struct {
struct i387_fxsave_struct i387;
struct xsave_hdr_struct xsave_hdr;
struct xstate_header header;
struct ymmh_struct ymmh;
struct lwp_struct lwp;
struct bndreg bndreg[4];

2
arch/x86/include/asm/fpu/xsave.h
View File

@ -212,7 +212,7 @@ static inline int xsave_user(struct xsave_struct __user *buf)
* Clear the xsave header first, so that reserved fields are
* initialized to zero.
*/
err = __clear_user(&buf->xsave_hdr, sizeof(buf->xsave_hdr));
err = __clear_user(&buf->header, sizeof(buf->header));
if (unlikely(err))
return -EFAULT;

10
arch/x86/include/asm/user.h
View File

@ -14,7 +14,7 @@ struct user_ymmh_regs {
__u32 ymmh_space[64];
};
struct user_xsave_hdr {
struct user_xstate_header {
__u64 xstate_bv;
__u64 reserved1[2];
__u64 reserved2[5];
@ -41,11 +41,11 @@ struct user_xsave_hdr {
* particular process/thread.
*
* Also when the user modifies certain state FP/SSE/etc through the
* ptrace interface, they must ensure that the xsave_hdr.xstate_bv
* ptrace interface, they must ensure that the header.xstate_bv
* bytes[512..519] of the memory layout are updated correspondingly.
* i.e., for example when FP state is modified to a non-init state,
* xsave_hdr.xstate_bv's bit 0 must be set to '1', when SSE is modified to
* non-init state, xsave_hdr.xstate_bv's bit 1 must to be set to '1', etc.
* header.xstate_bv's bit 0 must be set to '1', when SSE is modified to
* non-init state, header.xstate_bv's bit 1 must to be set to '1', etc.
*/
#define USER_XSTATE_FX_SW_WORDS 6
#define USER_XSTATE_XCR0_WORD 0
@ -55,7 +55,7 @@ struct user_xstateregs {
__u64 fpx_space[58];
__u64 xstate_fx_sw[USER_XSTATE_FX_SW_WORDS];
} i387;
struct user_xsave_hdr xsave_hdr;
struct user_xstate_header header;
struct user_ymmh_regs ymmh;
/* further processor state extensions go here */
};

4
arch/x86/include/uapi/asm/sigcontext.h
View File

@ -209,7 +209,7 @@ struct sigcontext {
#endif /* !__i386__ */
struct _xsave_hdr {
struct _header {
__u64 xstate_bv;
__u64 reserved1[2];
__u64 reserved2[5];
@ -228,7 +228,7 @@ struct _ymmh_state {
*/
struct _xstate {
struct _fpstate fpstate;
struct _xsave_hdr xstate_hdr;
struct _header xstate_hdr;
struct _ymmh_state ymmh;
/* new processor state extensions go here */
};

8
arch/x86/kernel/fpu/core.c
View File

@ -470,7 +470,7 @@ int xfpregs_set(struct task_struct *target, const struct user_regset *regset,
* presence of FP and SSE state.
*/
if (cpu_has_xsave)
fpu->state->xsave.xsave_hdr.xstate_bv |= XSTATE_FPSSE;
fpu->state->xsave.header.xstate_bv |= XSTATE_FPSSE;
return ret;
}
@ -528,11 +528,11 @@ int xstateregs_set(struct task_struct *target, const struct user_regset *regset,
* mxcsr reserved bits must be masked to zero for security reasons.
*/
xsave->i387.mxcsr &= mxcsr_feature_mask;
xsave->xsave_hdr.xstate_bv &= xfeatures_mask;
xsave->header.xstate_bv &= xfeatures_mask;
/*
* These bits must be zero.
*/
memset(&xsave->xsave_hdr.reserved, 0, 48);
memset(&xsave->header.reserved, 0, 48);
return ret;
}
@ -740,7 +740,7 @@ int fpregs_set(struct task_struct *target, const struct user_regset *regset,
* presence of FP.
*/
if (cpu_has_xsave)
fpu->state->xsave.xsave_hdr.xstate_bv |= XSTATE_FP;
fpu->state->xsave.header.xstate_bv |= XSTATE_FP;
return ret;
}

22
arch/x86/kernel/fpu/xsave.c
View File

@ -32,7 +32,7 @@ static unsigned int xfeatures_nr;
/*
* If a processor implementation discern that a processor state component is
* in its initialized state it may modify the corresponding bit in the
* xsave_hdr.xstate_bv as '0', with out modifying the corresponding memory
* header.xstate_bv as '0', with out modifying the corresponding memory
* layout in the case of xsaveopt. While presenting the xstate information to
* the user, we always ensure that the memory layout of a feature will be in
* the init state if the corresponding header bit is zero. This is to ensure
@ -48,7 +48,7 @@ void __sanitize_i387_state(struct task_struct *tsk)
if (!fx)
return;
xstate_bv = tsk->thread.fpu.state->xsave.xsave_hdr.xstate_bv;
xstate_bv = tsk->thread.fpu.state->xsave.header.xstate_bv;
/*
* None of the feature bits are in init state. So nothing else
@ -106,7 +106,7 @@ static inline int check_for_xstate(struct i387_fxsave_struct __user *buf,
struct _fpx_sw_bytes *fx_sw)
{
int min_xstate_size = sizeof(struct i387_fxsave_struct) +
sizeof(struct xsave_hdr_struct);
sizeof(struct xstate_header);
unsigned int magic2;
if (__copy_from_user(fx_sw, &buf->sw_reserved[0], sizeof(*fx_sw)))
@ -178,7 +178,7 @@ static inline int save_xstate_epilog(void __user *buf, int ia32_frame)
* Read the xstate_bv which we copied (directly from the cpu or
* from the state in task struct) to the user buffers.
*/
err |= __get_user(xstate_bv, (__u32 *)&x->xsave_hdr.xstate_bv);
err |= __get_user(xstate_bv, (__u32 *)&x->header.xstate_bv);
/*
* For legacy compatible, we always set FP/SSE bits in the bit
@ -193,7 +193,7 @@ static inline int save_xstate_epilog(void __user *buf, int ia32_frame)
*/
xstate_bv |= XSTATE_FPSSE;
err |= __put_user(xstate_bv, (__u32 *)&x->xsave_hdr.xstate_bv);
err |= __put_user(xstate_bv, (__u32 *)&x->header.xstate_bv);
return err;
}
@ -280,20 +280,20 @@ sanitize_restored_xstate(struct task_struct *tsk,
u64 xstate_bv, int fx_only)
{
struct xsave_struct *xsave = &tsk->thread.fpu.state->xsave;
struct xsave_hdr_struct *xsave_hdr = &xsave->xsave_hdr;
struct xstate_header *header = &xsave->header;
if (use_xsave()) {
/* These bits must be zero. */
memset(xsave_hdr->reserved, 0, 48);
memset(header->reserved, 0, 48);
/*
* Init the state that is not present in the memory
* layout and not enabled by the OS.
*/
if (fx_only)
xsave_hdr->xstate_bv = XSTATE_FPSSE;
header->xstate_bv = XSTATE_FPSSE;
else
xsave_hdr->xstate_bv &= (xfeatures_mask & xstate_bv);
header->xstate_bv &= (xfeatures_mask & xstate_bv);
}
if (use_fxsr()) {
@ -574,9 +574,9 @@ static void __init setup_init_fpu_buf(void)
print_xstate_features();
if (cpu_has_xsaves) {
init_xstate_buf->xsave_hdr.xcomp_bv =
init_xstate_buf->header.xcomp_bv =
(u64)1 << 63 | xfeatures_mask;
init_xstate_buf->xsave_hdr.xstate_bv = xfeatures_mask;
init_xstate_buf->header.xstate_bv = xfeatures_mask;
}
/*

8
arch/x86/kvm/x86.c
View File

@ -3197,7 +3197,7 @@ static int kvm_vcpu_ioctl_x86_set_debugregs(struct kvm_vcpu *vcpu,
static void fill_xsave(u8 *dest, struct kvm_vcpu *vcpu)
{
struct xsave_struct *xsave = &vcpu->arch.guest_fpu.state->xsave;
u64 xstate_bv = xsave->xsave_hdr.xstate_bv;
u64 xstate_bv = xsave->header.xstate_bv;
u64 valid;
/*
@ -3243,9 +3243,9 @@ static void load_xsave(struct kvm_vcpu *vcpu, u8 *src)
memcpy(xsave, src, XSAVE_HDR_OFFSET);
/* Set XSTATE_BV and possibly XCOMP_BV. */
xsave->xsave_hdr.xstate_bv = xstate_bv;
xsave->header.xstate_bv = xstate_bv;
if (cpu_has_xsaves)
xsave->xsave_hdr.xcomp_bv = host_xcr0 | XSTATE_COMPACTION_ENABLED;
xsave->header.xcomp_bv = host_xcr0 | XSTATE_COMPACTION_ENABLED;
/*
* Copy each region from the non-compacted offset to the
@ -7014,7 +7014,7 @@ int fx_init(struct kvm_vcpu *vcpu)
fpstate_init(&vcpu->arch.guest_fpu);
if (cpu_has_xsaves)
vcpu->arch.guest_fpu.state->xsave.xsave_hdr.xcomp_bv =
vcpu->arch.guest_fpu.state->xsave.header.xcomp_bv =
host_xcr0 | XSTATE_COMPACTION_ENABLED;
/*