dt-bindings: Improve phandle-array schemas
The 'phandle-array' type is a bit ambiguous. It can be either just an array of phandles or an array of phandles plus args. Many schemas for phandle-array properties aren't clear in the schema which case applies though the description usually describes it. The array of phandles case boils down to needing: items: maxItems: 1 The phandle plus args cases should typically take this form: items: - items: - description: A phandle - description: 1st arg cell - description: 2nd arg cell With this change, some examples need updating so that the bracketing of property values matches the schema. Signed-off-by: Rob Herring <robh@kernel.org> Acked-by: Viresh Kumar <viresh.kumar@linaro.org> Acked-by: Vinod Koul <vkoul@kernel.org> Acked-by: Ulf Hansson <ulf.hansson@linaro.org> Acked-by: Georgi Djakov <djakov@kernel.org> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Mark Brown <broonie@kernel.org> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> Acked-by: Stephen Boyd <sboyd@kernel.org> Acked-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Acked-by: Marc Kleine-Budde <mkl@pengutronix.de> Link: https://lore.kernel.org/r/20220119015038.2433585-1-robh@kernel.org
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@ -243,6 +243,8 @@ properties:
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cpu-idle-states:
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cpu-idle-states:
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$ref: '/schemas/types.yaml#/definitions/phandle-array'
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$ref: '/schemas/types.yaml#/definitions/phandle-array'
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items:
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maxItems: 1
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description: |
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description: |
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List of phandles to idle state nodes supported
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List of phandles to idle state nodes supported
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by this cpu (see ./idle-states.yaml).
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by this cpu (see ./idle-states.yaml).
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@ -337,8 +337,8 @@ examples:
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compatible = "arm,cortex-a57";
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compatible = "arm,cortex-a57";
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reg = <0x0 0x0>;
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reg = <0x0 0x0>;
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enable-method = "psci";
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enable-method = "psci";
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cpu-idle-states = <&CPU_RETENTION_0_0 &CPU_SLEEP_0_0
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cpu-idle-states = <&CPU_RETENTION_0_0>, <&CPU_SLEEP_0_0>,
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&CLUSTER_RETENTION_0 &CLUSTER_SLEEP_0>;
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<&CLUSTER_RETENTION_0>, <&CLUSTER_SLEEP_0>;
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};
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};
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cpu@1 {
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cpu@1 {
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@ -346,8 +346,8 @@ examples:
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compatible = "arm,cortex-a57";
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compatible = "arm,cortex-a57";
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reg = <0x0 0x1>;
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reg = <0x0 0x1>;
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enable-method = "psci";
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enable-method = "psci";
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cpu-idle-states = <&CPU_RETENTION_0_0 &CPU_SLEEP_0_0
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cpu-idle-states = <&CPU_RETENTION_0_0>, <&CPU_SLEEP_0_0>,
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&CLUSTER_RETENTION_0 &CLUSTER_SLEEP_0>;
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<&CLUSTER_RETENTION_0>, <&CLUSTER_SLEEP_0>;
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};
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};
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cpu@100 {
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cpu@100 {
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@ -355,8 +355,8 @@ examples:
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compatible = "arm,cortex-a57";
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compatible = "arm,cortex-a57";
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reg = <0x0 0x100>;
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reg = <0x0 0x100>;
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enable-method = "psci";
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enable-method = "psci";
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cpu-idle-states = <&CPU_RETENTION_0_0 &CPU_SLEEP_0_0
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cpu-idle-states = <&CPU_RETENTION_0_0>, <&CPU_SLEEP_0_0>,
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&CLUSTER_RETENTION_0 &CLUSTER_SLEEP_0>;
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<&CLUSTER_RETENTION_0>, <&CLUSTER_SLEEP_0>;
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};
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};
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cpu@101 {
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cpu@101 {
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@ -364,8 +364,8 @@ examples:
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compatible = "arm,cortex-a57";
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compatible = "arm,cortex-a57";
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reg = <0x0 0x101>;
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reg = <0x0 0x101>;
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enable-method = "psci";
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enable-method = "psci";
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cpu-idle-states = <&CPU_RETENTION_0_0 &CPU_SLEEP_0_0
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cpu-idle-states = <&CPU_RETENTION_0_0>, <&CPU_SLEEP_0_0>,
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&CLUSTER_RETENTION_0 &CLUSTER_SLEEP_0>;
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<&CLUSTER_RETENTION_0>, <&CLUSTER_SLEEP_0>;
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};
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};
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cpu@10000 {
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cpu@10000 {
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@ -373,8 +373,8 @@ examples:
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compatible = "arm,cortex-a57";
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compatible = "arm,cortex-a57";
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reg = <0x0 0x10000>;
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reg = <0x0 0x10000>;
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enable-method = "psci";
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enable-method = "psci";
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cpu-idle-states = <&CPU_RETENTION_0_0 &CPU_SLEEP_0_0
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cpu-idle-states = <&CPU_RETENTION_0_0>, <&CPU_SLEEP_0_0>,
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&CLUSTER_RETENTION_0 &CLUSTER_SLEEP_0>;
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<&CLUSTER_RETENTION_0>, <&CLUSTER_SLEEP_0>;
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};
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};
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cpu@10001 {
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cpu@10001 {
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@ -382,8 +382,8 @@ examples:
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compatible = "arm,cortex-a57";
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compatible = "arm,cortex-a57";
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reg = <0x0 0x10001>;
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reg = <0x0 0x10001>;
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enable-method = "psci";
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enable-method = "psci";
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cpu-idle-states = <&CPU_RETENTION_0_0 &CPU_SLEEP_0_0
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cpu-idle-states = <&CPU_RETENTION_0_0>, <&CPU_SLEEP_0_0>,
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&CLUSTER_RETENTION_0 &CLUSTER_SLEEP_0>;
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<&CLUSTER_RETENTION_0>, <&CLUSTER_SLEEP_0>;
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};
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};
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cpu@10100 {
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cpu@10100 {
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@ -391,8 +391,8 @@ examples:
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compatible = "arm,cortex-a57";
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compatible = "arm,cortex-a57";
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reg = <0x0 0x10100>;
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reg = <0x0 0x10100>;
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enable-method = "psci";
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enable-method = "psci";
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cpu-idle-states = <&CPU_RETENTION_0_0 &CPU_SLEEP_0_0
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cpu-idle-states = <&CPU_RETENTION_0_0>, <&CPU_SLEEP_0_0>,
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&CLUSTER_RETENTION_0 &CLUSTER_SLEEP_0>;
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<&CLUSTER_RETENTION_0>, <&CLUSTER_SLEEP_0>;
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};
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};
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cpu@10101 {
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cpu@10101 {
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@ -400,8 +400,8 @@ examples:
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compatible = "arm,cortex-a57";
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compatible = "arm,cortex-a57";
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reg = <0x0 0x10101>;
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reg = <0x0 0x10101>;
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enable-method = "psci";
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enable-method = "psci";
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cpu-idle-states = <&CPU_RETENTION_0_0 &CPU_SLEEP_0_0
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cpu-idle-states = <&CPU_RETENTION_0_0>, <&CPU_SLEEP_0_0>,
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&CLUSTER_RETENTION_0 &CLUSTER_SLEEP_0>;
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<&CLUSTER_RETENTION_0>, <&CLUSTER_SLEEP_0>;
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};
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};
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cpu@100000000 {
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cpu@100000000 {
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@ -409,8 +409,8 @@ examples:
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compatible = "arm,cortex-a53";
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compatible = "arm,cortex-a53";
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reg = <0x1 0x0>;
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reg = <0x1 0x0>;
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enable-method = "psci";
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enable-method = "psci";
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cpu-idle-states = <&CPU_RETENTION_1_0 &CPU_SLEEP_1_0
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cpu-idle-states = <&CPU_RETENTION_1_0>, <&CPU_SLEEP_1_0>,
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&CLUSTER_RETENTION_1 &CLUSTER_SLEEP_1>;
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<&CLUSTER_RETENTION_1>, <&CLUSTER_SLEEP_1>;
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};
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};
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cpu@100000001 {
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cpu@100000001 {
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@ -418,8 +418,8 @@ examples:
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compatible = "arm,cortex-a53";
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compatible = "arm,cortex-a53";
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reg = <0x1 0x1>;
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reg = <0x1 0x1>;
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enable-method = "psci";
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enable-method = "psci";
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cpu-idle-states = <&CPU_RETENTION_1_0 &CPU_SLEEP_1_0
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cpu-idle-states = <&CPU_RETENTION_1_0>, <&CPU_SLEEP_1_0>,
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&CLUSTER_RETENTION_1 &CLUSTER_SLEEP_1>;
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<&CLUSTER_RETENTION_1>, <&CLUSTER_SLEEP_1>;
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};
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};
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cpu@100000100 {
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cpu@100000100 {
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@ -427,8 +427,8 @@ examples:
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compatible = "arm,cortex-a53";
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compatible = "arm,cortex-a53";
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reg = <0x1 0x100>;
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reg = <0x1 0x100>;
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enable-method = "psci";
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enable-method = "psci";
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cpu-idle-states = <&CPU_RETENTION_1_0 &CPU_SLEEP_1_0
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cpu-idle-states = <&CPU_RETENTION_1_0>, <&CPU_SLEEP_1_0>,
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&CLUSTER_RETENTION_1 &CLUSTER_SLEEP_1>;
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<&CLUSTER_RETENTION_1>, <&CLUSTER_SLEEP_1>;
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};
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};
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cpu@100000101 {
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cpu@100000101 {
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@ -436,8 +436,8 @@ examples:
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compatible = "arm,cortex-a53";
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compatible = "arm,cortex-a53";
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reg = <0x1 0x101>;
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reg = <0x1 0x101>;
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enable-method = "psci";
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enable-method = "psci";
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cpu-idle-states = <&CPU_RETENTION_1_0 &CPU_SLEEP_1_0
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cpu-idle-states = <&CPU_RETENTION_1_0>, <&CPU_SLEEP_1_0>,
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&CLUSTER_RETENTION_1 &CLUSTER_SLEEP_1>;
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<&CLUSTER_RETENTION_1>, <&CLUSTER_SLEEP_1>;
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};
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};
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cpu@100010000 {
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cpu@100010000 {
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@ -445,8 +445,8 @@ examples:
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compatible = "arm,cortex-a53";
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compatible = "arm,cortex-a53";
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reg = <0x1 0x10000>;
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reg = <0x1 0x10000>;
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enable-method = "psci";
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enable-method = "psci";
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cpu-idle-states = <&CPU_RETENTION_1_0 &CPU_SLEEP_1_0
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cpu-idle-states = <&CPU_RETENTION_1_0>, <&CPU_SLEEP_1_0>,
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&CLUSTER_RETENTION_1 &CLUSTER_SLEEP_1>;
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<&CLUSTER_RETENTION_1>, <&CLUSTER_SLEEP_1>;
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};
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};
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cpu@100010001 {
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cpu@100010001 {
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@ -454,8 +454,8 @@ examples:
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compatible = "arm,cortex-a53";
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compatible = "arm,cortex-a53";
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reg = <0x1 0x10001>;
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reg = <0x1 0x10001>;
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enable-method = "psci";
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enable-method = "psci";
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cpu-idle-states = <&CPU_RETENTION_1_0 &CPU_SLEEP_1_0
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cpu-idle-states = <&CPU_RETENTION_1_0>, <&CPU_SLEEP_1_0>,
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&CLUSTER_RETENTION_1 &CLUSTER_SLEEP_1>;
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<&CLUSTER_RETENTION_1>, <&CLUSTER_SLEEP_1>;
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};
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};
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cpu@100010100 {
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cpu@100010100 {
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@ -463,8 +463,8 @@ examples:
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compatible = "arm,cortex-a53";
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compatible = "arm,cortex-a53";
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reg = <0x1 0x10100>;
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reg = <0x1 0x10100>;
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enable-method = "psci";
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enable-method = "psci";
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cpu-idle-states = <&CPU_RETENTION_1_0 &CPU_SLEEP_1_0
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cpu-idle-states = <&CPU_RETENTION_1_0>, <&CPU_SLEEP_1_0>,
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&CLUSTER_RETENTION_1 &CLUSTER_SLEEP_1>;
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<&CLUSTER_RETENTION_1>, <&CLUSTER_SLEEP_1>;
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};
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};
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cpu@100010101 {
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cpu@100010101 {
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@ -472,8 +472,8 @@ examples:
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compatible = "arm,cortex-a53";
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compatible = "arm,cortex-a53";
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reg = <0x1 0x10101>;
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reg = <0x1 0x10101>;
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enable-method = "psci";
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enable-method = "psci";
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cpu-idle-states = <&CPU_RETENTION_1_0 &CPU_SLEEP_1_0
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cpu-idle-states = <&CPU_RETENTION_1_0>, <&CPU_SLEEP_1_0>,
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&CLUSTER_RETENTION_1 &CLUSTER_SLEEP_1>;
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<&CLUSTER_RETENTION_1>, <&CLUSTER_SLEEP_1>;
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};
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};
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idle-states {
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idle-states {
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@ -567,56 +567,56 @@ examples:
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device_type = "cpu";
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device_type = "cpu";
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compatible = "arm,cortex-a15";
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compatible = "arm,cortex-a15";
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reg = <0x0>;
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reg = <0x0>;
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cpu-idle-states = <&cpu_sleep_0_0 &cluster_sleep_0>;
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cpu-idle-states = <&cpu_sleep_0_0>, <&cluster_sleep_0>;
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};
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};
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cpu@1 {
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cpu@1 {
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device_type = "cpu";
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device_type = "cpu";
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compatible = "arm,cortex-a15";
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compatible = "arm,cortex-a15";
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reg = <0x1>;
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reg = <0x1>;
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cpu-idle-states = <&cpu_sleep_0_0 &cluster_sleep_0>;
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cpu-idle-states = <&cpu_sleep_0_0>, <&cluster_sleep_0>;
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};
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};
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cpu@2 {
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cpu@2 {
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device_type = "cpu";
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device_type = "cpu";
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compatible = "arm,cortex-a15";
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compatible = "arm,cortex-a15";
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reg = <0x2>;
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reg = <0x2>;
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cpu-idle-states = <&cpu_sleep_0_0 &cluster_sleep_0>;
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cpu-idle-states = <&cpu_sleep_0_0>, <&cluster_sleep_0>;
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};
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};
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cpu@3 {
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cpu@3 {
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device_type = "cpu";
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device_type = "cpu";
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compatible = "arm,cortex-a15";
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compatible = "arm,cortex-a15";
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reg = <0x3>;
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reg = <0x3>;
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cpu-idle-states = <&cpu_sleep_0_0 &cluster_sleep_0>;
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cpu-idle-states = <&cpu_sleep_0_0>, <&cluster_sleep_0>;
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};
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};
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cpu@100 {
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cpu@100 {
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device_type = "cpu";
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device_type = "cpu";
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compatible = "arm,cortex-a7";
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compatible = "arm,cortex-a7";
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reg = <0x100>;
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reg = <0x100>;
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cpu-idle-states = <&cpu_sleep_1_0 &cluster_sleep_1>;
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cpu-idle-states = <&cpu_sleep_1_0>, <&cluster_sleep_1>;
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};
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};
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cpu@101 {
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cpu@101 {
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device_type = "cpu";
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device_type = "cpu";
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compatible = "arm,cortex-a7";
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compatible = "arm,cortex-a7";
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reg = <0x101>;
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reg = <0x101>;
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cpu-idle-states = <&cpu_sleep_1_0 &cluster_sleep_1>;
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cpu-idle-states = <&cpu_sleep_1_0>, <&cluster_sleep_1>;
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};
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};
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cpu@102 {
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cpu@102 {
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device_type = "cpu";
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device_type = "cpu";
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compatible = "arm,cortex-a7";
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compatible = "arm,cortex-a7";
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reg = <0x102>;
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reg = <0x102>;
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cpu-idle-states = <&cpu_sleep_1_0 &cluster_sleep_1>;
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cpu-idle-states = <&cpu_sleep_1_0>, <&cluster_sleep_1>;
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};
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};
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cpu@103 {
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cpu@103 {
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device_type = "cpu";
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device_type = "cpu";
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compatible = "arm,cortex-a7";
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compatible = "arm,cortex-a7";
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reg = <0x103>;
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reg = <0x103>;
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cpu-idle-states = <&cpu_sleep_1_0 &cluster_sleep_1>;
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cpu-idle-states = <&cpu_sleep_1_0>, <&cluster_sleep_1>;
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};
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};
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idle-states {
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idle-states {
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@ -66,6 +66,8 @@ properties:
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interrupt-affinity:
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interrupt-affinity:
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$ref: /schemas/types.yaml#/definitions/phandle-array
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$ref: /schemas/types.yaml#/definitions/phandle-array
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items:
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maxItems: 1
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description:
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description:
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When using SPIs, specifies a list of phandles to CPU
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When using SPIs, specifies a list of phandles to CPU
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nodes corresponding directly to the affinity of
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nodes corresponding directly to the affinity of
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@ -51,6 +51,9 @@ properties:
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$ref: /schemas/types.yaml#/definitions/phandle-array
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$ref: /schemas/types.yaml#/definitions/phandle-array
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minItems: 1
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minItems: 1
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maxItems: 8
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maxItems: 8
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items:
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minItems: 2
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maxItems: 2
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calxeda,tx-atten:
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calxeda,tx-atten:
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description: |
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description: |
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The SRAM that needs to be claimed to access the display engine
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The SRAM that needs to be claimed to access the display engine
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bus.
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bus.
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$ref: /schemas/types.yaml#/definitions/phandle-array
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$ref: /schemas/types.yaml#/definitions/phandle-array
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maxItems: 1
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items:
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- items:
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- description: phandle to SRAM
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- description: register value for device
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ranges: true
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ranges: true
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@ -22,19 +22,28 @@ properties:
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|||||||
|
|
||||||
intel,npe-handle:
|
intel,npe-handle:
|
||||||
$ref: '/schemas/types.yaml#/definitions/phandle-array'
|
$ref: '/schemas/types.yaml#/definitions/phandle-array'
|
||||||
maxItems: 1
|
items:
|
||||||
|
- items:
|
||||||
|
- description: phandle to the NPE this crypto engine
|
||||||
|
- description: the NPE instance number
|
||||||
description: phandle to the NPE this crypto engine is using, the cell
|
description: phandle to the NPE this crypto engine is using, the cell
|
||||||
describing the NPE instance to be used.
|
describing the NPE instance to be used.
|
||||||
|
|
||||||
queue-rx:
|
queue-rx:
|
||||||
$ref: /schemas/types.yaml#/definitions/phandle-array
|
$ref: /schemas/types.yaml#/definitions/phandle-array
|
||||||
maxItems: 1
|
items:
|
||||||
|
- items:
|
||||||
|
- description: phandle to the RX queue on the NPE
|
||||||
|
- description: the queue instance number
|
||||||
description: phandle to the RX queue on the NPE, the cell describing
|
description: phandle to the RX queue on the NPE, the cell describing
|
||||||
the queue instance to be used.
|
the queue instance to be used.
|
||||||
|
|
||||||
queue-txready:
|
queue-txready:
|
||||||
$ref: /schemas/types.yaml#/definitions/phandle-array
|
$ref: /schemas/types.yaml#/definitions/phandle-array
|
||||||
maxItems: 1
|
items:
|
||||||
|
- items:
|
||||||
|
- description: phandle to the TX READY queue on the NPE
|
||||||
|
- description: the queue instance number
|
||||||
description: phandle to the TX READY queue on the NPE, the cell describing
|
description: phandle to the TX READY queue on the NPE, the cell describing
|
||||||
the queue instance to be used.
|
the queue instance to be used.
|
||||||
|
|
||||||
|
@ -69,6 +69,8 @@ properties:
|
|||||||
$ref: /schemas/types.yaml#/definitions/phandle-array
|
$ref: /schemas/types.yaml#/definitions/phandle-array
|
||||||
minItems: 1
|
minItems: 1
|
||||||
maxItems: 2
|
maxItems: 2
|
||||||
|
items:
|
||||||
|
maxItems: 1
|
||||||
description: |
|
description: |
|
||||||
Available display engine frontends (DE 1.0) or mixers (DE
|
Available display engine frontends (DE 1.0) or mixers (DE
|
||||||
2.0/3.0) available.
|
2.0/3.0) available.
|
||||||
|
@ -51,7 +51,10 @@ properties:
|
|||||||
|
|
||||||
mediatek,syscon-hdmi:
|
mediatek,syscon-hdmi:
|
||||||
$ref: '/schemas/types.yaml#/definitions/phandle-array'
|
$ref: '/schemas/types.yaml#/definitions/phandle-array'
|
||||||
maxItems: 1
|
items:
|
||||||
|
- items:
|
||||||
|
- description: phandle to system configuration registers
|
||||||
|
- description: register offset in the system configuration registers
|
||||||
description: |
|
description: |
|
||||||
phandle link and register offset to the system configuration registers.
|
phandle link and register offset to the system configuration registers.
|
||||||
|
|
||||||
|
@ -64,6 +64,8 @@ properties:
|
|||||||
$ref: /schemas/types.yaml#/definitions/phandle-array
|
$ref: /schemas/types.yaml#/definitions/phandle-array
|
||||||
minItems: 1
|
minItems: 1
|
||||||
maxItems: 4
|
maxItems: 4
|
||||||
|
items:
|
||||||
|
maxItems: 1
|
||||||
description: |
|
description: |
|
||||||
phandles to one or more reserved on-chip SRAM regions.
|
phandles to one or more reserved on-chip SRAM regions.
|
||||||
phandle to the On Chip Memory (OCMEM) that's present on some a3xx and
|
phandle to the On Chip Memory (OCMEM) that's present on some a3xx and
|
||||||
|
@ -76,17 +76,21 @@ properties:
|
|||||||
|
|
||||||
renesas,cmms:
|
renesas,cmms:
|
||||||
$ref: "/schemas/types.yaml#/definitions/phandle-array"
|
$ref: "/schemas/types.yaml#/definitions/phandle-array"
|
||||||
|
items:
|
||||||
|
maxItems: 1
|
||||||
description:
|
description:
|
||||||
A list of phandles to the CMM instances present in the SoC, one for each
|
A list of phandles to the CMM instances present in the SoC, one for each
|
||||||
available DU channel.
|
available DU channel.
|
||||||
|
|
||||||
renesas,vsps:
|
renesas,vsps:
|
||||||
$ref: "/schemas/types.yaml#/definitions/phandle-array"
|
$ref: "/schemas/types.yaml#/definitions/phandle-array"
|
||||||
|
items:
|
||||||
|
items:
|
||||||
|
- description: phandle to VSP instance that serves the DU channel
|
||||||
|
- description: Channel index identifying the LIF instance in that VSP
|
||||||
description:
|
description:
|
||||||
A list of phandle and channel index tuples to the VSPs that handle the
|
A list of phandle and channel index tuples to the VSPs that handle the
|
||||||
memory interfaces for the DU channels. The phandle identifies the VSP
|
memory interfaces for the DU channels.
|
||||||
instance that serves the DU channel, and the channel index identifies
|
|
||||||
the LIF instance in that VSP.
|
|
||||||
|
|
||||||
required:
|
required:
|
||||||
- compatible
|
- compatible
|
||||||
|
@ -21,6 +21,8 @@ properties:
|
|||||||
|
|
||||||
ports:
|
ports:
|
||||||
$ref: /schemas/types.yaml#/definitions/phandle-array
|
$ref: /schemas/types.yaml#/definitions/phandle-array
|
||||||
|
items:
|
||||||
|
maxItems: 1
|
||||||
description: |
|
description: |
|
||||||
Should contain a list of phandles pointing to display interface port
|
Should contain a list of phandles pointing to display interface port
|
||||||
of vop devices. vop definitions as defined in
|
of vop devices. vop definitions as defined in
|
||||||
|
@ -45,6 +45,8 @@ properties:
|
|||||||
|
|
||||||
ports:
|
ports:
|
||||||
$ref: /schemas/types.yaml#/definitions/phandle-array
|
$ref: /schemas/types.yaml#/definitions/phandle-array
|
||||||
|
items:
|
||||||
|
maxItems: 1
|
||||||
description:
|
description:
|
||||||
Should contain a list of phandles pointing to display interface port
|
Should contain a list of phandles pointing to display interface port
|
||||||
of DPU devices.
|
of DPU devices.
|
||||||
|
@ -88,8 +88,7 @@ properties:
|
|||||||
The DSS DPI output port node from video port 2
|
The DSS DPI output port node from video port 2
|
||||||
|
|
||||||
ti,am65x-oldi-io-ctrl:
|
ti,am65x-oldi-io-ctrl:
|
||||||
$ref: "/schemas/types.yaml#/definitions/phandle-array"
|
$ref: "/schemas/types.yaml#/definitions/phandle"
|
||||||
maxItems: 1
|
|
||||||
description:
|
description:
|
||||||
phandle to syscon device node mapping OLDI IO_CTRL registers.
|
phandle to syscon device node mapping OLDI IO_CTRL registers.
|
||||||
The mapped range should point to OLDI_DAT0_IO_CTRL, map it and
|
The mapped range should point to OLDI_DAT0_IO_CTRL, map it and
|
||||||
|
@ -24,6 +24,8 @@ properties:
|
|||||||
|
|
||||||
dma-masters:
|
dma-masters:
|
||||||
$ref: /schemas/types.yaml#/definitions/phandle-array
|
$ref: /schemas/types.yaml#/definitions/phandle-array
|
||||||
|
items:
|
||||||
|
maxItems: 1
|
||||||
description:
|
description:
|
||||||
Array of phandles to the DMA controllers the router can direct
|
Array of phandles to the DMA controllers the router can direct
|
||||||
the signal to.
|
the signal to.
|
||||||
|
@ -46,7 +46,7 @@ examples:
|
|||||||
#dma-cells = <3>;
|
#dma-cells = <3>;
|
||||||
dma-requests = <128>;
|
dma-requests = <128>;
|
||||||
dma-channels = <16>;
|
dma-channels = <16>;
|
||||||
dma-masters = <&dma1 &dma2>;
|
dma-masters = <&dma1>, <&dma2>;
|
||||||
clocks = <&timer_clk>;
|
clocks = <&timer_clk>;
|
||||||
};
|
};
|
||||||
|
|
||||||
|
@ -43,7 +43,6 @@ properties:
|
|||||||
|
|
||||||
performance-domains:
|
performance-domains:
|
||||||
$ref: '/schemas/types.yaml#/definitions/phandle-array'
|
$ref: '/schemas/types.yaml#/definitions/phandle-array'
|
||||||
maxItems: 1
|
|
||||||
description:
|
description:
|
||||||
A phandle and performance domain specifier as defined by bindings of the
|
A phandle and performance domain specifier as defined by bindings of the
|
||||||
performance controller/provider specified by phandle.
|
performance controller/provider specified by phandle.
|
||||||
|
@ -330,7 +330,7 @@ examples:
|
|||||||
firmware {
|
firmware {
|
||||||
scmi {
|
scmi {
|
||||||
compatible = "arm,scmi-smc";
|
compatible = "arm,scmi-smc";
|
||||||
shmem = <&cpu_scp_lpri0 &cpu_scp_lpri1>;
|
shmem = <&cpu_scp_lpri0>, <&cpu_scp_lpri1>;
|
||||||
arm,smc-id = <0xc3000001>;
|
arm,smc-id = <0xc3000001>;
|
||||||
|
|
||||||
#address-cells = <1>;
|
#address-cells = <1>;
|
||||||
|
@ -236,7 +236,7 @@ examples:
|
|||||||
scpi {
|
scpi {
|
||||||
compatible = "amlogic,meson-gxbb-scpi", "arm,scpi-pre-1.0";
|
compatible = "amlogic,meson-gxbb-scpi", "arm,scpi-pre-1.0";
|
||||||
mboxes = <&mailbox 1 &mailbox 2>;
|
mboxes = <&mailbox 1 &mailbox 2>;
|
||||||
shmem = <&cpu_scp_lpri &cpu_scp_hpri>;
|
shmem = <&cpu_scp_lpri>, <&cpu_scp_hpri>;
|
||||||
|
|
||||||
scpi_sensors1: sensors {
|
scpi_sensors1: sensors {
|
||||||
compatible = "amlogic,meson-gxbb-scpi-sensors", "arm,scpi-sensors";
|
compatible = "amlogic,meson-gxbb-scpi-sensors", "arm,scpi-sensors";
|
||||||
|
@ -121,6 +121,8 @@ properties:
|
|||||||
|
|
||||||
qcom,bcm-voters:
|
qcom,bcm-voters:
|
||||||
$ref: /schemas/types.yaml#/definitions/phandle-array
|
$ref: /schemas/types.yaml#/definitions/phandle-array
|
||||||
|
items:
|
||||||
|
maxItems: 1
|
||||||
description: |
|
description: |
|
||||||
List of phandles to qcom,bcm-voter nodes that are required by
|
List of phandles to qcom,bcm-voter nodes that are required by
|
||||||
this interconnect to send RPMh commands.
|
this interconnect to send RPMh commands.
|
||||||
|
@ -138,6 +138,8 @@ properties:
|
|||||||
properties:
|
properties:
|
||||||
affinity:
|
affinity:
|
||||||
$ref: /schemas/types.yaml#/definitions/phandle-array
|
$ref: /schemas/types.yaml#/definitions/phandle-array
|
||||||
|
items:
|
||||||
|
maxItems: 1
|
||||||
description:
|
description:
|
||||||
Should be a list of phandles to CPU nodes (as described in
|
Should be a list of phandles to CPU nodes (as described in
|
||||||
Documentation/devicetree/bindings/arm/cpus.yaml).
|
Documentation/devicetree/bindings/arm/cpus.yaml).
|
||||||
@ -273,11 +275,11 @@ examples:
|
|||||||
|
|
||||||
ppi-partitions {
|
ppi-partitions {
|
||||||
part0: interrupt-partition-0 {
|
part0: interrupt-partition-0 {
|
||||||
affinity = <&cpu0 &cpu2>;
|
affinity = <&cpu0>, <&cpu2>;
|
||||||
};
|
};
|
||||||
|
|
||||||
part1: interrupt-partition-1 {
|
part1: interrupt-partition-1 {
|
||||||
affinity = <&cpu1 &cpu3>;
|
affinity = <&cpu1>, <&cpu3>;
|
||||||
};
|
};
|
||||||
};
|
};
|
||||||
};
|
};
|
||||||
|
@ -77,6 +77,8 @@ properties:
|
|||||||
|
|
||||||
ti,unmapped-event-sources:
|
ti,unmapped-event-sources:
|
||||||
$ref: /schemas/types.yaml#/definitions/phandle-array
|
$ref: /schemas/types.yaml#/definitions/phandle-array
|
||||||
|
items:
|
||||||
|
maxItems: 1
|
||||||
description:
|
description:
|
||||||
Array of phandles to DMA controllers where the unmapped events originate.
|
Array of phandles to DMA controllers where the unmapped events originate.
|
||||||
|
|
||||||
|
@ -101,6 +101,8 @@ properties:
|
|||||||
$ref: /schemas/types.yaml#/definitions/phandle-array
|
$ref: /schemas/types.yaml#/definitions/phandle-array
|
||||||
minItems: 1
|
minItems: 1
|
||||||
maxItems: 32
|
maxItems: 32
|
||||||
|
items:
|
||||||
|
maxItems: 1
|
||||||
description: |
|
description: |
|
||||||
List of phandle to the local arbiters in the current Socs.
|
List of phandle to the local arbiters in the current Socs.
|
||||||
Refer to bindings/memory-controllers/mediatek,smi-larb.yaml. It must sort
|
Refer to bindings/memory-controllers/mediatek,smi-larb.yaml. It must sort
|
||||||
@ -167,8 +169,8 @@ examples:
|
|||||||
interrupts = <GIC_SPI 139 IRQ_TYPE_LEVEL_LOW>;
|
interrupts = <GIC_SPI 139 IRQ_TYPE_LEVEL_LOW>;
|
||||||
clocks = <&infracfg CLK_INFRA_M4U>;
|
clocks = <&infracfg CLK_INFRA_M4U>;
|
||||||
clock-names = "bclk";
|
clock-names = "bclk";
|
||||||
mediatek,larbs = <&larb0 &larb1 &larb2
|
mediatek,larbs = <&larb0>, <&larb1>, <&larb2>,
|
||||||
&larb3 &larb4 &larb5>;
|
<&larb3>, <&larb4>, <&larb5>;
|
||||||
#iommu-cells = <1>;
|
#iommu-cells = <1>;
|
||||||
};
|
};
|
||||||
|
|
||||||
|
@ -66,6 +66,12 @@ properties:
|
|||||||
|
|
||||||
renesas,ipmmu-main:
|
renesas,ipmmu-main:
|
||||||
$ref: /schemas/types.yaml#/definitions/phandle-array
|
$ref: /schemas/types.yaml#/definitions/phandle-array
|
||||||
|
items:
|
||||||
|
- items:
|
||||||
|
- description: phandle to main IPMMU
|
||||||
|
- description: the interrupt bit number associated with the particular
|
||||||
|
cache IPMMU device. The interrupt bit number needs to match the main
|
||||||
|
IPMMU IMSSTR register. Only used by cache IPMMU instances.
|
||||||
description:
|
description:
|
||||||
Reference to the main IPMMU phandle plus 1 cell. The cell is
|
Reference to the main IPMMU phandle plus 1 cell. The cell is
|
||||||
the interrupt bit number associated with the particular cache IPMMU
|
the interrupt bit number associated with the particular cache IPMMU
|
||||||
|
@ -23,6 +23,8 @@ properties:
|
|||||||
leds:
|
leds:
|
||||||
description: A list of LED nodes
|
description: A list of LED nodes
|
||||||
$ref: /schemas/types.yaml#/definitions/phandle-array
|
$ref: /schemas/types.yaml#/definitions/phandle-array
|
||||||
|
items:
|
||||||
|
maxItems: 1
|
||||||
|
|
||||||
brightness-levels:
|
brightness-levels:
|
||||||
description:
|
description:
|
||||||
|
@ -48,6 +48,10 @@ properties:
|
|||||||
|
|
||||||
allwinner,sram:
|
allwinner,sram:
|
||||||
$ref: /schemas/types.yaml#/definitions/phandle-array
|
$ref: /schemas/types.yaml#/definitions/phandle-array
|
||||||
|
items:
|
||||||
|
- items:
|
||||||
|
- description: phandle to SRAM
|
||||||
|
- description: register value for device
|
||||||
description: Phandle to the device SRAM
|
description: Phandle to the device SRAM
|
||||||
|
|
||||||
iommus:
|
iommus:
|
||||||
|
@ -58,11 +58,11 @@ properties:
|
|||||||
req_gpr is the gpr register offset of RX_ENABLE for the mipi phy.
|
req_gpr is the gpr register offset of RX_ENABLE for the mipi phy.
|
||||||
$ref: /schemas/types.yaml#/definitions/phandle-array
|
$ref: /schemas/types.yaml#/definitions/phandle-array
|
||||||
items:
|
items:
|
||||||
items:
|
- items:
|
||||||
- description: The 'gpr' is the phandle to general purpose register node.
|
- description: The 'gpr' is the phandle to general purpose register node.
|
||||||
- description: The 'req_gpr' is the gpr register offset containing
|
- description: The 'req_gpr' is the gpr register offset containing
|
||||||
CSI2_1_RX_ENABLE or CSI2_2_RX_ENABLE respectively.
|
CSI2_1_RX_ENABLE or CSI2_2_RX_ENABLE respectively.
|
||||||
maximum: 0xff
|
maximum: 0xff
|
||||||
|
|
||||||
interconnects:
|
interconnects:
|
||||||
maxItems: 1
|
maxItems: 1
|
||||||
|
@ -48,6 +48,10 @@ properties:
|
|||||||
|
|
||||||
ti,camerrx-control:
|
ti,camerrx-control:
|
||||||
$ref: "/schemas/types.yaml#/definitions/phandle-array"
|
$ref: "/schemas/types.yaml#/definitions/phandle-array"
|
||||||
|
items:
|
||||||
|
- items:
|
||||||
|
- description: phandle to device control module
|
||||||
|
- description: offset to the control_camerarx_core register
|
||||||
description:
|
description:
|
||||||
phandle to the device control module and offset to the
|
phandle to the device control module and offset to the
|
||||||
control_camerarx_core register
|
control_camerarx_core register
|
||||||
|
@ -52,7 +52,7 @@ properties:
|
|||||||
maxItems: 1
|
maxItems: 1
|
||||||
|
|
||||||
mediatek,smi:
|
mediatek,smi:
|
||||||
$ref: /schemas/types.yaml#/definitions/phandle-array
|
$ref: /schemas/types.yaml#/definitions/phandle
|
||||||
description: a phandle to the smi_common node.
|
description: a phandle to the smi_common node.
|
||||||
|
|
||||||
mediatek,larb-id:
|
mediatek,larb-id:
|
||||||
|
@ -45,6 +45,8 @@ properties:
|
|||||||
$ref: '/schemas/types.yaml#/definitions/phandle-array'
|
$ref: '/schemas/types.yaml#/definitions/phandle-array'
|
||||||
minItems: 1
|
minItems: 1
|
||||||
maxItems: 16
|
maxItems: 16
|
||||||
|
items:
|
||||||
|
maxItems: 1
|
||||||
description: phandles of the PPMU events used by the controller.
|
description: phandles of the PPMU events used by the controller.
|
||||||
|
|
||||||
device-handle:
|
device-handle:
|
||||||
|
@ -29,6 +29,10 @@ properties:
|
|||||||
allwinner,sram:
|
allwinner,sram:
|
||||||
description: Phandle to the device SRAM
|
description: Phandle to the device SRAM
|
||||||
$ref: /schemas/types.yaml#/definitions/phandle-array
|
$ref: /schemas/types.yaml#/definitions/phandle-array
|
||||||
|
items:
|
||||||
|
- items:
|
||||||
|
- description: phandle to SRAM
|
||||||
|
- description: register value for device
|
||||||
|
|
||||||
required:
|
required:
|
||||||
- compatible
|
- compatible
|
||||||
|
@ -56,10 +56,10 @@ properties:
|
|||||||
offset).
|
offset).
|
||||||
$ref: /schemas/types.yaml#/definitions/phandle-array
|
$ref: /schemas/types.yaml#/definitions/phandle-array
|
||||||
items:
|
items:
|
||||||
items:
|
- items:
|
||||||
- description: The phandle to the system control region.
|
- description: The phandle to the system control region.
|
||||||
- description: The register offset.
|
- description: The register offset.
|
||||||
- description: The CAN instance number.
|
- description: The CAN instance number.
|
||||||
|
|
||||||
resets:
|
resets:
|
||||||
maxItems: 1
|
maxItems: 1
|
||||||
|
@ -84,12 +84,12 @@ properties:
|
|||||||
req_bit is the bit offset of CAN stop request.
|
req_bit is the bit offset of CAN stop request.
|
||||||
$ref: /schemas/types.yaml#/definitions/phandle-array
|
$ref: /schemas/types.yaml#/definitions/phandle-array
|
||||||
items:
|
items:
|
||||||
items:
|
- items:
|
||||||
- description: The 'gpr' is the phandle to general purpose register node.
|
- description: The 'gpr' is the phandle to general purpose register node.
|
||||||
- description: The 'req_gpr' is the gpr register offset of CAN stop request.
|
- description: The 'req_gpr' is the gpr register offset of CAN stop request.
|
||||||
maximum: 0xff
|
maximum: 0xff
|
||||||
- description: The 'req_bit' is the bit offset of CAN stop request.
|
- description: The 'req_bit' is the bit offset of CAN stop request.
|
||||||
maximum: 0x1f
|
maximum: 0x1f
|
||||||
|
|
||||||
fsl,clk-source:
|
fsl,clk-source:
|
||||||
description: |
|
description: |
|
||||||
|
@ -34,6 +34,8 @@ properties:
|
|||||||
full routing information must be given, not just the one hop
|
full routing information must be given, not just the one hop
|
||||||
routes to neighbouring switches
|
routes to neighbouring switches
|
||||||
$ref: /schemas/types.yaml#/definitions/phandle-array
|
$ref: /schemas/types.yaml#/definitions/phandle-array
|
||||||
|
items:
|
||||||
|
maxItems: 1
|
||||||
|
|
||||||
ethernet:
|
ethernet:
|
||||||
description:
|
description:
|
||||||
|
@ -158,11 +158,13 @@ properties:
|
|||||||
|
|
||||||
fsl,stop-mode:
|
fsl,stop-mode:
|
||||||
$ref: /schemas/types.yaml#/definitions/phandle-array
|
$ref: /schemas/types.yaml#/definitions/phandle-array
|
||||||
|
items:
|
||||||
|
- items:
|
||||||
|
- description: phandle to general purpose register node
|
||||||
|
- description: the gpr register offset for ENET stop request
|
||||||
|
- description: the gpr bit offset for ENET stop request
|
||||||
description:
|
description:
|
||||||
Register bits of stop mode control, the format is <&gpr req_gpr req_bit>.
|
Register bits of stop mode control, the format is <&gpr req_gpr req_bit>.
|
||||||
gpr is the phandle to general purpose register node.
|
|
||||||
req_gpr is the gpr register offset for ENET stop request.
|
|
||||||
req_bit is the gpr bit offset for ENET stop request.
|
|
||||||
|
|
||||||
mdio:
|
mdio:
|
||||||
$ref: mdio.yaml#
|
$ref: mdio.yaml#
|
||||||
|
@ -29,12 +29,18 @@ properties:
|
|||||||
|
|
||||||
queue-rx:
|
queue-rx:
|
||||||
$ref: '/schemas/types.yaml#/definitions/phandle-array'
|
$ref: '/schemas/types.yaml#/definitions/phandle-array'
|
||||||
maxItems: 1
|
items:
|
||||||
|
- items:
|
||||||
|
- description: phandle to the RX queue node
|
||||||
|
- description: RX queue instance to use
|
||||||
description: phandle to the RX queue on the NPE
|
description: phandle to the RX queue on the NPE
|
||||||
|
|
||||||
queue-txready:
|
queue-txready:
|
||||||
$ref: '/schemas/types.yaml#/definitions/phandle-array'
|
$ref: '/schemas/types.yaml#/definitions/phandle-array'
|
||||||
maxItems: 1
|
items:
|
||||||
|
- items:
|
||||||
|
- description: phandle to the TX READY queue node
|
||||||
|
- description: TX READY queue instance to use
|
||||||
description: phandle to the TX READY queue on the NPE
|
description: phandle to the TX READY queue on the NPE
|
||||||
|
|
||||||
phy-mode: true
|
phy-mode: true
|
||||||
@ -43,7 +49,10 @@ properties:
|
|||||||
|
|
||||||
intel,npe-handle:
|
intel,npe-handle:
|
||||||
$ref: '/schemas/types.yaml#/definitions/phandle-array'
|
$ref: '/schemas/types.yaml#/definitions/phandle-array'
|
||||||
maxItems: 1
|
items:
|
||||||
|
- items:
|
||||||
|
- description: phandle to the NPE this ethernet instance is using
|
||||||
|
- description: the NPE instance to use
|
||||||
description: phandle to the NPE this ethernet instance is using
|
description: phandle to the NPE this ethernet instance is using
|
||||||
and the instance to use in the second cell
|
and the instance to use in the second cell
|
||||||
|
|
||||||
|
@ -25,39 +25,62 @@ properties:
|
|||||||
|
|
||||||
intel,npe-handle:
|
intel,npe-handle:
|
||||||
$ref: '/schemas/types.yaml#/definitions/phandle-array'
|
$ref: '/schemas/types.yaml#/definitions/phandle-array'
|
||||||
maxItems: 1
|
items:
|
||||||
|
items:
|
||||||
|
- description: phandle to the NPE this HSS instance is using
|
||||||
|
- description: the NPE instance number
|
||||||
description: phandle to the NPE this HSS instance is using
|
description: phandle to the NPE this HSS instance is using
|
||||||
and the instance to use in the second cell
|
and the instance to use in the second cell
|
||||||
|
|
||||||
intel,queue-chl-rxtrig:
|
intel,queue-chl-rxtrig:
|
||||||
$ref: '/schemas/types.yaml#/definitions/phandle-array'
|
$ref: '/schemas/types.yaml#/definitions/phandle-array'
|
||||||
maxItems: 1
|
items:
|
||||||
|
- items:
|
||||||
|
- description: phandle to the RX trigger queue on the NPE
|
||||||
|
- description: the queue instance number
|
||||||
description: phandle to the RX trigger queue on the NPE
|
description: phandle to the RX trigger queue on the NPE
|
||||||
|
|
||||||
intel,queue-chl-txready:
|
intel,queue-chl-txready:
|
||||||
$ref: '/schemas/types.yaml#/definitions/phandle-array'
|
$ref: '/schemas/types.yaml#/definitions/phandle-array'
|
||||||
maxItems: 1
|
items:
|
||||||
|
- items:
|
||||||
|
- description: phandle to the TX ready queue on the NPE
|
||||||
|
- description: the queue instance number
|
||||||
description: phandle to the TX ready queue on the NPE
|
description: phandle to the TX ready queue on the NPE
|
||||||
|
|
||||||
intel,queue-pkt-rx:
|
intel,queue-pkt-rx:
|
||||||
$ref: '/schemas/types.yaml#/definitions/phandle-array'
|
$ref: '/schemas/types.yaml#/definitions/phandle-array'
|
||||||
maxItems: 1
|
items:
|
||||||
|
- items:
|
||||||
|
- description: phandle to the RX queue on the NPE
|
||||||
|
- description: the queue instance number
|
||||||
description: phandle to the packet RX queue on the NPE
|
description: phandle to the packet RX queue on the NPE
|
||||||
|
|
||||||
intel,queue-pkt-tx:
|
intel,queue-pkt-tx:
|
||||||
$ref: '/schemas/types.yaml#/definitions/phandle-array'
|
$ref: '/schemas/types.yaml#/definitions/phandle-array'
|
||||||
maxItems: 4
|
maxItems: 4
|
||||||
|
items:
|
||||||
|
items:
|
||||||
|
- description: phandle to the TX queue on the NPE
|
||||||
|
- description: the queue instance number
|
||||||
description: phandle to the packet TX0, TX1, TX2 and TX3 queues on the NPE
|
description: phandle to the packet TX0, TX1, TX2 and TX3 queues on the NPE
|
||||||
|
|
||||||
intel,queue-pkt-rxfree:
|
intel,queue-pkt-rxfree:
|
||||||
$ref: '/schemas/types.yaml#/definitions/phandle-array'
|
$ref: '/schemas/types.yaml#/definitions/phandle-array'
|
||||||
maxItems: 4
|
maxItems: 4
|
||||||
|
items:
|
||||||
|
items:
|
||||||
|
- description: phandle to the RXFREE queue on the NPE
|
||||||
|
- description: the queue instance number
|
||||||
description: phandle to the packet RXFREE0, RXFREE1, RXFREE2 and
|
description: phandle to the packet RXFREE0, RXFREE1, RXFREE2 and
|
||||||
RXFREE3 queues on the NPE
|
RXFREE3 queues on the NPE
|
||||||
|
|
||||||
intel,queue-pkt-txdone:
|
intel,queue-pkt-txdone:
|
||||||
$ref: '/schemas/types.yaml#/definitions/phandle-array'
|
$ref: '/schemas/types.yaml#/definitions/phandle-array'
|
||||||
maxItems: 1
|
items:
|
||||||
|
- items:
|
||||||
|
- description: phandle to the TXDONE queue on the NPE
|
||||||
|
- description: the queue instance number
|
||||||
description: phandle to the packet TXDONE queue on the NPE
|
description: phandle to the packet TXDONE queue on the NPE
|
||||||
|
|
||||||
cts-gpios:
|
cts-gpios:
|
||||||
|
@ -54,6 +54,10 @@ properties:
|
|||||||
|
|
||||||
intf_mode:
|
intf_mode:
|
||||||
$ref: /schemas/types.yaml#/definitions/phandle-array
|
$ref: /schemas/types.yaml#/definitions/phandle-array
|
||||||
|
items:
|
||||||
|
- items:
|
||||||
|
- description: phandle to the GPR syscon
|
||||||
|
- description: the offset of the GPR register
|
||||||
description:
|
description:
|
||||||
Should be phandle/offset pair. The phandle to the syscon node which
|
Should be phandle/offset pair. The phandle to the syscon node which
|
||||||
encompases the GPR register, and the offset of the GPR register.
|
encompases the GPR register, and the offset of the GPR register.
|
||||||
|
@ -66,6 +66,10 @@ properties:
|
|||||||
|
|
||||||
socionext,syscon-phy-mode:
|
socionext,syscon-phy-mode:
|
||||||
$ref: /schemas/types.yaml#/definitions/phandle-array
|
$ref: /schemas/types.yaml#/definitions/phandle-array
|
||||||
|
items:
|
||||||
|
- items:
|
||||||
|
- description: phandle to syscon that configures phy mode
|
||||||
|
- description: ID of MAC instance
|
||||||
description:
|
description:
|
||||||
A phandle to syscon with one argument that configures phy mode.
|
A phandle to syscon with one argument that configures phy mode.
|
||||||
The argument is the ID of MAC instance.
|
The argument is the ID of MAC instance.
|
||||||
|
@ -74,6 +74,10 @@ properties:
|
|||||||
|
|
||||||
st,syscon:
|
st,syscon:
|
||||||
$ref: "/schemas/types.yaml#/definitions/phandle-array"
|
$ref: "/schemas/types.yaml#/definitions/phandle-array"
|
||||||
|
items:
|
||||||
|
- items:
|
||||||
|
- description: phandle to the syscon node which encompases the glue register
|
||||||
|
- description: offset of the control register
|
||||||
description:
|
description:
|
||||||
Should be phandle/offset pair. The phandle to the syscon node which
|
Should be phandle/offset pair. The phandle to the syscon node which
|
||||||
encompases the glue register, and the offset of the control register
|
encompases the glue register, and the offset of the control register
|
||||||
|
@ -136,6 +136,11 @@ properties:
|
|||||||
|
|
||||||
ti,syscon-efuse:
|
ti,syscon-efuse:
|
||||||
$ref: /schemas/types.yaml#/definitions/phandle-array
|
$ref: /schemas/types.yaml#/definitions/phandle-array
|
||||||
|
items:
|
||||||
|
- items:
|
||||||
|
- description: Phandle to the system control device node which
|
||||||
|
provides access to efuse
|
||||||
|
- description: offset to efuse registers???
|
||||||
description:
|
description:
|
||||||
Phandle to the system control device node which provides access
|
Phandle to the system control device node which provides access
|
||||||
to efuse IO range with MAC addresses
|
to efuse IO range with MAC addresses
|
||||||
|
@ -54,6 +54,10 @@ properties:
|
|||||||
|
|
||||||
mediatek,mtd-eeprom:
|
mediatek,mtd-eeprom:
|
||||||
$ref: /schemas/types.yaml#/definitions/phandle-array
|
$ref: /schemas/types.yaml#/definitions/phandle-array
|
||||||
|
items:
|
||||||
|
- items:
|
||||||
|
- description: phandle to MTD partition
|
||||||
|
- description: offset containing EEPROM data
|
||||||
description:
|
description:
|
||||||
Phandle to a MTD partition + offset containing EEPROM data
|
Phandle to a MTD partition + offset containing EEPROM data
|
||||||
|
|
||||||
|
@ -177,6 +177,8 @@ patternProperties:
|
|||||||
for the functioning of the current device at the current OPP (where
|
for the functioning of the current device at the current OPP (where
|
||||||
this property is present).
|
this property is present).
|
||||||
$ref: /schemas/types.yaml#/definitions/phandle-array
|
$ref: /schemas/types.yaml#/definitions/phandle-array
|
||||||
|
items:
|
||||||
|
maxItems: 1
|
||||||
|
|
||||||
patternProperties:
|
patternProperties:
|
||||||
'^opp-microvolt-':
|
'^opp-microvolt-':
|
||||||
|
@ -35,6 +35,8 @@ properties:
|
|||||||
$ref: /schemas/types.yaml#/definitions/phandle-array
|
$ref: /schemas/types.yaml#/definitions/phandle-array
|
||||||
minItems: 1
|
minItems: 1
|
||||||
maxItems: 12
|
maxItems: 12
|
||||||
|
items:
|
||||||
|
maxItems: 1
|
||||||
description: List of phandles for the CPUs connected to this DSU instance.
|
description: List of phandles for the CPUs connected to this DSU instance.
|
||||||
|
|
||||||
required:
|
required:
|
||||||
|
@ -47,10 +47,18 @@ properties:
|
|||||||
|
|
||||||
intel,syscfg:
|
intel,syscfg:
|
||||||
$ref: /schemas/types.yaml#/definitions/phandle-array
|
$ref: /schemas/types.yaml#/definitions/phandle-array
|
||||||
|
items:
|
||||||
|
- items:
|
||||||
|
- description: phandle to Chip configuration registers
|
||||||
|
- description: ComboPhy instance id
|
||||||
description: Chip configuration registers handle and ComboPhy instance id
|
description: Chip configuration registers handle and ComboPhy instance id
|
||||||
|
|
||||||
intel,hsio:
|
intel,hsio:
|
||||||
$ref: /schemas/types.yaml#/definitions/phandle-array
|
$ref: /schemas/types.yaml#/definitions/phandle-array
|
||||||
|
items:
|
||||||
|
- items:
|
||||||
|
- description: phandle to HSIO registers
|
||||||
|
- description: ComboPhy instance id
|
||||||
description: HSIO registers handle and ComboPhy instance id on NOC
|
description: HSIO registers handle and ComboPhy instance id on NOC
|
||||||
|
|
||||||
intel,aggregation:
|
intel,aggregation:
|
||||||
|
@ -45,6 +45,10 @@ properties:
|
|||||||
|
|
||||||
syscon-phy-power:
|
syscon-phy-power:
|
||||||
$ref: /schemas/types.yaml#/definitions/phandle-array
|
$ref: /schemas/types.yaml#/definitions/phandle-array
|
||||||
|
items:
|
||||||
|
- items:
|
||||||
|
- description: phandle to the system control module
|
||||||
|
- description: register offset to power on/off the PHY
|
||||||
description:
|
description:
|
||||||
phandle/offset pair. Phandle to the system control module and
|
phandle/offset pair. Phandle to the system control module and
|
||||||
register offset to power on/off the PHY.
|
register offset to power on/off the PHY.
|
||||||
|
@ -29,6 +29,8 @@ properties:
|
|||||||
aspeed,external-nodes:
|
aspeed,external-nodes:
|
||||||
minItems: 2
|
minItems: 2
|
||||||
maxItems: 2
|
maxItems: 2
|
||||||
|
items:
|
||||||
|
maxItems: 1
|
||||||
$ref: /schemas/types.yaml#/definitions/phandle-array
|
$ref: /schemas/types.yaml#/definitions/phandle-array
|
||||||
description: |
|
description: |
|
||||||
A cell of phandles to external controller nodes:
|
A cell of phandles to external controller nodes:
|
||||||
|
@ -39,6 +39,10 @@ properties:
|
|||||||
|
|
||||||
canaan,k210-sysctl-power:
|
canaan,k210-sysctl-power:
|
||||||
$ref: /schemas/types.yaml#/definitions/phandle-array
|
$ref: /schemas/types.yaml#/definitions/phandle-array
|
||||||
|
items:
|
||||||
|
- items:
|
||||||
|
- description: phandle of the K210 system controller node
|
||||||
|
- description: offset of its power domain control register
|
||||||
description: |
|
description: |
|
||||||
phandle of the K210 system controller node and offset of its
|
phandle of the K210 system controller node and offset of its
|
||||||
power domain control register.
|
power domain control register.
|
||||||
|
@ -44,6 +44,8 @@ properties:
|
|||||||
|
|
||||||
mediatek,pctl-regmap:
|
mediatek,pctl-regmap:
|
||||||
$ref: /schemas/types.yaml#/definitions/phandle-array
|
$ref: /schemas/types.yaml#/definitions/phandle-array
|
||||||
|
items:
|
||||||
|
maxItems: 1
|
||||||
minItems: 1
|
minItems: 1
|
||||||
maxItems: 2
|
maxItems: 2
|
||||||
description: |
|
description: |
|
||||||
|
@ -41,11 +41,13 @@ properties:
|
|||||||
maxItems: 1
|
maxItems: 1
|
||||||
|
|
||||||
st,syscfg:
|
st,syscfg:
|
||||||
description: Should be phandle/offset/mask
|
description: Phandle+args to the syscon node which includes IRQ mux selection.
|
||||||
- Phandle to the syscon node which includes IRQ mux selection.
|
|
||||||
- The offset of the IRQ mux selection register.
|
|
||||||
- The field mask of IRQ mux, needed if different of 0xf.
|
|
||||||
$ref: "/schemas/types.yaml#/definitions/phandle-array"
|
$ref: "/schemas/types.yaml#/definitions/phandle-array"
|
||||||
|
items:
|
||||||
|
- items:
|
||||||
|
- description: syscon node which includes IRQ mux selection
|
||||||
|
- description: The offset of the IRQ mux selection register
|
||||||
|
- description: The field mask of IRQ mux, needed if different of 0xf
|
||||||
|
|
||||||
st,package:
|
st,package:
|
||||||
description:
|
description:
|
||||||
|
@ -29,6 +29,8 @@ properties:
|
|||||||
|
|
||||||
domain-idle-states:
|
domain-idle-states:
|
||||||
$ref: /schemas/types.yaml#/definitions/phandle-array
|
$ref: /schemas/types.yaml#/definitions/phandle-array
|
||||||
|
items:
|
||||||
|
maxItems: 1
|
||||||
description: |
|
description: |
|
||||||
Phandles of idle states that defines the available states for the
|
Phandles of idle states that defines the available states for the
|
||||||
power-domain provider. The idle state definitions are compatible with the
|
power-domain provider. The idle state definitions are compatible with the
|
||||||
@ -42,6 +44,8 @@ properties:
|
|||||||
|
|
||||||
operating-points-v2:
|
operating-points-v2:
|
||||||
$ref: /schemas/types.yaml#/definitions/phandle-array
|
$ref: /schemas/types.yaml#/definitions/phandle-array
|
||||||
|
items:
|
||||||
|
maxItems: 1
|
||||||
description:
|
description:
|
||||||
Phandles to the OPP tables of power domains provided by a power domain
|
Phandles to the OPP tables of power domains provided by a power domain
|
||||||
provider. If the provider provides a single power domain only or all
|
provider. If the provider provides a single power domain only or all
|
||||||
|
@ -35,6 +35,8 @@ properties:
|
|||||||
|
|
||||||
cpus:
|
cpus:
|
||||||
$ref: /schemas/types.yaml#/definitions/phandle-array
|
$ref: /schemas/types.yaml#/definitions/phandle-array
|
||||||
|
items:
|
||||||
|
maxItems: 1
|
||||||
description: |
|
description: |
|
||||||
Array of phandles pointing to CPU cores, which should match the order of
|
Array of phandles pointing to CPU cores, which should match the order of
|
||||||
CPU cores used by the WUPCR and PSTR registers in the Advanced Power
|
CPU cores used by the WUPCR and PSTR registers in the Advanced Power
|
||||||
|
@ -129,6 +129,8 @@ $defs:
|
|||||||
|
|
||||||
pm_qos:
|
pm_qos:
|
||||||
$ref: /schemas/types.yaml#/definitions/phandle-array
|
$ref: /schemas/types.yaml#/definitions/phandle-array
|
||||||
|
items:
|
||||||
|
maxItems: 1
|
||||||
description: |
|
description: |
|
||||||
A number of phandles to qos blocks which need to be saved and restored
|
A number of phandles to qos blocks which need to be saved and restored
|
||||||
while power domain switches state.
|
while power domain switches state.
|
||||||
|
@ -14,6 +14,9 @@ description: |
|
|||||||
phandle in monitored-battery. If specified the driver uses the
|
phandle in monitored-battery. If specified the driver uses the
|
||||||
charge-full-design-microamp-hours property of the battery.
|
charge-full-design-microamp-hours property of the battery.
|
||||||
|
|
||||||
|
allOf:
|
||||||
|
- $ref: power-supply.yaml#
|
||||||
|
|
||||||
properties:
|
properties:
|
||||||
compatible:
|
compatible:
|
||||||
const: cellwise,cw2015
|
const: cellwise,cw2015
|
||||||
@ -37,9 +40,6 @@ properties:
|
|||||||
minimum: 250
|
minimum: 250
|
||||||
|
|
||||||
power-supplies:
|
power-supplies:
|
||||||
description:
|
|
||||||
Specifies supplies used for charging the battery connected to this gauge
|
|
||||||
$ref: /schemas/types.yaml#/definitions/phandle-array
|
|
||||||
minItems: 1
|
minItems: 1
|
||||||
maxItems: 8 # Should be enough
|
maxItems: 8 # Should be enough
|
||||||
|
|
||||||
|
@ -12,6 +12,8 @@ maintainers:
|
|||||||
properties:
|
properties:
|
||||||
power-supplies:
|
power-supplies:
|
||||||
$ref: /schemas/types.yaml#/definitions/phandle-array
|
$ref: /schemas/types.yaml#/definitions/phandle-array
|
||||||
|
items:
|
||||||
|
maxItems: 1
|
||||||
description:
|
description:
|
||||||
This property is added to a supply in order to list the devices which
|
This property is added to a supply in order to list the devices which
|
||||||
supply it power, referenced by their phandles.
|
supply it power, referenced by their phandles.
|
||||||
|
@ -213,6 +213,8 @@ properties:
|
|||||||
is 2-way - all coupled regulators should be linked with each other.
|
is 2-way - all coupled regulators should be linked with each other.
|
||||||
A regulator should not be coupled with its supplier.
|
A regulator should not be coupled with its supplier.
|
||||||
$ref: "/schemas/types.yaml#/definitions/phandle-array"
|
$ref: "/schemas/types.yaml#/definitions/phandle-array"
|
||||||
|
items:
|
||||||
|
maxItems: 1
|
||||||
|
|
||||||
regulator-coupled-max-spread:
|
regulator-coupled-max-spread:
|
||||||
description: Array of maximum spread between voltages of coupled regulators
|
description: Array of maximum spread between voltages of coupled regulators
|
||||||
|
@ -23,7 +23,7 @@ properties:
|
|||||||
- st,stm32mp1-booster
|
- st,stm32mp1-booster
|
||||||
|
|
||||||
st,syscfg:
|
st,syscfg:
|
||||||
$ref: "/schemas/types.yaml#/definitions/phandle-array"
|
$ref: "/schemas/types.yaml#/definitions/phandle"
|
||||||
description: phandle to system configuration controller.
|
description: phandle to system configuration controller.
|
||||||
|
|
||||||
vdda-supply:
|
vdda-supply:
|
||||||
|
@ -115,6 +115,12 @@ properties:
|
|||||||
|
|
||||||
qcom,halt-regs:
|
qcom,halt-regs:
|
||||||
$ref: /schemas/types.yaml#/definitions/phandle-array
|
$ref: /schemas/types.yaml#/definitions/phandle-array
|
||||||
|
items:
|
||||||
|
- items:
|
||||||
|
- description: Phandle reference to a syscon representing TCSR
|
||||||
|
- description: offsets within syscon for q6 halt registers
|
||||||
|
- description: offsets within syscon for modem halt registers
|
||||||
|
- description: offsets within syscon for nc halt registers
|
||||||
description:
|
description:
|
||||||
Phandle reference to a syscon representing TCSR followed by the
|
Phandle reference to a syscon representing TCSR followed by the
|
||||||
three offsets within syscon for q6, modem and nc halt registers.
|
three offsets within syscon for q6, modem and nc halt registers.
|
||||||
|
@ -29,17 +29,22 @@ properties:
|
|||||||
|
|
||||||
st,syscfg-holdboot:
|
st,syscfg-holdboot:
|
||||||
description: remote processor reset hold boot
|
description: remote processor reset hold boot
|
||||||
- Phandle of syscon block.
|
|
||||||
- The offset of the hold boot setting register.
|
|
||||||
- The field mask of the hold boot.
|
|
||||||
$ref: "/schemas/types.yaml#/definitions/phandle-array"
|
$ref: "/schemas/types.yaml#/definitions/phandle-array"
|
||||||
maxItems: 1
|
items:
|
||||||
|
- items:
|
||||||
|
- description: Phandle of syscon block
|
||||||
|
- description: The offset of the hold boot setting register
|
||||||
|
- description: The field mask of the hold boot
|
||||||
|
|
||||||
st,syscfg-tz:
|
st,syscfg-tz:
|
||||||
description:
|
description:
|
||||||
Reference to the system configuration which holds the RCC trust zone mode
|
Reference to the system configuration which holds the RCC trust zone mode
|
||||||
$ref: "/schemas/types.yaml#/definitions/phandle-array"
|
$ref: "/schemas/types.yaml#/definitions/phandle-array"
|
||||||
maxItems: 1
|
items:
|
||||||
|
- items:
|
||||||
|
- description: Phandle of syscon block
|
||||||
|
- description: FIXME
|
||||||
|
- description: FIXME
|
||||||
|
|
||||||
interrupts:
|
interrupts:
|
||||||
description: Should contain the WWDG1 watchdog reset interrupt
|
description: Should contain the WWDG1 watchdog reset interrupt
|
||||||
@ -93,20 +98,32 @@ properties:
|
|||||||
$ref: "/schemas/types.yaml#/definitions/phandle-array"
|
$ref: "/schemas/types.yaml#/definitions/phandle-array"
|
||||||
description: |
|
description: |
|
||||||
Reference to the system configuration which holds the remote
|
Reference to the system configuration which holds the remote
|
||||||
maxItems: 1
|
items:
|
||||||
|
- items:
|
||||||
|
- description: Phandle of syscon block
|
||||||
|
- description: FIXME
|
||||||
|
- description: FIXME
|
||||||
|
|
||||||
st,syscfg-m4-state:
|
st,syscfg-m4-state:
|
||||||
$ref: "/schemas/types.yaml#/definitions/phandle-array"
|
$ref: "/schemas/types.yaml#/definitions/phandle-array"
|
||||||
description: |
|
description: |
|
||||||
Reference to the tamp register which exposes the Cortex-M4 state.
|
Reference to the tamp register which exposes the Cortex-M4 state.
|
||||||
maxItems: 1
|
items:
|
||||||
|
- items:
|
||||||
|
- description: Phandle of syscon block with the tamp register
|
||||||
|
- description: FIXME
|
||||||
|
- description: FIXME
|
||||||
|
|
||||||
st,syscfg-rsc-tbl:
|
st,syscfg-rsc-tbl:
|
||||||
$ref: "/schemas/types.yaml#/definitions/phandle-array"
|
$ref: "/schemas/types.yaml#/definitions/phandle-array"
|
||||||
description: |
|
description: |
|
||||||
Reference to the tamp register which references the Cortex-M4
|
Reference to the tamp register which references the Cortex-M4
|
||||||
resource table address.
|
resource table address.
|
||||||
maxItems: 1
|
items:
|
||||||
|
- items:
|
||||||
|
- description: Phandle of syscon block with the tamp register
|
||||||
|
- description: FIXME
|
||||||
|
- description: FIXME
|
||||||
|
|
||||||
st,auto-boot:
|
st,auto-boot:
|
||||||
$ref: /schemas/types.yaml#/definitions/flag
|
$ref: /schemas/types.yaml#/definitions/flag
|
||||||
|
@ -79,6 +79,8 @@ properties:
|
|||||||
$ref: /schemas/types.yaml#/definitions/phandle-array
|
$ref: /schemas/types.yaml#/definitions/phandle-array
|
||||||
minItems: 1
|
minItems: 1
|
||||||
maxItems: 4
|
maxItems: 4
|
||||||
|
items:
|
||||||
|
maxItems: 1
|
||||||
description: |
|
description: |
|
||||||
phandles to one or more reserved on-chip SRAM regions. The regions
|
phandles to one or more reserved on-chip SRAM regions. The regions
|
||||||
should be defined as child nodes of the respective SRAM node, and
|
should be defined as child nodes of the respective SRAM node, and
|
||||||
|
@ -189,6 +189,8 @@ patternProperties:
|
|||||||
$ref: /schemas/types.yaml#/definitions/phandle-array
|
$ref: /schemas/types.yaml#/definitions/phandle-array
|
||||||
minItems: 1
|
minItems: 1
|
||||||
maxItems: 4
|
maxItems: 4
|
||||||
|
items:
|
||||||
|
maxItems: 1
|
||||||
description: |
|
description: |
|
||||||
phandles to one or more reserved on-chip SRAM regions. The regions
|
phandles to one or more reserved on-chip SRAM regions. The regions
|
||||||
should be defined as child nodes of the respective SRAM node, and
|
should be defined as child nodes of the respective SRAM node, and
|
||||||
|
@ -123,13 +123,14 @@ properties:
|
|||||||
|
|
||||||
ti,bootreg:
|
ti,bootreg:
|
||||||
$ref: /schemas/types.yaml#/definitions/phandle-array
|
$ref: /schemas/types.yaml#/definitions/phandle-array
|
||||||
description: |
|
items:
|
||||||
Should be a triple of the phandle to the System Control
|
- items:
|
||||||
Configuration region that contains the boot address
|
- description: phandle to the System Control Configuration region
|
||||||
register, the register offset of the boot address
|
- description: register offset of the boot address register
|
||||||
register within the System Control module, and the bit
|
- description: the bit shift within the register
|
||||||
shift within the register. This property is required for
|
description:
|
||||||
all the DSP instances on OMAP4, OMAP5 and DRA7xx SoCs.
|
This property is required for all the DSP instances on OMAP4, OMAP5
|
||||||
|
and DRA7xx SoCs.
|
||||||
|
|
||||||
ti,autosuspend-delay-ms:
|
ti,autosuspend-delay-ms:
|
||||||
description: |
|
description: |
|
||||||
@ -140,6 +141,8 @@ properties:
|
|||||||
|
|
||||||
ti,timers:
|
ti,timers:
|
||||||
$ref: /schemas/types.yaml#/definitions/phandle-array
|
$ref: /schemas/types.yaml#/definitions/phandle-array
|
||||||
|
items:
|
||||||
|
maxItems: 1
|
||||||
description: |
|
description: |
|
||||||
One or more phandles to OMAP DMTimer nodes, that serve
|
One or more phandles to OMAP DMTimer nodes, that serve
|
||||||
as System/Tick timers for the OS running on the remote
|
as System/Tick timers for the OS running on the remote
|
||||||
@ -156,6 +159,8 @@ properties:
|
|||||||
|
|
||||||
ti,watchdog-timers:
|
ti,watchdog-timers:
|
||||||
$ref: /schemas/types.yaml#/definitions/phandle-array
|
$ref: /schemas/types.yaml#/definitions/phandle-array
|
||||||
|
items:
|
||||||
|
maxItems: 1
|
||||||
description: |
|
description: |
|
||||||
One or more phandles to OMAP DMTimer nodes, used to
|
One or more phandles to OMAP DMTimer nodes, used to
|
||||||
serve as Watchdog timers for the processor cores. This
|
serve as Watchdog timers for the processor cores. This
|
||||||
|
@ -48,6 +48,10 @@ properties:
|
|||||||
|
|
||||||
samsung,sysreg:
|
samsung,sysreg:
|
||||||
$ref: /schemas/types.yaml#/definitions/phandle-array
|
$ref: /schemas/types.yaml#/definitions/phandle-array
|
||||||
|
items:
|
||||||
|
- items:
|
||||||
|
- description: phandle to System Register syscon node
|
||||||
|
- description: offset of SW_CONF register for this USI controller
|
||||||
description:
|
description:
|
||||||
Should be phandle/offset pair. The phandle to System Register syscon node
|
Should be phandle/offset pair. The phandle to System Register syscon node
|
||||||
(for the same domain where this USI controller resides) and the offset
|
(for the same domain where this USI controller resides) and the offset
|
||||||
|
@ -27,6 +27,8 @@ properties:
|
|||||||
sound-dai:
|
sound-dai:
|
||||||
minItems: 2
|
minItems: 2
|
||||||
maxItems: 2
|
maxItems: 2
|
||||||
|
items:
|
||||||
|
maxItems: 1
|
||||||
$ref: /schemas/types.yaml#/definitions/phandle-array
|
$ref: /schemas/types.yaml#/definitions/phandle-array
|
||||||
description: |
|
description: |
|
||||||
phandles to the I2S controller and bluetooth codec,
|
phandles to the I2S controller and bluetooth codec,
|
||||||
|
@ -102,9 +102,11 @@ patternProperties:
|
|||||||
By default SAI sub-block is in asynchronous mode.
|
By default SAI sub-block is in asynchronous mode.
|
||||||
Must contain the phandle and index of the SAI sub-block providing
|
Must contain the phandle and index of the SAI sub-block providing
|
||||||
the synchronization.
|
the synchronization.
|
||||||
allOf:
|
$ref: /schemas/types.yaml#/definitions/phandle-array
|
||||||
- $ref: /schemas/types.yaml#/definitions/phandle-array
|
items:
|
||||||
- maxItems: 1
|
- items:
|
||||||
|
- description: phandle of the SAI sub-block
|
||||||
|
- description: index of the SAI sub-block
|
||||||
|
|
||||||
st,iec60958:
|
st,iec60958:
|
||||||
description:
|
description:
|
||||||
|
@ -66,9 +66,9 @@ examples:
|
|||||||
compatible = "qcom,kryo385";
|
compatible = "qcom,kryo385";
|
||||||
reg = <0x0 0x0>;
|
reg = <0x0 0x0>;
|
||||||
enable-method = "psci";
|
enable-method = "psci";
|
||||||
cpu-idle-states = <&LITTLE_CPU_SLEEP_0
|
cpu-idle-states = <&LITTLE_CPU_SLEEP_0>,
|
||||||
&LITTLE_CPU_SLEEP_1
|
<&LITTLE_CPU_SLEEP_1>,
|
||||||
&CLUSTER_SLEEP_0>;
|
<&CLUSTER_SLEEP_0>;
|
||||||
capacity-dmips-mhz = <607>;
|
capacity-dmips-mhz = <607>;
|
||||||
dynamic-power-coefficient = <100>;
|
dynamic-power-coefficient = <100>;
|
||||||
qcom,freq-domain = <&cpufreq_hw 0>;
|
qcom,freq-domain = <&cpufreq_hw 0>;
|
||||||
|
@ -37,8 +37,8 @@ properties:
|
|||||||
|
|
||||||
exit-latency-us:
|
exit-latency-us:
|
||||||
description: |
|
description: |
|
||||||
The exit latency constraint in microsecond for the injected idle state
|
The exit latency constraint in microsecond for the injected idle state
|
||||||
for the device. It is the latency constraint to apply when selecting an
|
for the device. It is the latency constraint to apply when selecting an
|
||||||
idle state from among all the present ones.
|
idle state from among all the present ones.
|
||||||
|
|
||||||
required:
|
required:
|
||||||
@ -65,7 +65,7 @@ examples:
|
|||||||
capacity-dmips-mhz = <1024>;
|
capacity-dmips-mhz = <1024>;
|
||||||
dynamic-power-coefficient = <436>;
|
dynamic-power-coefficient = <436>;
|
||||||
#cooling-cells = <2>; /* min followed by max */
|
#cooling-cells = <2>; /* min followed by max */
|
||||||
cpu-idle-states = <&CPU_SLEEP &CLUSTER_SLEEP>;
|
cpu-idle-states = <&CPU_SLEEP>, <&CLUSTER_SLEEP>;
|
||||||
thermal-idle {
|
thermal-idle {
|
||||||
#cooling-cells = <2>;
|
#cooling-cells = <2>;
|
||||||
duration-us = <10000>;
|
duration-us = <10000>;
|
||||||
@ -81,7 +81,7 @@ examples:
|
|||||||
capacity-dmips-mhz = <1024>;
|
capacity-dmips-mhz = <1024>;
|
||||||
dynamic-power-coefficient = <436>;
|
dynamic-power-coefficient = <436>;
|
||||||
#cooling-cells = <2>; /* min followed by max */
|
#cooling-cells = <2>; /* min followed by max */
|
||||||
cpu-idle-states = <&CPU_SLEEP &CLUSTER_SLEEP>;
|
cpu-idle-states = <&CPU_SLEEP>, <&CLUSTER_SLEEP>;
|
||||||
thermal-idle {
|
thermal-idle {
|
||||||
#cooling-cells = <2>;
|
#cooling-cells = <2>;
|
||||||
duration-us = <10000>;
|
duration-us = <10000>;
|
||||||
|
@ -83,7 +83,7 @@ properties:
|
|||||||
- const: ss
|
- const: ss
|
||||||
|
|
||||||
nvidia,xusb-padctl:
|
nvidia,xusb-padctl:
|
||||||
$ref: /schemas/types.yaml#/definitions/phandle-array
|
$ref: /schemas/types.yaml#/definitions/phandle
|
||||||
description:
|
description:
|
||||||
phandle to the XUSB pad controller that is used to configure the USB pads
|
phandle to the XUSB pad controller that is used to configure the USB pads
|
||||||
used by the XUDC controller.
|
used by the XUDC controller.
|
||||||
|
Loading…
Reference in New Issue
Block a user