Option to let the bios set per-bank CMCI thresholds so they can
filter noisy error sources at a fine grained level based on platform specific knowledge. -----BEGIN PGP SIGNATURE----- Version: GnuPG v1.4.11 (GNU/Linux) iQIcBAABAgAGBQJQZI6dAAoJEKurIx+X31iB2EQP/jnUqMWjmgwqpwFwag8ogrXq 92EU9phTnyQFCQULpIPSPlKgqU9WqPdPUq3c31ZOE6QKx7OhCfj6N5ZBGRgYhhGO zvBuj6cpGfmW448cVQnjhZ9uiIfPZPMXgGun+b1cYI4rDcjtBScNB6D5SuCPtWyx pisLOzvbd/Vnhd7XsLnFtKFSZ764vh2+yLhFLH6rOjUqyv2gHjAkqdJKor1ofzJ2 akwtOJcvm43MyxXOnJeENJ1tjx4DNp+/dl8dIEO/AvBy+zasfpkNNFn1nlMx7t9w H2KbSRUkmQ4sXZ7VTrIIYw79GtNTL8okYVy3G5k39ISIp4ZT8IYf4YwosuAUmpaL ivaKm/ifpd5yW661izIJuQOJqv/cZYfXJJpinGsTLvIMJyZpNcq3aC5k0Chyr51p L+gYJK6xIQQm/NA6Zsc6KPKcKHSoVhdsSnIRmOCdK8V/SpNbw7P3vVwKUzyATmEV f+2Dp24EsgmARmn9oKl7Xyj/jy8fcSovOs6bmG5oDi7aj0IiSIe894k+MiQY7c5W a5WWkn0KXzcVMPm19MFP9CLGYSFLLOKGbROzfRLbCgbvD1Ev+o9Ycg1tdMsBA3cX L8i6Vf1A9h7WgofX3LynC8hywQUUTJC5SZqlan0rY9JG8+VOR0V6XFVccX65Fxgl lv4KYq2zsleo3ntfBE0E =n9qI -----END PGP SIGNATURE----- Merge tag 'please-pull-naveen' of git://git.kernel.org/pub/scm/linux/kernel/git/ras/ras into x86/mce Pull MCE updates from Tony Luck: "Option to let the bios set per-bank CMCI thresholds so they can filter noisy error sources at a fine grained level based on platform specific knowledge." Signed-off-by: Ingo Molnar <mingo@kernel.org>
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commit
39ba5010d3
@ -50,6 +50,13 @@ Machine check
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monarchtimeout:
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Sets the time in us to wait for other CPUs on machine checks. 0
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to disable.
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mce=bios_cmci_threshold
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Don't overwrite the bios-set CMCI threshold. This boot option
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prevents Linux from overwriting the CMCI threshold set by the
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bios. Without this option, Linux always sets the CMCI
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threshold to 1. Enabling this may make memory predictive failure
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analysis less effective if the bios sets thresholds for memory
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errors since we will not see details for all errors.
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nomce (for compatibility with i386): same as mce=off
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@ -161,6 +161,7 @@ DECLARE_PER_CPU(struct device *, mce_device);
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#ifdef CONFIG_X86_MCE_INTEL
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extern int mce_cmci_disabled;
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extern int mce_ignore_ce;
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extern int mce_bios_cmci_threshold;
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void mce_intel_feature_init(struct cpuinfo_x86 *c);
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void cmci_clear(void);
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void cmci_reenable(void);
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@ -83,6 +83,7 @@ static int mce_dont_log_ce __read_mostly;
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int mce_cmci_disabled __read_mostly;
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int mce_ignore_ce __read_mostly;
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int mce_ser __read_mostly;
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int mce_bios_cmci_threshold __read_mostly;
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struct mce_bank *mce_banks __read_mostly;
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@ -1946,6 +1947,7 @@ static struct miscdevice mce_chrdev_device = {
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* check, or 0 to not wait
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* mce=bootlog Log MCEs from before booting. Disabled by default on AMD.
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* mce=nobootlog Don't log MCEs from before booting.
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* mce=bios_cmci_threshold Don't program the CMCI threshold
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*/
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static int __init mcheck_enable(char *str)
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{
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@ -1965,6 +1967,8 @@ static int __init mcheck_enable(char *str)
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mce_ignore_ce = 1;
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else if (!strcmp(str, "bootlog") || !strcmp(str, "nobootlog"))
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mce_bootlog = (str[0] == 'b');
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else if (!strcmp(str, "bios_cmci_threshold"))
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mce_bios_cmci_threshold = 1;
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else if (isdigit(str[0])) {
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get_option(&str, &tolerant);
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if (*str == ',') {
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@ -2205,6 +2209,11 @@ static struct dev_ext_attribute dev_attr_cmci_disabled = {
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&mce_cmci_disabled
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};
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static struct dev_ext_attribute dev_attr_bios_cmci_threshold = {
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__ATTR(bios_cmci_threshold, 0444, device_show_int, NULL),
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&mce_bios_cmci_threshold
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};
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static struct device_attribute *mce_device_attrs[] = {
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&dev_attr_tolerant.attr,
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&dev_attr_check_interval.attr,
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@ -2213,6 +2222,7 @@ static struct device_attribute *mce_device_attrs[] = {
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&dev_attr_dont_log_ce.attr,
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&dev_attr_ignore_ce.attr,
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&dev_attr_cmci_disabled.attr,
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&dev_attr_bios_cmci_threshold.attr,
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NULL
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};
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@ -181,10 +181,12 @@ static void cmci_discover(int banks)
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unsigned long *owned = (void *)&__get_cpu_var(mce_banks_owned);
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unsigned long flags;
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int i;
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int bios_wrong_thresh = 0;
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raw_spin_lock_irqsave(&cmci_discover_lock, flags);
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for (i = 0; i < banks; i++) {
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u64 val;
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int bios_zero_thresh = 0;
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if (test_bit(i, owned))
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continue;
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@ -198,8 +200,20 @@ static void cmci_discover(int banks)
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continue;
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}
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val &= ~MCI_CTL2_CMCI_THRESHOLD_MASK;
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val |= MCI_CTL2_CMCI_EN | CMCI_THRESHOLD;
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if (!mce_bios_cmci_threshold) {
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val &= ~MCI_CTL2_CMCI_THRESHOLD_MASK;
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val |= CMCI_THRESHOLD;
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} else if (!(val & MCI_CTL2_CMCI_THRESHOLD_MASK)) {
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/*
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* If bios_cmci_threshold boot option was specified
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* but the threshold is zero, we'll try to initialize
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* it to 1.
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*/
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bios_zero_thresh = 1;
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val |= CMCI_THRESHOLD;
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}
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val |= MCI_CTL2_CMCI_EN;
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wrmsrl(MSR_IA32_MCx_CTL2(i), val);
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rdmsrl(MSR_IA32_MCx_CTL2(i), val);
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@ -207,11 +221,26 @@ static void cmci_discover(int banks)
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if (val & MCI_CTL2_CMCI_EN) {
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set_bit(i, owned);
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__clear_bit(i, __get_cpu_var(mce_poll_banks));
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/*
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* We are able to set thresholds for some banks that
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* had a threshold of 0. This means the BIOS has not
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* set the thresholds properly or does not work with
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* this boot option. Note down now and report later.
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*/
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if (mce_bios_cmci_threshold && bios_zero_thresh &&
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(val & MCI_CTL2_CMCI_THRESHOLD_MASK))
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bios_wrong_thresh = 1;
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} else {
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WARN_ON(!test_bit(i, __get_cpu_var(mce_poll_banks)));
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}
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}
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raw_spin_unlock_irqrestore(&cmci_discover_lock, flags);
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if (mce_bios_cmci_threshold && bios_wrong_thresh) {
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pr_info_once(
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"bios_cmci_threshold: Some banks do not have valid thresholds set\n");
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pr_info_once(
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"bios_cmci_threshold: Make sure your BIOS supports this boot option\n");
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}
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}
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/*
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@ -249,7 +278,7 @@ void cmci_clear(void)
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continue;
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/* Disable CMCI */
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rdmsrl(MSR_IA32_MCx_CTL2(i), val);
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val &= ~(MCI_CTL2_CMCI_EN|MCI_CTL2_CMCI_THRESHOLD_MASK);
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val &= ~MCI_CTL2_CMCI_EN;
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wrmsrl(MSR_IA32_MCx_CTL2(i), val);
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__clear_bit(i, __get_cpu_var(mce_banks_owned));
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}
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