forked from Minki/linux
First batch of AT91 cleanup for 3.15
- some updates on the defconfig front - two SoCs converted to Device Tree: sam9261 and sam9rl (with use of CCF!) - a little PWM clock update that goes on top of this -----BEGIN PGP SIGNATURE----- Version: GnuPG v1.4.11 (GNU/Linux) iQEcBAABAgAGBQJTIJ7GAAoJEAf03oE53VmQ3xgIAMtWSo91ENlnr38ZtEN+J71j lrUdI/0sfv4pY2Dw0VbrnFS4hNmvM25C4dIR7SxU3iOnIC0vzzkPqs2hdRHwUY6y pw9NsnF3kW950vf/M6nDmHxQpwKZOCpABs5EDjO6S4Ky6sze4IPog+vb5Y7ovGCl LSqL9col3RCHIGyBWq77T3/NbWKOrz67Fy3eqJRyio7H8zYaEGnIrm2jPXYwtToT /FB9sZUunjYwdTRdGNhRiTHWktwlr4i4f8woHTZg85MGKY6DOsZgxzUvCXdGBeJx XaQ70hE8BF78Lglx8WUBgxowxJ1FvehxxcfzoYAVafwMlik+tSd3l0Zq3Sf6xD8= =Q3FC -----END PGP SIGNATURE----- Merge tag 'at91-cleanup' of git://github.com/at91linux/linux-at91 into next/cleanup Merge "First batch of AT91 cleanup for 3.15" from Nicolas Ferre: - some updates on the defconfig front - two SoCs converted to Device Tree: sam9261 and sam9rl (with use of CCF!) - a little PWM clock update that goes on top of this * tag 'at91-cleanup' of git://github.com/at91linux/linux-at91: ARM: at91: add PWM clock ARM: at91: move sam9261 SoC to common clk ARM: at91: prepare common clk transition for sam9261 SoC ARM: at91: updated the at91_dt_defconfig with support for the ADS7846 ARM: at91: dt: sam9261: Device Tree support for the at91sam9261ek ARM: at91: dt: defconfig: Added the sam9261 to the list of DT-enabled SOCs ARM: at91: dt: Add at91sam9261 dt SoC support ARM: at91: switch sam9rl to common clock framework ARM: at91/dt: define main clk frequency of at91sam9rlek ARM: at91/dt: define at91sam9rl clocks ARM: at91: prepare common clk transition for sam9rl SoCs ARM: at91: prepare sam9 dt boards transition to common clk ARM: at91: dt: sam9rl: Device Tree for the at91sam9rlek ARM: at91/defconfig: Add the sam9rl to the list of DT-enabled SOCs ARM: at91: Add at91sam9rl DT SoC support ARM: at91: prepare at91sam9rl DT transition ARM: at91/defconfig: refresh at91sam9260_9g20_defconfig ARM: at91/defconfig: remove useless configuration in at91sam9260_9g20_defconfig ARM: at91/defconfig: refresh at91sam9rl_defconfig Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This commit is contained in:
Arnd Bergmann
commit
397d77a566
@ -12,6 +12,8 @@ dtb-$(CONFIG_ARCH_AT91) += ethernut5.dtb
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dtb-$(CONFIG_ARCH_AT91) += evk-pro3.dtb
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dtb-$(CONFIG_ARCH_AT91) += tny_a9260.dtb
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dtb-$(CONFIG_ARCH_AT91) += usb_a9260.dtb
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# sam9261
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dtb-$(CONFIG_ARCH_AT91) += at91sam9261ek.dtb
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# sam9263
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dtb-$(CONFIG_ARCH_AT91) += at91sam9263ek.dtb
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dtb-$(CONFIG_ARCH_AT91) += tny_a9263.dtb
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@ -29,6 +31,8 @@ dtb-$(CONFIG_ARCH_AT91) += at91sam9m10g45ek.dtb
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dtb-$(CONFIG_ARCH_AT91) += pm9g45.dtb
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# sam9n12
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dtb-$(CONFIG_ARCH_AT91) += at91sam9n12ek.dtb
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# sam9rl
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dtb-$(CONFIG_ARCH_AT91) += at91sam9rlek.dtb
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# sam9x5
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dtb-$(CONFIG_ARCH_AT91) += at91-ariag25.dtb
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dtb-$(CONFIG_ARCH_AT91) += at91-cosino_mega2560.dtb
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735
arch/arm/boot/dts/at91sam9261.dtsi
Normal file
735
arch/arm/boot/dts/at91sam9261.dtsi
Normal file
@ -0,0 +1,735 @@
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/*
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* at91sam9261.dtsi - Device Tree Include file for AT91SAM9261 SoC
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*
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* Copyright (C) 2013 Jean-Jacques Hiblot <jjhiblot@traphandler.com>
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*
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* Licensed under GPLv2 only.
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*/
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#include "skeleton.dtsi"
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#include <dt-bindings/pinctrl/at91.h>
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#include <dt-bindings/interrupt-controller/irq.h>
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/clk/at91.h>
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/ {
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model = "Atmel AT91SAM9261 family SoC";
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compatible = "atmel,at91sam9261";
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interrupt-parent = <&aic>;
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aliases {
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serial0 = &dbgu;
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serial1 = &usart0;
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serial2 = &usart1;
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serial3 = &usart2;
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gpio0 = &pioA;
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gpio1 = &pioB;
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gpio2 = &pioC;
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tcb0 = &tcb0;
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i2c0 = &i2c0;
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ssc0 = &ssc0;
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ssc1 = &ssc1;
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};
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cpus {
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#address-cells = <0>;
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#size-cells = <0>;
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cpu {
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compatible = "arm,arm926ej-s";
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device_type = "cpu";
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};
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};
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memory {
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reg = <0x20000000 0x08000000>;
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};
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ahb {
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compatible = "simple-bus";
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#address-cells = <1>;
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#size-cells = <1>;
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ranges;
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usb0: ohci@00500000 {
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compatible = "atmel,at91rm9200-ohci", "usb-ohci";
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reg = <0x00500000 0x100000>;
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interrupts = <20 IRQ_TYPE_LEVEL_HIGH 2>;
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clocks = <&usb>, <&ohci_clk>, <&hclk0>, <&uhpck>;
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clock-names = "usb_clk", "ohci_clk", "hclk", "uhpck";
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status = "disabled";
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};
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fb0: fb@0x00600000 {
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compatible = "atmel,at91sam9261-lcdc";
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reg = <0x00600000 0x1000>;
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interrupts = <21 IRQ_TYPE_LEVEL_HIGH 3>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_fb>;
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clocks = <&lcd_clk>, <&hclk1>;
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clock-names = "lcdc_clk", "hclk";
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status = "disabled";
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};
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nand0: nand@40000000 {
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compatible = "atmel,at91rm9200-nand";
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#address-cells = <1>;
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#size-cells = <1>;
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reg = <0x40000000 0x10000000>;
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atmel,nand-addr-offset = <22>;
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atmel,nand-cmd-offset = <21>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_nand>;
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gpios = <&pioC 15 GPIO_ACTIVE_HIGH>,
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<&pioC 14 GPIO_ACTIVE_HIGH>,
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<0>;
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status = "disabled";
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};
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apb {
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compatible = "simple-bus";
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#address-cells = <1>;
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#size-cells = <1>;
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ranges;
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tcb0: timer@fffa0000 {
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compatible = "atmel,at91rm9200-tcb";
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reg = <0xfffa0000 0x100>;
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interrupts = <17 IRQ_TYPE_LEVEL_HIGH 0>,
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<18 IRQ_TYPE_LEVEL_HIGH 0>,
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<19 IRQ_TYPE_LEVEL_HIGH 0>;
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clocks = <&tc0_clk>, <&tc1_clk>, <&tc2_clk>;
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clock-names = "t0_clk", "t1_clk", "t2_clk";
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};
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usb1: gadget@fffa4000 {
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compatible = "atmel,at91rm9200-udc";
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reg = <0xfffa4000 0x4000>;
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interrupts = <10 IRQ_TYPE_LEVEL_HIGH 2>;
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clocks = <&usb>, <&udc_clk>, <&udpck>;
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clock-names = "usb_clk", "udc_clk", "udpck";
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status = "disabled";
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};
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mmc0: mmc@fffa8000 {
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compatible = "atmel,hsmci";
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reg = <0xfffa8000 0x600>;
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interrupts = <9 IRQ_TYPE_LEVEL_HIGH 0>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_mmc0_clk>, <&pinctrl_mmc0_slot0_cmd_dat0>, <&pinctrl_mmc0_slot0_dat1_3>;
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#address-cells = <1>;
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#size-cells = <0>;
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clocks = <&mci0_clk>;
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clock-names = "mci_clk";
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status = "disabled";
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};
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i2c0: i2c@fffac000 {
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compatible = "atmel,at91sam9261-i2c";
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_i2c_twi>;
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reg = <0xfffac000 0x100>;
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interrupts = <11 IRQ_TYPE_LEVEL_HIGH 6>;
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#address-cells = <1>;
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#size-cells = <0>;
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clocks = <&twi0_clk>;
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status = "disabled";
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};
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usart0: serial@fffb0000 {
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compatible = "atmel,at91sam9260-usart";
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reg = <0xfffb0000 0x200>;
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interrupts = <6 IRQ_TYPE_LEVEL_HIGH 5>;
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atmel,use-dma-rx;
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atmel,use-dma-tx;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_usart0>;
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clocks = <&usart0_clk>;
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clock-names = "usart";
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status = "disabled";
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};
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usart1: serial@fffb4000 {
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compatible = "atmel,at91sam9260-usart";
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reg = <0xfffb4000 0x200>;
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interrupts = <7 IRQ_TYPE_LEVEL_HIGH 5>;
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atmel,use-dma-rx;
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atmel,use-dma-tx;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_usart1>;
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clocks = <&usart1_clk>;
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clock-names = "usart";
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status = "disabled";
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};
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usart2: serial@fffb8000{
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compatible = "atmel,at91sam9260-usart";
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reg = <0xfffb8000 0x200>;
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interrupts = <8 IRQ_TYPE_LEVEL_HIGH 5>;
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atmel,use-dma-rx;
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atmel,use-dma-tx;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_usart2>;
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clocks = <&usart2_clk>;
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clock-names = "usart";
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status = "disabled";
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};
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ssc0: ssc@fffbc000 {
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compatible = "atmel,at91rm9200-ssc";
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reg = <0xfffbc000 0x4000>;
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interrupts = <14 IRQ_TYPE_LEVEL_HIGH 5>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>;
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status = "disabled";
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};
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ssc1: ssc@fffc0000 {
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compatible = "atmel,at91rm9200-ssc";
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reg = <0xfffc0000 0x4000>;
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interrupts = <15 IRQ_TYPE_LEVEL_HIGH 5>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_ssc1_tx &pinctrl_ssc1_rx>;
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status = "disabled";
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};
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spi0: spi@fffc8000 {
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "atmel,at91rm9200-spi";
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reg = <0xfffc8000 0x200>;
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cs-gpios = <0>, <0>, <0>, <0>;
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interrupts = <12 IRQ_TYPE_LEVEL_HIGH 3>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_spi0>;
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clocks = <&spi0_clk>;
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clock-names = "spi_clk";
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status = "disabled";
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};
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spi1: spi@fffcc000 {
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "atmel,at91rm9200-spi";
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reg = <0xfffcc000 0x200>;
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interrupts = <13 IRQ_TYPE_LEVEL_HIGH 3>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_spi1>;
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clocks = <&spi1_clk>;
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clock-names = "spi_clk";
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status = "disabled";
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};
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ramc: ramc@ffffea00 {
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compatible = "atmel,at91sam9260-sdramc";
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reg = <0xffffea00 0x200>;
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};
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matrix: matrix@ffffee00 {
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compatible = "atmel,at91sam9260-bus-matrix";
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reg = <0xffffee00 0x200>;
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};
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aic: interrupt-controller@fffff000 {
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#interrupt-cells = <3>;
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compatible = "atmel,at91rm9200-aic";
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interrupt-controller;
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reg = <0xfffff000 0x200>;
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atmel,external-irqs = <29 30 31>;
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};
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dbgu: serial@fffff200 {
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compatible = "atmel,at91sam9260-usart";
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reg = <0xfffff200 0x200>;
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interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_dbgu>;
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clocks = <&mck>;
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clock-names = "usart";
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status = "disabled";
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};
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pinctrl@fffff400 {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "atmel,at91rm9200-pinctrl", "simple-bus";
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ranges = <0xfffff400 0xfffff400 0x600>;
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atmel,mux-mask =
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/* A B */
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<0xffffffff 0xfffffff7>, /* pioA */
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<0xffffffff 0xfffffff4>, /* pioB */
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<0xffffffff 0xffffff07>; /* pioC */
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/* shared pinctrl settings */
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dbgu {
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pinctrl_dbgu: dbgu-0 {
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atmel,pins =
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<AT91_PIOA 9 AT91_PERIPH_A AT91_PINCTRL_NONE>,
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<AT91_PIOA 10 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;
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};
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};
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usart0 {
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pinctrl_usart0: usart0-0 {
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atmel,pins =
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<AT91_PIOC 8 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>,
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<AT91_PIOC 9 AT91_PERIPH_A AT91_PINCTRL_NONE>;
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};
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pinctrl_usart0_rts: usart0_rts-0 {
|
||||
atmel,pins =
|
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<AT91_PIOC 10 AT91_PERIPH_A AT91_PINCTRL_NONE>;
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||||
};
|
||||
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||||
pinctrl_usart0_cts: usart0_cts-0 {
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||||
atmel,pins =
|
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<AT91_PIOC 11 AT91_PERIPH_A AT91_PINCTRL_NONE>;
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||||
};
|
||||
};
|
||||
|
||||
usart1 {
|
||||
pinctrl_usart1: usart1-0 {
|
||||
atmel,pins =
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<AT91_PIOC 12 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>,
|
||||
<AT91_PIOC 13 AT91_PERIPH_A AT91_PINCTRL_NONE>;
|
||||
};
|
||||
|
||||
pinctrl_usart1_rts: usart1_rts-0 {
|
||||
atmel,pins =
|
||||
<AT91_PIOA 12 AT91_PERIPH_B AT91_PINCTRL_NONE>;
|
||||
};
|
||||
|
||||
pinctrl_usart1_cts: usart1_cts-0 {
|
||||
atmel,pins =
|
||||
<AT91_PIOA 13 AT91_PERIPH_B AT91_PINCTRL_NONE>;
|
||||
};
|
||||
};
|
||||
|
||||
usart2 {
|
||||
pinctrl_usart2: usart2-0 {
|
||||
atmel,pins =
|
||||
<AT91_PIOC 14 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>,
|
||||
<AT91_PIOC 15 AT91_PERIPH_A AT91_PINCTRL_NONE>;
|
||||
};
|
||||
|
||||
pinctrl_usart2_rts: usart2_rts-0 {
|
||||
atmel,pins =
|
||||
<AT91_PIOA 15 AT91_PERIPH_B AT91_PINCTRL_NONE>;
|
||||
};
|
||||
|
||||
pinctrl_usart2_cts: usart2_cts-0 {
|
||||
atmel,pins =
|
||||
<AT91_PIOA 16 AT91_PERIPH_B AT91_PINCTRL_NONE>;
|
||||
};
|
||||
};
|
||||
|
||||
nand {
|
||||
pinctrl_nand: nand-0 {
|
||||
atmel,pins =
|
||||
<AT91_PIOC 15 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>,
|
||||
<AT91_PIOC 14 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>;
|
||||
};
|
||||
};
|
||||
|
||||
mmc0 {
|
||||
pinctrl_mmc0_clk: mmc0_clk-0 {
|
||||
atmel,pins =
|
||||
<AT91_PIOA 2 AT91_PERIPH_B AT91_PINCTRL_NONE>;
|
||||
};
|
||||
|
||||
pinctrl_mmc0_slot0_cmd_dat0: mmc0_slot0_cmd_dat0-0 {
|
||||
atmel,pins =
|
||||
<AT91_PIOA 1 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>,
|
||||
<AT91_PIOA 0 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>;
|
||||
};
|
||||
|
||||
pinctrl_mmc0_slot0_dat1_3: mmc0_slot0_dat1_3-0 {
|
||||
atmel,pins =
|
||||
<AT91_PIOA 4 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>,
|
||||
<AT91_PIOA 5 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>,
|
||||
<AT91_PIOA 6 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>;
|
||||
};
|
||||
};
|
||||
|
||||
ssc0 {
|
||||
pinctrl_ssc0_tx: ssc0_tx-0 {
|
||||
atmel,pins =
|
||||
<AT91_PIOB 21 AT91_PERIPH_A AT91_PINCTRL_NONE>,
|
||||
<AT91_PIOB 22 AT91_PERIPH_A AT91_PINCTRL_NONE>,
|
||||
<AT91_PIOB 23 AT91_PERIPH_A AT91_PINCTRL_NONE>;
|
||||
};
|
||||
|
||||
pinctrl_ssc0_rx: ssc0_rx-0 {
|
||||
atmel,pins =
|
||||
<AT91_PIOB 24 AT91_PERIPH_A AT91_PINCTRL_NONE>,
|
||||
<AT91_PIOB 25 AT91_PERIPH_A AT91_PINCTRL_NONE>,
|
||||
<AT91_PIOB 26 AT91_PERIPH_A AT91_PINCTRL_NONE>;
|
||||
};
|
||||
};
|
||||
|
||||
ssc1 {
|
||||
pinctrl_ssc1_tx: ssc1_tx-0 {
|
||||
atmel,pins =
|
||||
<AT91_PIOA 17 AT91_PERIPH_B AT91_PINCTRL_NONE>,
|
||||
<AT91_PIOA 18 AT91_PERIPH_B AT91_PINCTRL_NONE>,
|
||||
<AT91_PIOA 19 AT91_PERIPH_B AT91_PINCTRL_NONE>;
|
||||
};
|
||||
|
||||
pinctrl_ssc1_rx: ssc1_rx-0 {
|
||||
atmel,pins =
|
||||
<AT91_PIOA 20 AT91_PERIPH_B AT91_PINCTRL_NONE>,
|
||||
<AT91_PIOA 21 AT91_PERIPH_B AT91_PINCTRL_NONE>,
|
||||
<AT91_PIOA 22 AT91_PERIPH_B AT91_PINCTRL_NONE>;
|
||||
};
|
||||
};
|
||||
|
||||
spi0 {
|
||||
pinctrl_spi0: spi0-0 {
|
||||
atmel,pins =
|
||||
<AT91_PIOA 0 AT91_PERIPH_A AT91_PINCTRL_NONE>,
|
||||
<AT91_PIOA 1 AT91_PERIPH_A AT91_PINCTRL_NONE>,
|
||||
<AT91_PIOA 2 AT91_PERIPH_A AT91_PINCTRL_NONE>;
|
||||
};
|
||||
};
|
||||
|
||||
spi1 {
|
||||
pinctrl_spi1: spi1-0 {
|
||||
atmel,pins =
|
||||
<AT91_PIOB 30 AT91_PERIPH_A AT91_PINCTRL_NONE>,
|
||||
<AT91_PIOB 31 AT91_PERIPH_A AT91_PINCTRL_NONE>,
|
||||
<AT91_PIOB 29 AT91_PERIPH_A AT91_PINCTRL_NONE>;
|
||||
};
|
||||
};
|
||||
|
||||
tcb0 {
|
||||
pinctrl_tcb0_tclk0: tcb0_tclk0-0 {
|
||||
atmel,pins = <AT91_PIOC 16 AT91_PERIPH_B AT91_PINCTRL_NONE>;
|
||||
};
|
||||
|
||||
pinctrl_tcb0_tclk1: tcb0_tclk1-0 {
|
||||
atmel,pins = <AT91_PIOC 17 AT91_PERIPH_B AT91_PINCTRL_NONE>;
|
||||
};
|
||||
|
||||
pinctrl_tcb0_tclk2: tcb0_tclk2-0 {
|
||||
atmel,pins = <AT91_PIOC 18 AT91_PERIPH_B AT91_PINCTRL_NONE>;
|
||||
};
|
||||
|
||||
pinctrl_tcb0_tioa0: tcb0_tioa0-0 {
|
||||
atmel,pins = <AT91_PIOC 19 AT91_PERIPH_B AT91_PINCTRL_NONE>;
|
||||
};
|
||||
|
||||
pinctrl_tcb0_tioa1: tcb0_tioa1-0 {
|
||||
atmel,pins = <AT91_PIOC 21 AT91_PERIPH_B AT91_PINCTRL_NONE>;
|
||||
};
|
||||
|
||||
pinctrl_tcb0_tioa2: tcb0_tioa2-0 {
|
||||
atmel,pins = <AT91_PIOC 23 AT91_PERIPH_B AT91_PINCTRL_NONE>;
|
||||
};
|
||||
|
||||
pinctrl_tcb0_tiob0: tcb0_tiob0-0 {
|
||||
atmel,pins = <AT91_PIOC 20 AT91_PERIPH_B AT91_PINCTRL_NONE>;
|
||||
};
|
||||
|
||||
pinctrl_tcb0_tiob1: tcb0_tiob1-0 {
|
||||
atmel,pins = <AT91_PIOC 22 AT91_PERIPH_B AT91_PINCTRL_NONE>;
|
||||
};
|
||||
|
||||
pinctrl_tcb0_tiob2: tcb0_tiob2-0 {
|
||||
atmel,pins = <AT91_PIOC 24 AT91_PERIPH_B AT91_PINCTRL_NONE>;
|
||||
};
|
||||
};
|
||||
|
||||
i2c0 {
|
||||
pinctrl_i2c_bitbang: i2c-0-bitbang {
|
||||
atmel,pins =
|
||||
<AT91_PIOA 7 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>,
|
||||
<AT91_PIOA 8 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>;
|
||||
};
|
||||
pinctrl_i2c_twi: i2c-0-twi {
|
||||
atmel,pins =
|
||||
<AT91_PIOA 7 AT91_PERIPH_A AT91_PINCTRL_NONE>,
|
||||
<AT91_PIOA 8 AT91_PERIPH_A AT91_PINCTRL_NONE>;
|
||||
};
|
||||
};
|
||||
|
||||
fb {
|
||||
pinctrl_fb: fb-0 {
|
||||
atmel,pins =
|
||||
<AT91_PIOB 1 AT91_PERIPH_A AT91_PINCTRL_NONE>,
|
||||
<AT91_PIOB 2 AT91_PERIPH_A AT91_PINCTRL_NONE>,
|
||||
<AT91_PIOB 3 AT91_PERIPH_A AT91_PINCTRL_NONE>,
|
||||
<AT91_PIOB 7 AT91_PERIPH_A AT91_PINCTRL_NONE>,
|
||||
<AT91_PIOB 8 AT91_PERIPH_A AT91_PINCTRL_NONE>,
|
||||
<AT91_PIOB 9 AT91_PERIPH_A AT91_PINCTRL_NONE>,
|
||||
<AT91_PIOB 10 AT91_PERIPH_A AT91_PINCTRL_NONE>,
|
||||
<AT91_PIOB 11 AT91_PERIPH_A AT91_PINCTRL_NONE>,
|
||||
<AT91_PIOB 12 AT91_PERIPH_A AT91_PINCTRL_NONE>,
|
||||
<AT91_PIOB 15 AT91_PERIPH_A AT91_PINCTRL_NONE>,
|
||||
<AT91_PIOB 16 AT91_PERIPH_A AT91_PINCTRL_NONE>,
|
||||
<AT91_PIOB 17 AT91_PERIPH_A AT91_PINCTRL_NONE>,
|
||||
<AT91_PIOB 18 AT91_PERIPH_A AT91_PINCTRL_NONE>,
|
||||
<AT91_PIOB 19 AT91_PERIPH_A AT91_PINCTRL_NONE>,
|
||||
<AT91_PIOB 20 AT91_PERIPH_A AT91_PINCTRL_NONE>,
|
||||
<AT91_PIOB 23 AT91_PERIPH_B AT91_PINCTRL_NONE>,
|
||||
<AT91_PIOB 24 AT91_PERIPH_B AT91_PINCTRL_NONE>,
|
||||
<AT91_PIOB 25 AT91_PERIPH_B AT91_PINCTRL_NONE>,
|
||||
<AT91_PIOB 26 AT91_PERIPH_B AT91_PINCTRL_NONE>,
|
||||
<AT91_PIOB 27 AT91_PERIPH_B AT91_PINCTRL_NONE>,
|
||||
<AT91_PIOB 28 AT91_PERIPH_B AT91_PINCTRL_NONE>;
|
||||
};
|
||||
};
|
||||
|
||||
pioA: gpio@fffff400 {
|
||||
compatible = "atmel,at91rm9200-gpio";
|
||||
reg = <0xfffff400 0x200>;
|
||||
interrupts = <2 IRQ_TYPE_LEVEL_HIGH 1>;
|
||||
#gpio-cells = <2>;
|
||||
gpio-controller;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <2>;
|
||||
clocks = <&pioA_clk>;
|
||||
};
|
||||
|
||||
pioB: gpio@fffff600 {
|
||||
compatible = "atmel,at91rm9200-gpio";
|
||||
reg = <0xfffff600 0x200>;
|
||||
interrupts = <3 IRQ_TYPE_LEVEL_HIGH 1>;
|
||||
#gpio-cells = <2>;
|
||||
gpio-controller;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <2>;
|
||||
clocks = <&pioB_clk>;
|
||||
};
|
||||
|
||||
pioC: gpio@fffff800 {
|
||||
compatible = "atmel,at91rm9200-gpio";
|
||||
reg = <0xfffff800 0x200>;
|
||||
interrupts = <4 IRQ_TYPE_LEVEL_HIGH 1>;
|
||||
#gpio-cells = <2>;
|
||||
gpio-controller;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <2>;
|
||||
clocks = <&pioC_clk>;
|
||||
};
|
||||
};
|
||||
|
||||
pmc: pmc@fffffc00 {
|
||||
compatible = "atmel,at91rm9200-pmc";
|
||||
reg = <0xfffffc00 0x100>;
|
||||
interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
|
||||
interrupt-controller;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
#interrupt-cells = <1>;
|
||||
|
||||
clk32k: slck {
|
||||
compatible = "fixed-clock";
|
||||
#clock-cells = <0>;
|
||||
clock-frequency = <32768>;
|
||||
};
|
||||
|
||||
main: mainck {
|
||||
compatible = "atmel,at91rm9200-clk-main";
|
||||
#clock-cells = <0>;
|
||||
interrupts-extended = <&pmc AT91_PMC_MOSCS>;
|
||||
clocks = <&clk32k>;
|
||||
};
|
||||
|
||||
plla: pllack {
|
||||
compatible = "atmel,at91rm9200-clk-pll";
|
||||
#clock-cells = <0>;
|
||||
interrupts-extended = <&pmc AT91_PMC_LOCKA>;
|
||||
clocks = <&main>;
|
||||
reg = <0>;
|
||||
atmel,clk-input-range = <1000000 32000000>;
|
||||
#atmel,pll-clk-output-range-cells = <4>;
|
||||
atmel,pll-clk-output-ranges = <80000000 200000000 190000000 240000000>;
|
||||
};
|
||||
|
||||
pllb: pllbck {
|
||||
compatible = "atmel,at91rm9200-clk-pll";
|
||||
#clock-cells = <0>;
|
||||
interrupts-extended = <&pmc AT91_PMC_LOCKB>;
|
||||
clocks = <&main>;
|
||||
reg = <1>;
|
||||
atmel,clk-input-range = <1000000 32000000>;
|
||||
#atmel,pll-clk-output-range-cells = <4>;
|
||||
atmel,pll-clk-output-ranges = <80000000 200000000 190000000 240000000>;
|
||||
};
|
||||
|
||||
mck: masterck {
|
||||
compatible = "atmel,at91rm9200-clk-master";
|
||||
#clock-cells = <0>;
|
||||
interrupts-extended = <&pmc AT91_PMC_MCKRDY>;
|
||||
clocks = <&clk32k>, <&main>, <&plla>, <&pllb>;
|
||||
atmel,clk-output-range = <0 94000000>;
|
||||
atmel,clk-divisors = <1 2 4 3>;
|
||||
};
|
||||
|
||||
usb: usbck {
|
||||
compatible = "atmel,at91rm9200-clk-usb";
|
||||
#clock-cells = <0>;
|
||||
atmel,clk-divisors = <1 2 4 3>;
|
||||
clocks = <&pllb>;
|
||||
};
|
||||
|
||||
systemck {
|
||||
compatible = "atmel,at91rm9200-clk-system";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
uhpck: uhpck {
|
||||
#clock-cells = <0>;
|
||||
reg = <6>;
|
||||
clocks = <&usb>;
|
||||
};
|
||||
|
||||
udpck: udpck {
|
||||
#clock-cells = <0>;
|
||||
reg = <7>;
|
||||
clocks = <&usb>;
|
||||
};
|
||||
|
||||
hclk0: hclk0 {
|
||||
#clock-cells = <0>;
|
||||
reg = <16>;
|
||||
clocks = <&mck>;
|
||||
};
|
||||
|
||||
hclk1: hclk1 {
|
||||
#clock-cells = <0>;
|
||||
reg = <17>;
|
||||
clocks = <&mck>;
|
||||
};
|
||||
};
|
||||
|
||||
periphck {
|
||||
compatible = "atmel,at91rm9200-clk-peripheral";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
clocks = <&mck>;
|
||||
|
||||
pioA_clk: pioA_clk {
|
||||
#clock-cells = <0>;
|
||||
reg = <2>;
|
||||
};
|
||||
|
||||
pioB_clk: pioB_clk {
|
||||
#clock-cells = <0>;
|
||||
reg = <3>;
|
||||
};
|
||||
|
||||
pioC_clk: pioC_clk {
|
||||
#clock-cells = <0>;
|
||||
reg = <4>;
|
||||
};
|
||||
|
||||
usart0_clk: usart0_clk {
|
||||
#clock-cells = <0>;
|
||||
reg = <6>;
|
||||
};
|
||||
|
||||
usart1_clk: usart1_clk {
|
||||
#clock-cells = <0>;
|
||||
reg = <7>;
|
||||
};
|
||||
|
||||
usart2_clk: usart2_clk {
|
||||
#clock-cells = <0>;
|
||||
reg = <8>;
|
||||
};
|
||||
|
||||
mci0_clk: mci0_clk {
|
||||
#clock-cells = <0>;
|
||||
reg = <9>;
|
||||
};
|
||||
|
||||
udc_clk: udc_clk {
|
||||
#clock-cells = <0>;
|
||||
reg = <10>;
|
||||
};
|
||||
|
||||
twi0_clk: twi0_clk {
|
||||
reg = <11>;
|
||||
#clock-cells = <0>;
|
||||
};
|
||||
|
||||
spi0_clk: spi0_clk {
|
||||
#clock-cells = <0>;
|
||||
reg = <12>;
|
||||
};
|
||||
|
||||
spi1_clk: spi1_clk {
|
||||
#clock-cells = <0>;
|
||||
reg = <13>;
|
||||
};
|
||||
|
||||
tc0_clk: tc0_clk {
|
||||
#clock-cells = <0>;
|
||||
reg = <17>;
|
||||
};
|
||||
|
||||
tc1_clk: tc1_clk {
|
||||
#clock-cells = <0>;
|
||||
reg = <18>;
|
||||
};
|
||||
|
||||
tc2_clk: tc2_clk {
|
||||
#clock-cells = <0>;
|
||||
reg = <19>;
|
||||
};
|
||||
|
||||
ohci_clk: ohci_clk {
|
||||
#clock-cells = <0>;
|
||||
reg = <20>;
|
||||
};
|
||||
|
||||
lcd_clk: lcd_clk {
|
||||
#clock-cells = <0>;
|
||||
reg = <21>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
rstc@fffffd00 {
|
||||
compatible = "atmel,at91sam9260-rstc";
|
||||
reg = <0xfffffd00 0x10>;
|
||||
};
|
||||
|
||||
shdwc@fffffd10 {
|
||||
compatible = "atmel,at91sam9260-shdwc";
|
||||
reg = <0xfffffd10 0x10>;
|
||||
};
|
||||
|
||||
pit: timer@fffffd30 {
|
||||
compatible = "atmel,at91sam9260-pit";
|
||||
reg = <0xfffffd30 0xf>;
|
||||
interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
|
||||
clocks = <&mck>;
|
||||
};
|
||||
|
||||
watchdog@fffffd40 {
|
||||
compatible = "atmel,at91sam9260-wdt";
|
||||
reg = <0xfffffd40 0x10>;
|
||||
interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
|
||||
status = "disabled";
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
i2c@0 {
|
||||
compatible = "i2c-gpio";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_i2c_bitbang>;
|
||||
gpios = <&pioA 7 GPIO_ACTIVE_HIGH>, /* sda */
|
||||
<&pioA 8 GPIO_ACTIVE_HIGH>; /* scl */
|
||||
i2c-gpio,sda-open-drain;
|
||||
i2c-gpio,scl-open-drain;
|
||||
i2c-gpio,delay-us = <2>; /* ~100 kHz */
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
status = "disabled";
|
||||
};
|
||||
};
|
||||
211
arch/arm/boot/dts/at91sam9261ek.dts
Normal file
211
arch/arm/boot/dts/at91sam9261ek.dts
Normal file
@ -0,0 +1,211 @@
|
||||
/*
|
||||
* at91sam9261ek.dts - Device Tree file for Atmel at91sam9261 reference board
|
||||
*
|
||||
* Copyright (C) 2013 Jean-Jacques Hiblot <jjhiblot@traphandler.com>
|
||||
*
|
||||
* Licensed under GPLv2 only.
|
||||
*/
|
||||
/dts-v1/;
|
||||
#include "at91sam9261.dtsi"
|
||||
|
||||
/ {
|
||||
model = "Atmel at91sam9261ek";
|
||||
compatible = "atmel,at91sam9261ek", "atmel,at91sam9261", "atmel,at91sam9";
|
||||
|
||||
chosen {
|
||||
bootargs = "console=ttyS0,115200 rootfstype=ubifs ubi.mtd=5 root=ubi0:rootfs rw";
|
||||
};
|
||||
|
||||
memory {
|
||||
reg = <0x20000000 0x4000000>;
|
||||
};
|
||||
|
||||
clocks {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
ranges;
|
||||
|
||||
main_clock: clock@0 {
|
||||
compatible = "atmel,osc", "fixed-clock";
|
||||
clock-frequency = <18432000>;
|
||||
};
|
||||
};
|
||||
|
||||
ahb {
|
||||
usb0: ohci@00500000 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
fb0: fb@0x00600000 {
|
||||
display = <&display0>;
|
||||
atmel,power-control-gpio = <&pioA 12 GPIO_ACTIVE_LOW>;
|
||||
status = "okay";
|
||||
|
||||
display0: display {
|
||||
bits-per-pixel = <16>;
|
||||
atmel,lcdcon-backlight;
|
||||
atmel,dmacon = <0x1>;
|
||||
atmel,lcdcon2 = <0x80008002>;
|
||||
atmel,guard-time = <1>;
|
||||
atmel,lcd-wiring-mode = "BRG";
|
||||
|
||||
display-timings {
|
||||
native-mode = <&timing0>;
|
||||
timing0: timing0 {
|
||||
clock-frequency = <4965000>;
|
||||
hactive = <240>;
|
||||
vactive = <320>;
|
||||
hback-porch = <1>;
|
||||
hfront-porch = <33>;
|
||||
vback-porch = <1>;
|
||||
vfront-porch = <0>;
|
||||
hsync-len = <5>;
|
||||
vsync-len = <1>;
|
||||
hsync-active = <1>;
|
||||
vsync-active = <1>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
nand0: nand@40000000 {
|
||||
nand-bus-width = <8>;
|
||||
nand-ecc-mode = "soft";
|
||||
nand-on-flash-bbt;
|
||||
status = "okay";
|
||||
|
||||
at91bootstrap@0 {
|
||||
label = "at91bootstrap";
|
||||
reg = <0x0 0x40000>;
|
||||
};
|
||||
|
||||
bootloader@40000 {
|
||||
label = "bootloader";
|
||||
reg = <0x40000 0x80000>;
|
||||
};
|
||||
|
||||
bootloaderenv@c0000 {
|
||||
label = "bootloader env";
|
||||
reg = <0xc0000 0xc0000>;
|
||||
};
|
||||
|
||||
dtb@180000 {
|
||||
label = "device tree";
|
||||
reg = <0x180000 0x80000>;
|
||||
};
|
||||
|
||||
kernel@200000 {
|
||||
label = "kernel";
|
||||
reg = <0x200000 0x600000>;
|
||||
};
|
||||
|
||||
rootfs@800000 {
|
||||
label = "rootfs";
|
||||
reg = <0x800000 0x0f800000>;
|
||||
};
|
||||
};
|
||||
|
||||
apb {
|
||||
usb1: gadget@fffa4000 {
|
||||
atmel,vbus-gpio = <&pioB 29 GPIO_ACTIVE_HIGH>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
spi0: spi@fffc8000 {
|
||||
cs-gpios = <&pioA 3 0>, <0>, <&pioA 28 0>, <0>;
|
||||
status = "okay";
|
||||
|
||||
mtd_dataflash@0 {
|
||||
compatible = "atmel,at45", "atmel,dataflash";
|
||||
reg = <0>;
|
||||
spi-max-frequency = <15000000>;
|
||||
};
|
||||
|
||||
tsc2046@0 {
|
||||
reg = <2>;
|
||||
compatible = "ti,ads7843";
|
||||
interrupts-extended = <&pioC 2 IRQ_TYPE_EDGE_BOTH>;
|
||||
spi-max-frequency = <3000000>;
|
||||
pendown-gpio = <&pioC 2 GPIO_ACTIVE_HIGH>;
|
||||
|
||||
ti,x-min = /bits/ 16 <150>;
|
||||
ti,x-max = /bits/ 16 <3830>;
|
||||
ti,y-min = /bits/ 16 <190>;
|
||||
ti,y-max = /bits/ 16 <3830>;
|
||||
ti,vref-delay-usecs = /bits/ 16 <450>;
|
||||
ti,x-plate-ohms = /bits/ 16 <450>;
|
||||
ti,y-plate-ohms = /bits/ 16 <250>;
|
||||
ti,pressure-max = /bits/ 16 <15000>;
|
||||
ti,debounce-rep = /bits/ 16 <0>;
|
||||
ti,debounce-tol = /bits/ 16 <65535>;
|
||||
ti,debounce-max = /bits/ 16 <1>;
|
||||
|
||||
linux,wakeup;
|
||||
};
|
||||
};
|
||||
|
||||
dbgu: serial@fffff200 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
watchdog@fffffd40 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
};
|
||||
};
|
||||
|
||||
leds {
|
||||
compatible = "gpio-leds";
|
||||
|
||||
ds8 {
|
||||
label = "ds8";
|
||||
gpios = <&pioA 13 GPIO_ACTIVE_LOW>;
|
||||
linux,default-trigger = "none";
|
||||
};
|
||||
|
||||
ds7 {
|
||||
label = "ds7";
|
||||
gpios = <&pioA 14 GPIO_ACTIVE_LOW>;
|
||||
linux,default-trigger = "nand-disk";
|
||||
};
|
||||
|
||||
ds1 {
|
||||
label = "ds1";
|
||||
gpios = <&pioA 23 GPIO_ACTIVE_LOW>;
|
||||
linux,default-trigger = "heartbeat";
|
||||
};
|
||||
};
|
||||
|
||||
gpio_keys {
|
||||
compatible = "gpio-keys";
|
||||
|
||||
button_0 {
|
||||
label = "button_0";
|
||||
gpios = <&pioA 27 GPIO_ACTIVE_LOW>;
|
||||
linux,code = <256>;
|
||||
gpio-key,wakeup;
|
||||
};
|
||||
|
||||
button_1 {
|
||||
label = "button_1";
|
||||
gpios = <&pioA 26 GPIO_ACTIVE_LOW>;
|
||||
linux,code = <257>;
|
||||
gpio-key,wakeup;
|
||||
};
|
||||
|
||||
button_2 {
|
||||
label = "button_2";
|
||||
gpios = <&pioA 25 GPIO_ACTIVE_LOW>;
|
||||
linux,code = <258>;
|
||||
gpio-key,wakeup;
|
||||
};
|
||||
|
||||
button_3 {
|
||||
label = "button_3";
|
||||
gpios = <&pioA 24 GPIO_ACTIVE_LOW>;
|
||||
linux,code = <259>;
|
||||
gpio-key,wakeup;
|
||||
};
|
||||
};
|
||||
};
|
||||
802
arch/arm/boot/dts/at91sam9rl.dtsi
Normal file
802
arch/arm/boot/dts/at91sam9rl.dtsi
Normal file
@ -0,0 +1,802 @@
|
||||
/*
|
||||
* at91sam9rl.dtsi - Device Tree Include file for AT91SAM9RL family SoC
|
||||
*
|
||||
* Copyright (C) 2014 Alexandre Belloni <alexandre.belloni@free-electrons.com>
|
||||
*
|
||||
* Licensed under GPLv2 or later.
|
||||
*/
|
||||
|
||||
#include "skeleton.dtsi"
|
||||
#include <dt-bindings/pinctrl/at91.h>
|
||||
#include <dt-bindings/clk/at91.h>
|
||||
#include <dt-bindings/interrupt-controller/irq.h>
|
||||
#include <dt-bindings/gpio/gpio.h>
|
||||
|
||||
/ {
|
||||
model = "Atmel AT91SAM9RL family SoC";
|
||||
compatible = "atmel,at91sam9rl", "atmel,at91sam9";
|
||||
interrupt-parent = <&aic>;
|
||||
|
||||
aliases {
|
||||
serial0 = &dbgu;
|
||||
serial1 = &usart0;
|
||||
serial2 = &usart1;
|
||||
serial3 = &usart2;
|
||||
serial4 = &usart3;
|
||||
gpio0 = &pioA;
|
||||
gpio1 = &pioB;
|
||||
gpio2 = &pioC;
|
||||
gpio3 = &pioD;
|
||||
tcb0 = &tcb0;
|
||||
i2c0 = &i2c0;
|
||||
i2c1 = &i2c1;
|
||||
ssc0 = &ssc0;
|
||||
ssc1 = &ssc1;
|
||||
};
|
||||
|
||||
cpus {
|
||||
#address-cells = <0>;
|
||||
#size-cells = <0>;
|
||||
|
||||
cpu {
|
||||
compatible = "arm,arm926ej-s";
|
||||
device_type = "cpu";
|
||||
};
|
||||
};
|
||||
|
||||
memory {
|
||||
reg = <0x20000000 0x04000000>;
|
||||
};
|
||||
|
||||
ahb {
|
||||
compatible = "simple-bus";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
ranges;
|
||||
|
||||
nand0: nand@40000000 {
|
||||
compatible = "atmel,at91rm9200-nand";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
reg = <0x40000000 0x10000000>,
|
||||
<0xffffe800 0x200>;
|
||||
atmel,nand-addr-offset = <21>;
|
||||
atmel,nand-cmd-offset = <22>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_nand>;
|
||||
gpios = <&pioD 17 GPIO_ACTIVE_HIGH>,
|
||||
<&pioB 6 GPIO_ACTIVE_HIGH>,
|
||||
<0>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
apb {
|
||||
compatible = "simple-bus";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
ranges;
|
||||
|
||||
tcb0: timer@fffa0000 {
|
||||
compatible = "atmel,at91rm9200-tcb";
|
||||
reg = <0xfffa0000 0x100>;
|
||||
interrupts = <16 IRQ_TYPE_LEVEL_HIGH 0>,
|
||||
<17 IRQ_TYPE_LEVEL_HIGH 0>,
|
||||
<18 IRQ_TYPE_LEVEL_HIGH 0>;
|
||||
clocks = <&tc0_clk>, <&tc1_clk>, <&tc2_clk>;
|
||||
clock-names = "t0_clk", "t1_clk", "t2_clk";
|
||||
};
|
||||
|
||||
mmc0: mmc@fffa4000 {
|
||||
compatible = "atmel,hsmci";
|
||||
reg = <0xfffa4000 0x600>;
|
||||
interrupts = <10 IRQ_TYPE_LEVEL_HIGH 0>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
pinctrl-names = "default";
|
||||
clocks = <&mci0_clk>;
|
||||
clock-names = "mci_clk";
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
i2c0: i2c@fffa8000 {
|
||||
compatible = "atmel,at91sam9260-i2c";
|
||||
reg = <0xfffa8000 0x100>;
|
||||
interrupts = <11 IRQ_TYPE_LEVEL_HIGH 6>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
clocks = <&twi0_clk>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
i2c1: i2c@fffac000 {
|
||||
compatible = "atmel,at91sam9260-i2c";
|
||||
reg = <0xfffac000 0x100>;
|
||||
interrupts = <12 IRQ_TYPE_LEVEL_HIGH 6>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
usart0: serial@fffb0000 {
|
||||
compatible = "atmel,at91sam9260-usart";
|
||||
reg = <0xfffb0000 0x200>;
|
||||
interrupts = <6 IRQ_TYPE_LEVEL_HIGH 5>;
|
||||
atmel,use-dma-rx;
|
||||
atmel,use-dma-tx;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_usart0>;
|
||||
clocks = <&usart0_clk>;
|
||||
clock-names = "usart";
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
usart1: serial@fffb4000 {
|
||||
compatible = "atmel,at91sam9260-usart";
|
||||
reg = <0xfffb4000 0x200>;
|
||||
interrupts = <7 IRQ_TYPE_LEVEL_HIGH 5>;
|
||||
atmel,use-dma-rx;
|
||||
atmel,use-dma-tx;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_usart1>;
|
||||
clocks = <&usart1_clk>;
|
||||
clock-names = "usart";
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
usart2: serial@fffb8000 {
|
||||
compatible = "atmel,at91sam9260-usart";
|
||||
reg = <0xfffb8000 0x200>;
|
||||
interrupts = <8 IRQ_TYPE_LEVEL_HIGH 5>;
|
||||
atmel,use-dma-rx;
|
||||
atmel,use-dma-tx;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_usart2>;
|
||||
clocks = <&usart2_clk>;
|
||||
clock-names = "usart";
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
usart3: serial@fffbc000 {
|
||||
compatible = "atmel,at91sam9260-usart";
|
||||
reg = <0xfffbc000 0x200>;
|
||||
interrupts = <9 IRQ_TYPE_LEVEL_HIGH 5>;
|
||||
atmel,use-dma-rx;
|
||||
atmel,use-dma-tx;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_usart3>;
|
||||
clocks = <&usart3_clk>;
|
||||
clock-names = "usart";
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
ssc0: ssc@fffc0000 {
|
||||
compatible = "atmel,at91rm9200-ssc";
|
||||
reg = <0xfffc0000 0x4000>;
|
||||
interrupts = <14 IRQ_TYPE_LEVEL_HIGH 5>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
ssc1: ssc@fffc4000 {
|
||||
compatible = "atmel,at91rm9200-ssc";
|
||||
reg = <0xfffc4000 0x4000>;
|
||||
interrupts = <15 IRQ_TYPE_LEVEL_HIGH 5>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_ssc1_tx &pinctrl_ssc1_rx>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
spi0: spi@fffcc000 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
compatible = "atmel,at91rm9200-spi";
|
||||
reg = <0xfffcc000 0x200>;
|
||||
interrupts = <13 IRQ_TYPE_LEVEL_HIGH 3>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_spi0>;
|
||||
clocks = <&spi0_clk>;
|
||||
clock-names = "spi_clk";
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
ramc0: ramc@ffffea00 {
|
||||
compatible = "atmel,at91sam9260-sdramc";
|
||||
reg = <0xffffea00 0x200>;
|
||||
};
|
||||
|
||||
aic: interrupt-controller@fffff000 {
|
||||
#interrupt-cells = <3>;
|
||||
compatible = "atmel,at91rm9200-aic";
|
||||
interrupt-controller;
|
||||
reg = <0xfffff000 0x200>;
|
||||
atmel,external-irqs = <31>;
|
||||
};
|
||||
|
||||
dbgu: serial@fffff200 {
|
||||
compatible = "atmel,at91sam9260-usart";
|
||||
reg = <0xfffff200 0x200>;
|
||||
interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_dbgu>;
|
||||
clocks = <&mck>;
|
||||
clock-names = "usart";
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
pinctrl@fffff400 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
compatible = "atmel,at91rm9200-pinctrl", "simple-bus";
|
||||
ranges = <0xfffff400 0xfffff400 0x800>;
|
||||
|
||||
atmel,mux-mask =
|
||||
/* A B */
|
||||
<0xffffffff 0xe05c6738>, /* pioA */
|
||||
<0xffffffff 0x0000c780>, /* pioB */
|
||||
<0xffffffff 0xe3ffff0e>, /* pioC */
|
||||
<0x003fffff 0x0001ff3c>; /* pioD */
|
||||
|
||||
/* shared pinctrl settings */
|
||||
dbgu {
|
||||
pinctrl_dbgu: dbgu-0 {
|
||||
atmel,pins =
|
||||
<AT91_PIOA 21 AT91_PERIPH_A AT91_PINCTRL_NONE>,
|
||||
<AT91_PIOA 22 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;
|
||||
};
|
||||
};
|
||||
|
||||
i2c_gpio0 {
|
||||
pinctrl_i2c_gpio0: i2c_gpio0-0 {
|
||||
atmel,pins =
|
||||
<AT91_PIOA 23 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE>,
|
||||
<AT91_PIOA 24 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE>;
|
||||
};
|
||||
};
|
||||
|
||||
i2c_gpio1 {
|
||||
pinctrl_i2c_gpio1: i2c_gpio1-0 {
|
||||
atmel,pins =
|
||||
<AT91_PIOD 10 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE>,
|
||||
<AT91_PIOD 11 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE>;
|
||||
};
|
||||
};
|
||||
|
||||
mmc0 {
|
||||
pinctrl_mmc0_clk: mmc0_clk-0 {
|
||||
atmel,pins =
|
||||
<AT91_PIOA 2 AT91_PERIPH_A AT91_PINCTRL_NONE>;
|
||||
};
|
||||
|
||||
pinctrl_mmc0_slot0_cmd_dat0: mmc0_slot0_cmd_dat0-0 {
|
||||
atmel,pins =
|
||||
<AT91_PIOA 0 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>,
|
||||
<AT91_PIOA 1 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;
|
||||
};
|
||||
|
||||
pinctrl_mmc0_slot0_dat1_3: mmc0_slot0_dat1_3-0 {
|
||||
atmel,pins =
|
||||
<AT91_PIOA 3 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>,
|
||||
<AT91_PIOA 4 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>,
|
||||
<AT91_PIOA 5 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;
|
||||
};
|
||||
};
|
||||
|
||||
nand {
|
||||
pinctrl_nand: nand-0 {
|
||||
atmel,pins =
|
||||
<AT91_PIOD 17 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>,
|
||||
<AT91_PIOB 6 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>;
|
||||
};
|
||||
|
||||
pinctrl_nand0_ale_cle: nand_ale_cle-0 {
|
||||
atmel,pins =
|
||||
<AT91_PIOB 2 AT91_PERIPH_A AT91_PINCTRL_NONE>,
|
||||
<AT91_PIOB 3 AT91_PERIPH_A AT91_PINCTRL_NONE>;
|
||||
};
|
||||
|
||||
pinctrl_nand0_oe_we: nand_oe_we-0 {
|
||||
atmel,pins =
|
||||
<AT91_PIOB 4 AT91_PERIPH_A AT91_PINCTRL_NONE>,
|
||||
<AT91_PIOB 5 AT91_PERIPH_A AT91_PINCTRL_NONE>;
|
||||
};
|
||||
|
||||
pinctrl_nand0_cs: nand_cs-0 {
|
||||
atmel,pins =
|
||||
<AT91_PIOB 6 AT91_PERIPH_A AT91_PINCTRL_NONE>;
|
||||
};
|
||||
};
|
||||
|
||||
ssc0 {
|
||||
pinctrl_ssc0_tx: ssc0_tx-0 {
|
||||
atmel,pins =
|
||||
<AT91_PIOA 15 AT91_PERIPH_A AT91_PINCTRL_NONE>,
|
||||
<AT91_PIOC 0 AT91_PERIPH_A AT91_PINCTRL_NONE>,
|
||||
<AT91_PIOC 1 AT91_PERIPH_A AT91_PINCTRL_NONE>;
|
||||
};
|
||||
|
||||
pinctrl_ssc0_rx: ssc0_rx-0 {
|
||||
atmel,pins =
|
||||
<AT91_PIOA 10 AT91_PERIPH_B AT91_PINCTRL_NONE>,
|
||||
<AT91_PIOA 16 AT91_PERIPH_A AT91_PINCTRL_NONE>,
|
||||
<AT91_PIOA 22 AT91_PERIPH_B AT91_PINCTRL_NONE>;
|
||||
};
|
||||
};
|
||||
|
||||
ssc1 {
|
||||
pinctrl_ssc1_tx: ssc1_tx-0 {
|
||||
atmel,pins =
|
||||
<AT91_PIOA 13 AT91_PERIPH_B AT91_PINCTRL_NONE>,
|
||||
<AT91_PIOA 29 AT91_PERIPH_B AT91_PINCTRL_NONE>,
|
||||
<AT91_PIOA 30 AT91_PERIPH_B AT91_PINCTRL_NONE>;
|
||||
};
|
||||
|
||||
pinctrl_ssc1_rx: ssc1_rx-0 {
|
||||
atmel,pins =
|
||||
<AT91_PIOA 8 AT91_PERIPH_B AT91_PINCTRL_NONE>,
|
||||
<AT91_PIOA 9 AT91_PERIPH_B AT91_PINCTRL_NONE>,
|
||||
<AT91_PIOA 14 AT91_PERIPH_B AT91_PINCTRL_NONE>;
|
||||
};
|
||||
};
|
||||
|
||||
spi0 {
|
||||
pinctrl_spi0: spi0-0 {
|
||||
atmel,pins =
|
||||
<AT91_PIOA 25 AT91_PERIPH_A AT91_PINCTRL_NONE>,
|
||||
<AT91_PIOA 26 AT91_PERIPH_A AT91_PINCTRL_NONE>,
|
||||
<AT91_PIOA 27 AT91_PERIPH_A AT91_PINCTRL_NONE>;
|
||||
};
|
||||
};
|
||||
|
||||
tcb0 {
|
||||
pinctrl_tcb0_tclk0: tcb0_tclk0-0 {
|
||||
atmel,pins = <AT91_PIOA 3 AT91_PERIPH_B AT91_PINCTRL_NONE>;
|
||||
};
|
||||
|
||||
pinctrl_tcb0_tclk1: tcb0_tclk1-0 {
|
||||
atmel,pins = <AT91_PIOC 31 AT91_PERIPH_B AT91_PINCTRL_NONE>;
|
||||
};
|
||||
|
||||
pinctrl_tcb0_tclk2: tcb0_tclk2-0 {
|
||||
atmel,pins = <AT91_PIOD 21 AT91_PERIPH_A AT91_PINCTRL_NONE>;
|
||||
};
|
||||
|
||||
pinctrl_tcb0_tioa0: tcb0_tioa0-0 {
|
||||
atmel,pins = <AT91_PIOA 4 AT91_PERIPH_B AT91_PINCTRL_NONE>;
|
||||
};
|
||||
|
||||
pinctrl_tcb0_tioa1: tcb0_tioa1-0 {
|
||||
atmel,pins = <AT91_PIOC 29 AT91_PERIPH_B AT91_PINCTRL_NONE>;
|
||||
};
|
||||
|
||||
pinctrl_tcb0_tioa2: tcb0_tioa2-0 {
|
||||
atmel,pins = <AT91_PIOD 10 AT91_PERIPH_B AT91_PINCTRL_NONE>;
|
||||
};
|
||||
|
||||
pinctrl_tcb0_tiob0: tcb0_tiob0-0 {
|
||||
atmel,pins = <AT91_PIOA 5 AT91_PERIPH_B AT91_PINCTRL_NONE>;
|
||||
};
|
||||
|
||||
pinctrl_tcb0_tiob1: tcb0_tiob1-0 {
|
||||
atmel,pins = <AT91_PIOC 30 AT91_PERIPH_B AT91_PINCTRL_NONE>;
|
||||
};
|
||||
|
||||
pinctrl_tcb0_tiob2: tcb0_tiob2-0 {
|
||||
atmel,pins = <AT91_PIOD 11 AT91_PERIPH_B AT91_PINCTRL_NONE>;
|
||||
};
|
||||
};
|
||||
|
||||
usart0 {
|
||||
pinctrl_usart0: usart0-0 {
|
||||
atmel,pins =
|
||||
<AT91_PIOA 6 AT91_PERIPH_A AT91_PINCTRL_NONE>,
|
||||
<AT91_PIOA 7 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;
|
||||
};
|
||||
|
||||
pinctrl_usart0_rts: usart0_rts-0 {
|
||||
atmel,pins =
|
||||
<AT91_PIOA 9 AT91_PERIPH_A AT91_PINCTRL_NONE>;
|
||||
};
|
||||
|
||||
pinctrl_usart0_cts: usart0_cts-0 {
|
||||
atmel,pins =
|
||||
<AT91_PIOA 10 AT91_PERIPH_A AT91_PINCTRL_NONE>;
|
||||
};
|
||||
|
||||
pinctrl_usart0_dtr_dsr: usart0_dtr_dsr-0 {
|
||||
atmel,pins =
|
||||
<AT91_PIOD 14 AT91_PERIPH_A AT91_PINCTRL_NONE>,
|
||||
<AT91_PIOD 15 AT91_PERIPH_A AT91_PINCTRL_NONE>;
|
||||
};
|
||||
|
||||
pinctrl_usart0_dcd: usart0_dcd-0 {
|
||||
atmel,pins =
|
||||
<AT91_PIOD 16 AT91_PERIPH_A AT91_PINCTRL_NONE>;
|
||||
};
|
||||
|
||||
pinctrl_usart0_ri: usart0_ri-0 {
|
||||
atmel,pins =
|
||||
<AT91_PIOD 17 AT91_PERIPH_A AT91_PINCTRL_NONE>;
|
||||
};
|
||||
|
||||
pinctrl_usart0_sck: usart0_sck-0 {
|
||||
atmel,pins =
|
||||
<AT91_PIOA 8 AT91_PERIPH_A AT91_PINCTRL_NONE>;
|
||||
};
|
||||
};
|
||||
|
||||
usart1 {
|
||||
pinctrl_usart1: usart1-0 {
|
||||
atmel,pins =
|
||||
<AT91_PIOA 11 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>,
|
||||
<AT91_PIOA 12 AT91_PERIPH_A AT91_PINCTRL_NONE>;
|
||||
};
|
||||
|
||||
pinctrl_usart1_rts: usart1_rts-0 {
|
||||
atmel,pins =
|
||||
<AT91_PIOA 18 AT91_PERIPH_B AT91_PINCTRL_NONE>;
|
||||
};
|
||||
|
||||
pinctrl_usart1_cts: usart1_cts-0 {
|
||||
atmel,pins =
|
||||
<AT91_PIOA 19 AT91_PERIPH_B AT91_PINCTRL_NONE>;
|
||||
};
|
||||
|
||||
pinctrl_usart1_sck: usart1_sck-0 {
|
||||
atmel,pins =
|
||||
<AT91_PIOD 2 AT91_PERIPH_B AT91_PINCTRL_NONE>;
|
||||
};
|
||||
};
|
||||
|
||||
usart2 {
|
||||
pinctrl_usart2: usart2-0 {
|
||||
atmel,pins =
|
||||
<AT91_PIOA 13 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>,
|
||||
<AT91_PIOA 14 AT91_PERIPH_A AT91_PINCTRL_NONE>;
|
||||
};
|
||||
|
||||
pinctrl_usart2_rts: usart2_rts-0 {
|
||||
atmel,pins =
|
||||
<AT91_PIOA 29 AT91_PERIPH_A AT91_PINCTRL_NONE>;
|
||||
};
|
||||
|
||||
pinctrl_usart2_cts: usart2_cts-0 {
|
||||
atmel,pins =
|
||||
<AT91_PIOA 30 AT91_PERIPH_A AT91_PINCTRL_NONE>;
|
||||
};
|
||||
|
||||
pinctrl_usart2_sck: usart2_sck-0 {
|
||||
atmel,pins =
|
||||
<AT91_PIOD 9 AT91_PERIPH_A AT91_PINCTRL_NONE>;
|
||||
};
|
||||
};
|
||||
|
||||
usart3 {
|
||||
pinctrl_usart3: usart3-0 {
|
||||
atmel,pins =
|
||||
<AT91_PIOB 0 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>,
|
||||
<AT91_PIOB 1 AT91_PERIPH_A AT91_PINCTRL_NONE>;
|
||||
};
|
||||
|
||||
pinctrl_usart3_rts: usart3_rts-0 {
|
||||
atmel,pins =
|
||||
<AT91_PIOD 4 AT91_PERIPH_B AT91_PINCTRL_NONE>;
|
||||
};
|
||||
|
||||
pinctrl_usart3_cts: usart3_cts-0 {
|
||||
atmel,pins =
|
||||
<AT91_PIOD 3 AT91_PERIPH_B AT91_PINCTRL_NONE>;
|
||||
};
|
||||
|
||||
pinctrl_usart3_sck: usart3_sck-0 {
|
||||
atmel,pins =
|
||||
<AT91_PIOA 20 AT91_PERIPH_B AT91_PINCTRL_NONE>;
|
||||
};
|
||||
};
|
||||
|
||||
pioA: gpio@fffff400 {
|
||||
compatible = "atmel,at91rm9200-gpio";
|
||||
reg = <0xfffff400 0x200>;
|
||||
interrupts = <2 IRQ_TYPE_LEVEL_HIGH 1>;
|
||||
#gpio-cells = <2>;
|
||||
gpio-controller;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <2>;
|
||||
clocks = <&pioA_clk>;
|
||||
};
|
||||
|
||||
pioB: gpio@fffff600 {
|
||||
compatible = "atmel,at91rm9200-gpio";
|
||||
reg = <0xfffff600 0x200>;
|
||||
interrupts = <3 IRQ_TYPE_LEVEL_HIGH 1>;
|
||||
#gpio-cells = <2>;
|
||||
gpio-controller;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <2>;
|
||||
clocks = <&pioB_clk>;
|
||||
};
|
||||
|
||||
pioC: gpio@fffff800 {
|
||||
compatible = "atmel,at91rm9200-gpio";
|
||||
reg = <0xfffff800 0x200>;
|
||||
interrupts = <4 IRQ_TYPE_LEVEL_HIGH 1>;
|
||||
#gpio-cells = <2>;
|
||||
gpio-controller;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <2>;
|
||||
clocks = <&pioC_clk>;
|
||||
};
|
||||
|
||||
pioD: gpio@fffffa00 {
|
||||
compatible = "atmel,at91rm9200-gpio";
|
||||
reg = <0xfffffa00 0x200>;
|
||||
interrupts = <5 IRQ_TYPE_LEVEL_HIGH 1>;
|
||||
#gpio-cells = <2>;
|
||||
gpio-controller;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <2>;
|
||||
clocks = <&pioD_clk>;
|
||||
};
|
||||
};
|
||||
|
||||
pmc: pmc@fffffc00 {
|
||||
compatible = "atmel,at91sam9g45-pmc";
|
||||
reg = <0xfffffc00 0x100>;
|
||||
interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
|
||||
interrupt-controller;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
#interrupt-cells = <1>;
|
||||
|
||||
clk32k: slck {
|
||||
compatible = "fixed-clock";
|
||||
#clock-cells = <0>;
|
||||
clock-frequency = <32768>;
|
||||
};
|
||||
|
||||
main: mainck {
|
||||
compatible = "atmel,at91rm9200-clk-main";
|
||||
#clock-cells = <0>;
|
||||
interrupts-extended = <&pmc AT91_PMC_MOSCS>;
|
||||
clocks = <&clk32k>;
|
||||
};
|
||||
|
||||
plla: pllack {
|
||||
compatible = "atmel,at91rm9200-clk-pll";
|
||||
#clock-cells = <0>;
|
||||
interrupts-extended = <&pmc AT91_PMC_LOCKA>;
|
||||
clocks = <&main>;
|
||||
reg = <0>;
|
||||
atmel,clk-input-range = <1000000 32000000>;
|
||||
#atmel,pll-clk-output-range-cells = <4>;
|
||||
atmel,pll-clk-output-ranges = <80000000 200000000 190000000 240000000>;
|
||||
};
|
||||
|
||||
utmi: utmick {
|
||||
compatible = "atmel,at91sam9x5-clk-utmi";
|
||||
#clock-cells = <0>;
|
||||
interrupt-parent = <&pmc>;
|
||||
interrupts = <AT91_PMC_LOCKU>;
|
||||
clocks = <&main>;
|
||||
};
|
||||
|
||||
mck: masterck {
|
||||
compatible = "atmel,at91rm9200-clk-master";
|
||||
#clock-cells = <0>;
|
||||
interrupts-extended = <&pmc AT91_PMC_MCKRDY>;
|
||||
clocks = <&clk32k>, <&main>, <&plla>, <&utmi>;
|
||||
atmel,clk-output-range = <0 94000000>;
|
||||
atmel,clk-divisors = <1 2 4 3>;
|
||||
};
|
||||
|
||||
prog: progck {
|
||||
compatible = "atmel,at91rm9200-clk-programmable";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
interrupt-parent = <&pmc>;
|
||||
clocks = <&clk32k>, <&main>, <&plla>, <&utmi>, <&mck>;
|
||||
|
||||
prog0: prog0 {
|
||||
#clock-cells = <0>;
|
||||
reg = <0>;
|
||||
interrupts = <AT91_PMC_PCKRDY(0)>;
|
||||
};
|
||||
|
||||
prog1: prog1 {
|
||||
#clock-cells = <0>;
|
||||
reg = <1>;
|
||||
interrupts = <AT91_PMC_PCKRDY(1)>;
|
||||
};
|
||||
};
|
||||
|
||||
systemck {
|
||||
compatible = "atmel,at91rm9200-clk-system";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
pck0: pck0 {
|
||||
#clock-cells = <0>;
|
||||
reg = <8>;
|
||||
clocks = <&prog0>;
|
||||
};
|
||||
|
||||
pck1: pck1 {
|
||||
#clock-cells = <0>;
|
||||
reg = <9>;
|
||||
clocks = <&prog1>;
|
||||
};
|
||||
|
||||
};
|
||||
|
||||
periphck {
|
||||
compatible = "atmel,at91rm9200-clk-peripheral";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
clocks = <&mck>;
|
||||
|
||||
pioA_clk: pioA_clk {
|
||||
#clock-cells = <0>;
|
||||
reg = <2>;
|
||||
};
|
||||
|
||||
pioB_clk: pioB_clk {
|
||||
#clock-cells = <0>;
|
||||
reg = <3>;
|
||||
};
|
||||
|
||||
pioC_clk: pioC_clk {
|
||||
#clock-cells = <0>;
|
||||
reg = <4>;
|
||||
};
|
||||
|
||||
pioD_clk: pioD_clk {
|
||||
#clock-cells = <0>;
|
||||
reg = <5>;
|
||||
};
|
||||
|
||||
usart0_clk: usart0_clk {
|
||||
#clock-cells = <0>;
|
||||
reg = <6>;
|
||||
};
|
||||
|
||||
usart1_clk: usart1_clk {
|
||||
#clock-cells = <0>;
|
||||
reg = <7>;
|
||||
};
|
||||
|
||||
usart2_clk: usart2_clk {
|
||||
#clock-cells = <0>;
|
||||
reg = <8>;
|
||||
};
|
||||
|
||||
usart3_clk: usart3_clk {
|
||||
#clock-cells = <0>;
|
||||
reg = <9>;
|
||||
};
|
||||
|
||||
mci0_clk: mci0_clk {
|
||||
#clock-cells = <0>;
|
||||
reg = <10>;
|
||||
};
|
||||
|
||||
twi0_clk: twi0_clk {
|
||||
#clock-cells = <0>;
|
||||
reg = <11>;
|
||||
};
|
||||
|
||||
twi1_clk: twi1_clk {
|
||||
#clock-cells = <0>;
|
||||
reg = <12>;
|
||||
};
|
||||
|
||||
spi0_clk: spi0_clk {
|
||||
#clock-cells = <0>;
|
||||
reg = <13>;
|
||||
};
|
||||
|
||||
ssc0_clk: ssc0_clk {
|
||||
#clock-cells = <0>;
|
||||
reg = <14>;
|
||||
};
|
||||
|
||||
ssc1_clk: ssc1_clk {
|
||||
#clock-cells = <0>;
|
||||
reg = <15>;
|
||||
};
|
||||
|
||||
tc0_clk: tc0_clk {
|
||||
#clock-cells = <0>;
|
||||
reg = <16>;
|
||||
};
|
||||
|
||||
tc1_clk: tc1_clk {
|
||||
#clock-cells = <0>;
|
||||
reg = <17>;
|
||||
};
|
||||
|
||||
tc2_clk: tc2_clk {
|
||||
#clock-cells = <0>;
|
||||
reg = <18>;
|
||||
};
|
||||
|
||||
pwm_clk: pwm_clk {
|
||||
#clock-cells = <0>;
|
||||
reg = <19>;
|
||||
};
|
||||
|
||||
adc_clk: adc_clk {
|
||||
#clock-cells = <0>;
|
||||
reg = <20>;
|
||||
};
|
||||
|
||||
dma0_clk: dma0_clk {
|
||||
#clock-cells = <0>;
|
||||
reg = <21>;
|
||||
};
|
||||
|
||||
udphs_clk: udphs_clk {
|
||||
#clock-cells = <0>;
|
||||
reg = <22>;
|
||||
};
|
||||
|
||||
lcd_clk: lcd_clk {
|
||||
#clock-cells = <0>;
|
||||
reg = <23>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
rstc@fffffd00 {
|
||||
compatible = "atmel,at91sam9260-rstc";
|
||||
reg = <0xfffffd00 0x10>;
|
||||
};
|
||||
|
||||
shdwc@fffffd10 {
|
||||
compatible = "atmel,at91sam9260-shdwc";
|
||||
reg = <0xfffffd10 0x10>;
|
||||
};
|
||||
|
||||
pit: timer@fffffd30 {
|
||||
compatible = "atmel,at91sam9260-pit";
|
||||
reg = <0xfffffd30 0xf>;
|
||||
interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
|
||||
clocks = <&mck>;
|
||||
};
|
||||
|
||||
watchdog@fffffd40 {
|
||||
compatible = "atmel,at91sam9260-wdt";
|
||||
reg = <0xfffffd40 0x10>;
|
||||
interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
|
||||
status = "disabled";
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
i2c@0 {
|
||||
compatible = "i2c-gpio";
|
||||
gpios = <&pioA 23 GPIO_ACTIVE_HIGH>, /* sda */
|
||||
<&pioA 24 GPIO_ACTIVE_HIGH>; /* scl */
|
||||
i2c-gpio,sda-open-drain;
|
||||
i2c-gpio,scl-open-drain;
|
||||
i2c-gpio,delay-us = <2>; /* ~100 kHz */
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_i2c_gpio0>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
i2c@1 {
|
||||
compatible = "i2c-gpio";
|
||||
gpios = <&pioD 10 GPIO_ACTIVE_HIGH>, /* sda */
|
||||
<&pioD 11 GPIO_ACTIVE_HIGH>; /* scl */
|
||||
i2c-gpio,sda-open-drain;
|
||||
i2c-gpio,scl-open-drain;
|
||||
i2c-gpio,delay-us = <2>; /* ~100 kHz */
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_i2c_gpio1>;
|
||||
status = "disabled";
|
||||
};
|
||||
};
|
||||
157
arch/arm/boot/dts/at91sam9rlek.dts
Normal file
157
arch/arm/boot/dts/at91sam9rlek.dts
Normal file
@ -0,0 +1,157 @@
|
||||
/*
|
||||
* at91sam9rlek.dts - Device Tree file for Atmel at91sam9rl reference board
|
||||
*
|
||||
* Copyright (C) 2014 Alexandre Belloni <alexandre.belloni@free-electrons.com>
|
||||
*
|
||||
* Licensed under GPLv2 only
|
||||
*/
|
||||
/dts-v1/;
|
||||
#include "at91sam9rl.dtsi"
|
||||
|
||||
/ {
|
||||
model = "Atmel at91sam9rlek";
|
||||
compatible = "atmel,at91sam9rlek", "atmel,at91sam9rl", "atmel,at91sam9";
|
||||
|
||||
chosen {
|
||||
bootargs = "console=ttyS0,115200 rootfstype=ubifs root=ubi0:rootfs ubi.mtd=5 rw";
|
||||
};
|
||||
|
||||
memory {
|
||||
reg = <0x20000000 0x4000000>;
|
||||
};
|
||||
|
||||
clocks {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
ranges;
|
||||
|
||||
main_clock: clock {
|
||||
compatible = "atmel,osc", "fixed-clock";
|
||||
clock-frequency = <12000000>;
|
||||
};
|
||||
};
|
||||
|
||||
ahb {
|
||||
nand0: nand@40000000 {
|
||||
nand-bus-width = <8>;
|
||||
nand-ecc-mode = "soft";
|
||||
nand-on-flash-bbt = <1>;
|
||||
status = "okay";
|
||||
|
||||
at91bootstrap@0 {
|
||||
label = "at91bootstrap";
|
||||
reg = <0x0 0x40000>;
|
||||
};
|
||||
|
||||
bootloader@40000 {
|
||||
label = "bootloader";
|
||||
reg = <0x40000 0x80000>;
|
||||
};
|
||||
|
||||
bootloaderenv@c0000 {
|
||||
label = "bootloader env";
|
||||
reg = <0xc0000 0xc0000>;
|
||||
};
|
||||
|
||||
dtb@180000 {
|
||||
label = "device tree";
|
||||
reg = <0x180000 0x80000>;
|
||||
};
|
||||
|
||||
kernel@200000 {
|
||||
label = "kernel";
|
||||
reg = <0x200000 0x600000>;
|
||||
};
|
||||
|
||||
rootfs@800000 {
|
||||
label = "rootfs";
|
||||
reg = <0x800000 0x0f800000>;
|
||||
};
|
||||
};
|
||||
|
||||
apb {
|
||||
mmc0: mmc@fffa4000 {
|
||||
pinctrl-0 = <
|
||||
&pinctrl_board_mmc0
|
||||
&pinctrl_mmc0_clk
|
||||
&pinctrl_mmc0_slot0_cmd_dat0
|
||||
&pinctrl_mmc0_slot0_dat1_3>;
|
||||
status = "okay";
|
||||
slot@0 {
|
||||
reg = <0>;
|
||||
bus-width = <4>;
|
||||
cd-gpios = <&pioA 15 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
};
|
||||
|
||||
usart0: serial@fffb0000 {
|
||||
pinctrl-0 = <
|
||||
&pinctrl_usart0
|
||||
&pinctrl_usart0_rts
|
||||
&pinctrl_usart0_cts>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
dbgu: serial@fffff200 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
pinctrl@fffff400 {
|
||||
mmc0 {
|
||||
pinctrl_board_mmc0: mmc0-board {
|
||||
atmel,pins =
|
||||
<AT91_PIOA 15 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP_DEGLITCH>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
pmc: pmc@fffffc00 {
|
||||
main: mainck {
|
||||
clock-frequency = <12000000>;
|
||||
};
|
||||
};
|
||||
|
||||
watchdog@fffffd40 {
|
||||
status = "okay";
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
leds {
|
||||
compatible = "gpio-leds";
|
||||
|
||||
ds1 {
|
||||
label = "ds1";
|
||||
gpios = <&pioD 15 GPIO_ACTIVE_LOW>;
|
||||
};
|
||||
|
||||
ds2 {
|
||||
label = "ds2";
|
||||
gpios = <&pioD 16 GPIO_ACTIVE_LOW>;
|
||||
};
|
||||
|
||||
ds3 {
|
||||
label = "ds3";
|
||||
gpios = <&pioD 14 GPIO_ACTIVE_HIGH>;
|
||||
linux,default-trigger = "heartbeat";
|
||||
};
|
||||
};
|
||||
|
||||
gpio_keys {
|
||||
compatible = "gpio-keys";
|
||||
|
||||
right_click {
|
||||
label = "right_click";
|
||||
gpios = <&pioB 0 GPIO_ACTIVE_LOW>;
|
||||
linux,code = <273>;
|
||||
gpio-key,wakeup;
|
||||
};
|
||||
|
||||
left_click {
|
||||
label = "left_click";
|
||||
gpios = <&pioB 1 GPIO_ACTIVE_LOW>;
|
||||
linux,code = <272>;
|
||||
gpio-key,wakeup;
|
||||
};
|
||||
};
|
||||
};
|
||||
@ -16,10 +16,12 @@ CONFIG_MODULE_UNLOAD=y
|
||||
CONFIG_ARCH_AT91=y
|
||||
CONFIG_SOC_AT91RM9200=y
|
||||
CONFIG_SOC_AT91SAM9260=y
|
||||
CONFIG_SOC_AT91SAM9261=y
|
||||
CONFIG_SOC_AT91SAM9263=y
|
||||
CONFIG_SOC_AT91SAM9G45=y
|
||||
CONFIG_SOC_AT91SAM9X5=y
|
||||
CONFIG_SOC_AT91SAM9N12=y
|
||||
CONFIG_SOC_AT91SAM9RL=y
|
||||
CONFIG_MACH_AT91RM9200_DT=y
|
||||
CONFIG_MACH_AT91SAM9_DT=y
|
||||
CONFIG_AT91_TIMER_HZ=128
|
||||
@ -119,6 +121,7 @@ CONFIG_INPUT_EVDEV=y
|
||||
CONFIG_KEYBOARD_GPIO=y
|
||||
# CONFIG_INPUT_MOUSE is not set
|
||||
CONFIG_INPUT_TOUCHSCREEN=y
|
||||
CONFIG_TOUCHSCREEN_ADS7846=y
|
||||
# CONFIG_SERIO is not set
|
||||
CONFIG_LEGACY_PTY_COUNT=4
|
||||
CONFIG_SERIAL_ATMEL=y
|
||||
|
||||
@ -3,6 +3,7 @@
|
||||
CONFIG_SYSVIPC=y
|
||||
CONFIG_LOG_BUF_SHIFT=14
|
||||
CONFIG_BLK_DEV_INITRD=y
|
||||
CONFIG_EMBEDDED=y
|
||||
CONFIG_SLAB=y
|
||||
CONFIG_MODULES=y
|
||||
CONFIG_MODULE_UNLOAD=y
|
||||
@ -30,15 +31,12 @@ CONFIG_MACH_AT91SAM9_DT=y
|
||||
CONFIG_AT91_SLOW_CLOCK=y
|
||||
# CONFIG_ARM_THUMB is not set
|
||||
CONFIG_AEABI=y
|
||||
CONFIG_LEDS=y
|
||||
CONFIG_LEDS_CPU=y
|
||||
CONFIG_ZBOOT_ROM_TEXT=0x0
|
||||
CONFIG_ZBOOT_ROM_BSS=0x0
|
||||
CONFIG_ARM_APPENDED_DTB=y
|
||||
CONFIG_ARM_ATAG_DTB_COMPAT=y
|
||||
CONFIG_CMDLINE="mem=64M console=ttyS0,115200 initrd=0x21100000,3145728 root=/dev/ram0 rw"
|
||||
CONFIG_AUTO_ZRELADDR=y
|
||||
CONFIG_FPE_NWFPE=y
|
||||
CONFIG_NET=y
|
||||
CONFIG_PACKET=y
|
||||
CONFIG_UNIX=y
|
||||
@ -57,15 +55,14 @@ CONFIG_DEVTMPFS_MOUNT=y
|
||||
CONFIG_MTD=y
|
||||
CONFIG_MTD_CMDLINE_PARTS=y
|
||||
CONFIG_MTD_OF_PARTS=y
|
||||
CONFIG_MTD_CHAR=y
|
||||
CONFIG_MTD_BLOCK=y
|
||||
CONFIG_MTD_DATAFLASH=y
|
||||
CONFIG_MTD_NAND=y
|
||||
CONFIG_MTD_NAND_ATMEL=y
|
||||
CONFIG_MTD_UBI=y
|
||||
CONFIG_BLK_DEV_LOOP=y
|
||||
CONFIG_BLK_DEV_RAM=y
|
||||
CONFIG_BLK_DEV_RAM_SIZE=8192
|
||||
CONFIG_MISC_DEVICES=y
|
||||
CONFIG_EEPROM_AT25=y
|
||||
CONFIG_SCSI=y
|
||||
CONFIG_BLK_DEV_SD=y
|
||||
@ -112,8 +109,6 @@ CONFIG_SND_PCM_OSS=y
|
||||
CONFIG_SND_SEQUENCER_OSS=y
|
||||
# CONFIG_SND_VERBOSE_PROCFS is not set
|
||||
CONFIG_USB=y
|
||||
CONFIG_USB_DEVICEFS=y
|
||||
# CONFIG_USB_DEVICE_CLASS is not set
|
||||
CONFIG_USB_MON=y
|
||||
CONFIG_USB_OHCI_HCD=y
|
||||
CONFIG_USB_STORAGE=y
|
||||
|
||||
@ -1,8 +1,8 @@
|
||||
CONFIG_EXPERIMENTAL=y
|
||||
# CONFIG_LOCALVERSION_AUTO is not set
|
||||
# CONFIG_SWAP is not set
|
||||
CONFIG_SYSVIPC=y
|
||||
CONFIG_LOG_BUF_SHIFT=14
|
||||
CONFIG_EMBEDDED=y
|
||||
CONFIG_BLK_DEV_INITRD=y
|
||||
CONFIG_SLAB=y
|
||||
CONFIG_MODULES=y
|
||||
@ -14,20 +14,23 @@ CONFIG_ARCH_AT91=y
|
||||
CONFIG_ARCH_AT91SAM9RL=y
|
||||
CONFIG_MACH_AT91SAM9RLEK=y
|
||||
# CONFIG_ARM_THUMB is not set
|
||||
CONFIG_AEABI=y
|
||||
CONFIG_ZBOOT_ROM_TEXT=0x0
|
||||
CONFIG_ZBOOT_ROM_BSS=0x0
|
||||
CONFIG_CMDLINE="mem=64M console=ttyS0,115200 initrd=0x21100000,17105363 root=/dev/ram0 rw"
|
||||
CONFIG_FPE_NWFPE=y
|
||||
CONFIG_AUTO_ZRELADDR=y
|
||||
CONFIG_NET=y
|
||||
CONFIG_UNIX=y
|
||||
CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
|
||||
CONFIG_DEVTMPFS=y
|
||||
CONFIG_DEVTMPFS_MOUNT=y
|
||||
CONFIG_MTD=y
|
||||
CONFIG_MTD_CMDLINE_PARTS=y
|
||||
CONFIG_MTD_CHAR=y
|
||||
CONFIG_MTD_BLOCK=y
|
||||
CONFIG_MTD_DATAFLASH=y
|
||||
CONFIG_MTD_NAND=y
|
||||
CONFIG_MTD_NAND_ATMEL=y
|
||||
CONFIG_MTD_UBI=y
|
||||
CONFIG_BLK_DEV_LOOP=y
|
||||
CONFIG_BLK_DEV_RAM=y
|
||||
CONFIG_BLK_DEV_RAM_COUNT=4
|
||||
@ -66,6 +69,7 @@ CONFIG_EXT2_FS=y
|
||||
CONFIG_MSDOS_FS=y
|
||||
CONFIG_VFAT_FS=y
|
||||
CONFIG_TMPFS=y
|
||||
CONFIG_UBIFS_FS=y
|
||||
CONFIG_CRAMFS=y
|
||||
CONFIG_NLS_CODEPAGE_437=y
|
||||
CONFIG_NLS_CODEPAGE_850=y
|
||||
|
||||
@ -119,7 +119,6 @@ config SOC_AT91SAM9261
|
||||
select HAVE_AT91_DBGU0
|
||||
select HAVE_FB_ATMEL
|
||||
select SOC_AT91SAM9
|
||||
select AT91_USE_OLD_CLK
|
||||
select HAVE_AT91_USB_CLK
|
||||
help
|
||||
Select this if you are using one of Atmel's AT91SAM9261 or AT91SAM9G10 SoC.
|
||||
@ -137,7 +136,6 @@ config SOC_AT91SAM9RL
|
||||
select HAVE_AT91_DBGU0
|
||||
select HAVE_FB_ATMEL
|
||||
select SOC_AT91SAM9
|
||||
select AT91_USE_OLD_CLK
|
||||
select HAVE_AT91_UTMI
|
||||
|
||||
config SOC_AT91SAM9G45
|
||||
|
||||
@ -26,10 +26,12 @@
|
||||
#include "at91_rstc.h"
|
||||
#include "soc.h"
|
||||
#include "generic.h"
|
||||
#include "clock.h"
|
||||
#include "sam9_smc.h"
|
||||
#include "pm.h"
|
||||
|
||||
#if defined(CONFIG_OLD_CLK_AT91)
|
||||
#include "clock.h"
|
||||
|
||||
/* --------------------------------------------------------------------
|
||||
* Clocks
|
||||
* -------------------------------------------------------------------- */
|
||||
@ -190,6 +192,23 @@ static struct clk_lookup periph_clocks_lookups[] = {
|
||||
CLKDEV_CON_ID("pioA", &pioA_clk),
|
||||
CLKDEV_CON_ID("pioB", &pioB_clk),
|
||||
CLKDEV_CON_ID("pioC", &pioC_clk),
|
||||
/* more lookup table for DT entries */
|
||||
CLKDEV_CON_DEV_ID("usart", "fffff200.serial", &mck),
|
||||
CLKDEV_CON_DEV_ID("usart", "fffb0000.serial", &usart0_clk),
|
||||
CLKDEV_CON_DEV_ID("usart", "ffffb400.serial", &usart1_clk),
|
||||
CLKDEV_CON_DEV_ID("usart", "fff94000.serial", &usart2_clk),
|
||||
CLKDEV_CON_DEV_ID("t0_clk", "fffa0000.timer", &tc0_clk),
|
||||
CLKDEV_CON_DEV_ID("t1_clk", "fffa0000.timer", &tc1_clk),
|
||||
CLKDEV_CON_DEV_ID("t2_clk", "fffa0000.timer", &tc2_clk),
|
||||
CLKDEV_CON_DEV_ID("hclk", "500000.ohci", &hck0),
|
||||
CLKDEV_CON_DEV_ID("hclk", "600000.fb", &hck1),
|
||||
CLKDEV_CON_DEV_ID("spi_clk", "fffc8000.spi", &spi0_clk),
|
||||
CLKDEV_CON_DEV_ID("spi_clk", "fffcc000.spi", &spi1_clk),
|
||||
CLKDEV_CON_DEV_ID("mci_clk", "fffa8000.mmc", &mmc_clk),
|
||||
CLKDEV_CON_DEV_ID(NULL, "fffac000.i2c", &twi_clk),
|
||||
CLKDEV_CON_DEV_ID(NULL, "fffff400.gpio", &pioA_clk),
|
||||
CLKDEV_CON_DEV_ID(NULL, "fffff600.gpio", &pioB_clk),
|
||||
CLKDEV_CON_DEV_ID(NULL, "fffff800.gpio", &pioC_clk),
|
||||
};
|
||||
|
||||
static struct clk_lookup usart_clocks_lookups[] = {
|
||||
@ -248,7 +267,9 @@ static void __init at91sam9261_register_clocks(void)
|
||||
clk_register(&hck0);
|
||||
clk_register(&hck1);
|
||||
}
|
||||
|
||||
#else
|
||||
#define at91sam9261_register_clocks NULL
|
||||
#endif
|
||||
/* --------------------------------------------------------------------
|
||||
* GPIO
|
||||
* -------------------------------------------------------------------- */
|
||||
|
||||
@ -224,6 +224,7 @@ static struct clk_lookup periph_clocks_lookups[] = {
|
||||
CLKDEV_CON_DEV_ID(NULL, "fffff600.gpio", &pioCDE_clk),
|
||||
CLKDEV_CON_DEV_ID(NULL, "fffff800.gpio", &pioCDE_clk),
|
||||
CLKDEV_CON_DEV_ID(NULL, "fffffa00.gpio", &pioCDE_clk),
|
||||
CLKDEV_CON_DEV_ID(NULL, "fffb8000.pwm", &pwm_clk),
|
||||
};
|
||||
|
||||
static struct clk_lookup usart_clocks_lookups[] = {
|
||||
|
||||
@ -285,6 +285,7 @@ static struct clk_lookup periph_clocks_lookups[] = {
|
||||
CLKDEV_CON_ID("pioE", &pioDE_clk),
|
||||
/* Fake adc clock */
|
||||
CLKDEV_CON_ID("adc_clk", &tsc_clk),
|
||||
CLKDEV_CON_DEV_ID(NULL, "fffb8000.pwm", &pwm_clk),
|
||||
};
|
||||
|
||||
static struct clk_lookup usart_clocks_lookups[] = {
|
||||
|
||||
@ -182,6 +182,7 @@ static struct clk_lookup periph_clocks_lookups[] = {
|
||||
/* additional fake clock for macb_hclk */
|
||||
CLKDEV_CON_DEV_ID("hclk", "500000.ohci", &uhp_clk),
|
||||
CLKDEV_CON_DEV_ID("ohci_clk", "500000.ohci", &uhp_clk),
|
||||
CLKDEV_CON_DEV_ID(NULL, "f8034000.pwm", &pwm_clk),
|
||||
};
|
||||
|
||||
/*
|
||||
|
||||
@ -26,13 +26,14 @@
|
||||
#include "at91_rstc.h"
|
||||
#include "soc.h"
|
||||
#include "generic.h"
|
||||
#include "clock.h"
|
||||
#include "sam9_smc.h"
|
||||
#include "pm.h"
|
||||
|
||||
/* --------------------------------------------------------------------
|
||||
* Clocks
|
||||
* -------------------------------------------------------------------- */
|
||||
#if defined(CONFIG_OLD_CLK_AT91)
|
||||
#include "clock.h"
|
||||
|
||||
/*
|
||||
* The peripheral clocks.
|
||||
@ -197,6 +198,24 @@ static struct clk_lookup periph_clocks_lookups[] = {
|
||||
CLKDEV_CON_ID("pioB", &pioB_clk),
|
||||
CLKDEV_CON_ID("pioC", &pioC_clk),
|
||||
CLKDEV_CON_ID("pioD", &pioD_clk),
|
||||
/* more lookup table for DT entries */
|
||||
CLKDEV_CON_DEV_ID("usart", "fffff200.serial", &mck),
|
||||
CLKDEV_CON_DEV_ID("usart", "fffb0000.serial", &usart0_clk),
|
||||
CLKDEV_CON_DEV_ID("usart", "ffffb400.serial", &usart1_clk),
|
||||
CLKDEV_CON_DEV_ID("usart", "ffffb800.serial", &usart2_clk),
|
||||
CLKDEV_CON_DEV_ID("usart", "ffffbc00.serial", &usart3_clk),
|
||||
CLKDEV_CON_DEV_ID("t0_clk", "fffa0000.timer", &tc0_clk),
|
||||
CLKDEV_CON_DEV_ID("t1_clk", "fffa0000.timer", &tc1_clk),
|
||||
CLKDEV_CON_DEV_ID("t2_clk", "fffa0000.timer", &tc2_clk),
|
||||
CLKDEV_CON_DEV_ID("mci_clk", "fffa4000.mmc", &mmc_clk),
|
||||
CLKDEV_CON_DEV_ID(NULL, "fffa8000.i2c", &twi0_clk),
|
||||
CLKDEV_CON_DEV_ID(NULL, "fffac000.i2c", &twi1_clk),
|
||||
CLKDEV_CON_DEV_ID(NULL, "fffc8000.pwm", &pwm_clk),
|
||||
CLKDEV_CON_DEV_ID(NULL, "ffffc800.pwm", &pwm_clk),
|
||||
CLKDEV_CON_DEV_ID(NULL, "fffff400.gpio", &pioA_clk),
|
||||
CLKDEV_CON_DEV_ID(NULL, "fffff600.gpio", &pioB_clk),
|
||||
CLKDEV_CON_DEV_ID(NULL, "fffff800.gpio", &pioC_clk),
|
||||
CLKDEV_CON_DEV_ID(NULL, "fffffa00.gpio", &pioD_clk),
|
||||
};
|
||||
|
||||
static struct clk_lookup usart_clocks_lookups[] = {
|
||||
@ -239,6 +258,7 @@ static void __init at91sam9rl_register_clocks(void)
|
||||
clk_register(&pck0);
|
||||
clk_register(&pck1);
|
||||
}
|
||||
#endif
|
||||
|
||||
/* --------------------------------------------------------------------
|
||||
* GPIO
|
||||
@ -351,6 +371,8 @@ AT91_SOC_START(at91sam9rl)
|
||||
.default_irq_priority = at91sam9rl_default_irq_priority,
|
||||
.extern_irq = (1 << AT91SAM9RL_ID_IRQ0),
|
||||
.ioremap_registers = at91sam9rl_ioremap_registers,
|
||||
#if defined(CONFIG_OLD_CLK_AT91)
|
||||
.register_clocks = at91sam9rl_register_clocks,
|
||||
#endif
|
||||
.init = at91sam9rl_initialize,
|
||||
AT91_SOC_END
|
||||
|
||||
@ -253,6 +253,7 @@ static struct clk_lookup periph_clocks_lookups[] = {
|
||||
CLKDEV_CON_DEV_ID("ehci_clk", "700000.ehci", &uhphs_clk),
|
||||
CLKDEV_CON_DEV_ID("hclk", "500000.gadget", &utmi_clk),
|
||||
CLKDEV_CON_DEV_ID("pclk", "500000.gadget", &udphs_clk),
|
||||
CLKDEV_CON_DEV_ID(NULL, "f8034000.pwm", &pwm_clk),
|
||||
};
|
||||
|
||||
/*
|
||||
|
||||
@ -13,6 +13,7 @@
|
||||
#include <linux/gpio.h>
|
||||
#include <linux/of.h>
|
||||
#include <linux/of_irq.h>
|
||||
#include <linux/clk-provider.h>
|
||||
|
||||
#include <asm/setup.h>
|
||||
#include <asm/irq.h>
|
||||
@ -25,6 +26,14 @@
|
||||
#include "generic.h"
|
||||
|
||||
|
||||
static void __init sam9_dt_timer_init(void)
|
||||
{
|
||||
#if defined(CONFIG_COMMON_CLK)
|
||||
of_clk_init(NULL);
|
||||
#endif
|
||||
at91sam926x_pit_init();
|
||||
}
|
||||
|
||||
static const struct of_device_id irq_of_match[] __initconst = {
|
||||
|
||||
{ .compatible = "atmel,at91rm9200-aic", .data = at91_aic_of_init },
|
||||
@ -43,7 +52,7 @@ static const char *at91_dt_board_compat[] __initdata = {
|
||||
|
||||
DT_MACHINE_START(at91sam_dt, "Atmel AT91SAM (Device Tree)")
|
||||
/* Maintainer: Atmel */
|
||||
.init_time = at91sam926x_pit_init,
|
||||
.init_time = sam9_dt_timer_init,
|
||||
.map_io = at91_map_io,
|
||||
.handle_irq = at91_aic_handle_irq,
|
||||
.init_early = at91_dt_initialize,
|
||||
|
||||
Loading…
Reference in New Issue
Block a user