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bnx2x: Fix PHY locking problem

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PHY locking is required between two ports for some external PHYs. Since
initialization was done in the common init function (called only on the
first port initialization) rather than in the port init function, there
was in fact no PHY locking between the ports.

Signed-off-by: Yaniv Rosner <yanivr@broadcom.com>
Signed-off-by: Eilon Greenstein <eilong@broadcom.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
Yaniv Rosner 2010-08-16 06:34:06 +00:00 committed by David S. Miller
parent f037590fff
commit 3971a230f9
1 changed files with 7 additions and 2 deletions
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9
drivers/net/bnx2x/bnx2x_main.c
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@ -4328,10 +4328,12 @@ static int bnx2x_init_port(struct bnx2x *bp)
val |= aeu_gpio_mask;
REG_WR(bp, offset, val);
}
bp->port.need_hw_lock = 1;
break;
case PORT_HW_CFG_XGXS_EXT_PHY_TYPE_SFX7101:
case PORT_HW_CFG_XGXS_EXT_PHY_TYPE_BCM8727:
bp->port.need_hw_lock = 1;
case PORT_HW_CFG_XGXS_EXT_PHY_TYPE_SFX7101:
/* add SPIO 5 to group 0 */
{
u32 reg_addr = (port ? MISC_REG_AEU_ENABLE1_FUNC_1_OUT_0 :
@ -4341,7 +4343,10 @@ static int bnx2x_init_port(struct bnx2x *bp)
REG_WR(bp, reg_addr, val);
}
break;
case PORT_HW_CFG_XGXS_EXT_PHY_TYPE_BCM8072:
case PORT_HW_CFG_XGXS_EXT_PHY_TYPE_BCM8073:
bp->port.need_hw_lock = 1;
break;
default:
break;
}