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drm/amd/display: Improve logging of validation failures during atomic_check

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[Why]
There are different reasons for Validation failure error during
atomic_check

[How]
Add better logging of the reason for validation failure

Signed-off-by: Eric Bernstein <eric.bernstein@amd.com>
Reviewed-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
Acked-by: Leo Li <sunpeng.li@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Eric Bernstein 2018-11-22 17:04:14 -05:00 committed by Alex Deucher
parent 380604e27b
commit 38684e46ef
5 changed files with 58 additions and 2 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
drivers/gpu/drm/amd/display/dc/core/dc_resource.c
View File

@ -1842,7 +1842,7 @@ enum dc_status resource_map_pool_resources(
&context->res_ctx, pool, stream);
if (!pipe_ctx->stream_res.stream_enc)
return DC_NO_STREAM_ENG_RESOURCE;
return DC_NO_STREAM_ENC_RESOURCE;
update_stream_engine_usage(
&context->res_ctx, pool,

26
drivers/gpu/drm/amd/display/dc/dml/display_mode_enums.h
View File

@ -121,4 +121,30 @@ enum self_refresh_affinity {
dm_neither_self_refresh_nor_mclk_switch
};
enum dm_validation_status {
DML_VALIDATION_OK,
DML_FAIL_SCALE_RATIO_TAP,
DML_FAIL_SOURCE_PIXEL_FORMAT,
DML_FAIL_VIEWPORT_SIZE,
DML_FAIL_TOTAL_V_ACTIVE_BW,
DML_FAIL_DIO_SUPPORT,
DML_FAIL_NOT_ENOUGH_DSC,
DML_FAIL_DSC_CLK_REQUIRED,
DML_FAIL_URGENT_LATENCY,
DML_FAIL_REORDERING_BUFFER,
DML_FAIL_DISPCLK_DPPCLK,
DML_FAIL_TOTAL_AVAILABLE_PIPES,
DML_FAIL_NUM_OTG,
DML_FAIL_WRITEBACK_MODE,
DML_FAIL_WRITEBACK_LATENCY,
DML_FAIL_WRITEBACK_SCALE_RATIO_TAP,
DML_FAIL_CURSOR_SUPPORT,
DML_FAIL_PITCH_SUPPORT,
DML_FAIL_PTE_BUFFER_SIZE,
DML_FAIL_HOST_VM_IMMEDIATE_FLIP,
DML_FAIL_DSC_INPUT_BPC,
DML_FAIL_PREFETCH_SUPPORT,
DML_FAIL_V_RATIO_PREFETCH,
};
#endif

28
drivers/gpu/drm/amd/display/dc/dml/display_mode_lib.c
View File

@ -62,3 +62,31 @@ void dml_init_instance(struct display_mode_lib *lib, enum dml_project project)
}
}
const char *dml_get_status_message(enum dm_validation_status status)
{
switch (status) {
case DML_VALIDATION_OK: return "Validation OK";
case DML_FAIL_SCALE_RATIO_TAP: return "Scale ratio/tap";
case DML_FAIL_SOURCE_PIXEL_FORMAT: return "Source pixel format";
case DML_FAIL_VIEWPORT_SIZE: return "Viewport size";
case DML_FAIL_TOTAL_V_ACTIVE_BW: return "Total vertical active bandwidth";
case DML_FAIL_DIO_SUPPORT: return "DIO support";
case DML_FAIL_NOT_ENOUGH_DSC: return "Not enough DSC Units";
case DML_FAIL_DSC_CLK_REQUIRED: return "DSC clock required";
case DML_FAIL_URGENT_LATENCY: return "Urgent latency";
case DML_FAIL_REORDERING_BUFFER: return "Re-ordering buffer";
case DML_FAIL_DISPCLK_DPPCLK: return "Dispclk and Dppclk";
case DML_FAIL_TOTAL_AVAILABLE_PIPES: return "Total available pipes";
case DML_FAIL_NUM_OTG: return "Number of OTG";
case DML_FAIL_WRITEBACK_MODE: return "Writeback mode";
case DML_FAIL_WRITEBACK_LATENCY: return "Writeback latency";
case DML_FAIL_WRITEBACK_SCALE_RATIO_TAP: return "Writeback scale ratio/tap";
case DML_FAIL_CURSOR_SUPPORT: return "Cursor support";
case DML_FAIL_PITCH_SUPPORT: return "Pitch support";
case DML_FAIL_PTE_BUFFER_SIZE: return "PTE buffer size";
case DML_FAIL_DSC_INPUT_BPC: return "DSC input bpc";
case DML_FAIL_PREFETCH_SUPPORT: return "Prefetch support";
case DML_FAIL_V_RATIO_PREFETCH: return "Vertical ratio prefetch";
default: return "Unknown Status";
}
}

2
drivers/gpu/drm/amd/display/dc/dml/display_mode_lib.h
View File

@ -43,4 +43,6 @@ struct display_mode_lib {
void dml_init_instance(struct display_mode_lib *lib, enum dml_project project);
const char *dml_get_status_message(enum dm_validation_status status);
#endif

2
drivers/gpu/drm/amd/display/dc/inc/core_status.h
View File

@ -30,7 +30,7 @@ enum dc_status {
DC_OK = 1,
DC_NO_CONTROLLER_RESOURCE = 2,
DC_NO_STREAM_ENG_RESOURCE = 3,
DC_NO_STREAM_ENC_RESOURCE = 3,
DC_NO_CLOCK_SOURCE_RESOURCE = 4,
DC_FAIL_CONTROLLER_VALIDATE = 5,
DC_FAIL_ENC_VALIDATE = 6,