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ARM: mvebu: update Armada XP DT for dynamic frequency scaling

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In order to support dynamic frequency scaling:

 * the cpuclk Device Tree node needs to be updated to describe a
   second set of registers describing the PMU DFS registers.

 * the clock-latency property of the CPUs must be filled, otherwise
   the ondemand and conservative cpufreq governors refuse to work. The
   latency is high because the cost of a frequency transition is quite
   high on those CPUs.

Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Link: https://lkml.kernel.org/r/1404920715-19834-5-git-send-email-thomas.petazzoni@free-electrons.com
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
This commit is contained in:
Thomas Petazzoni 2014-07-09 17:45:12 +02:00 committed by Jason Cooper
parent d7f3ec2b69
commit 3843607838
4 changed files with 9 additions and 1 deletions
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2
arch/arm/boot/dts/armada-xp-mv78230.dtsi
View File

@ -34,6 +34,7 @@
compatible = "marvell,sheeva-v7";
reg = <0>;
clocks = <&cpuclk 0>;
clock-latency = <1000000>;
};
cpu@1 {
@ -41,6 +42,7 @@
compatible = "marvell,sheeva-v7";
reg = <1>;
clocks = <&cpuclk 1>;
clock-latency = <1000000>;
};
};

2
arch/arm/boot/dts/armada-xp-mv78260.dtsi
View File

@ -36,6 +36,7 @@
compatible = "marvell,sheeva-v7";
reg = <0>;
clocks = <&cpuclk 0>;
clock-latency = <1000000>;
};
cpu@1 {
@ -43,6 +44,7 @@
compatible = "marvell,sheeva-v7";
reg = <1>;
clocks = <&cpuclk 1>;
clock-latency = <1000000>;
};
};

4
arch/arm/boot/dts/armada-xp-mv78460.dtsi
View File

@ -37,6 +37,7 @@
compatible = "marvell,sheeva-v7";
reg = <0>;
clocks = <&cpuclk 0>;
clock-latency = <1000000>;
};
cpu@1 {
@ -44,6 +45,7 @@
compatible = "marvell,sheeva-v7";
reg = <1>;
clocks = <&cpuclk 1>;
clock-latency = <1000000>;
};
cpu@2 {
@ -51,6 +53,7 @@
compatible = "marvell,sheeva-v7";
reg = <2>;
clocks = <&cpuclk 2>;
clock-latency = <1000000>;
};
cpu@3 {
@ -58,6 +61,7 @@
compatible = "marvell,sheeva-v7";
reg = <3>;
clocks = <&cpuclk 3>;
clock-latency = <1000000>;
};
};

2
arch/arm/boot/dts/armada-xp.dtsi
View File

@ -99,7 +99,7 @@
cpuclk: clock-complex@18700 {
#clock-cells = <1>;
compatible = "marvell,armada-xp-cpu-clock";
reg = <0x18700 0xA0>;
reg = <0x18700 0xA0>, <0x1c054 0x10>;
clocks = <&coreclk 1>;
};