drm/radeon/kms: update new pll algo
- add support for pre-avivo chips - add support for fixed post/ref dividers - add support for non-fractional fb dividers By default avivo chips use the new algo and pre-avivo chips use the old algo. Use the "new_pll" module option to toggle between them. Signed-off-by: Alex Deucher <alexdeucher@gmail.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
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Dave Airlie
parent
939461d59d
commit
383be5d178
@@ -703,7 +703,10 @@ static void radeon_set_pll(struct drm_crtc *crtc, struct drm_display_mode *mode)
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pll = &rdev->clock.p1pll;
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pll->flags = RADEON_PLL_LEGACY;
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pll->algo = PLL_ALGO_LEGACY;
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if (radeon_new_pll == 1)
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pll->algo = PLL_ALGO_NEW;
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else
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pll->algo = PLL_ALGO_LEGACY;
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if (mode->clock > 200000) /* range limits??? */
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pll->flags |= RADEON_PLL_PREFER_HIGH_FB_DIV;
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