forked from Minki/linux
ARM: OMAP2+: Drop legacy platform data for sdma
We can now probe devices with ti-sysc interconnect driver and dts data. Let's drop the related platform data and custom ti,hwmods dts property. As we're just dropping data, and the early platform data init is based on the custom ti,hwmods property, we want to drop both the platform data and ti,hwmods property in a single patch. Cc: Aaro Koskinen <aaro.koskinen@iki.fi> Cc: Arnd Bergmann <arnd@arndb.de> Cc: Peter Ujfalusi <peter.ujfalusi@ti.com> Cc: Russell King <rmk+kernel@armlinux.org.uk> Cc: Vinod Koul <vkoul@kernel.org> Acked-by: Peter Ujfalusi <peter.ujfalusi@ti.com> Tested-by: Peter Ujfalusi <peter.ujfalusi@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
This commit is contained in:
parent
82f12e64a0
commit
37b156ecf7
@ -186,7 +186,6 @@
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target-module@56000 { /* 0x4a056000, ap 9 02.0 */
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compatible = "ti,sysc-omap2", "ti,sysc";
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ti,hwmods = "dma_system";
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reg = <0x56000 0x4>,
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<0x5602c 0x4>,
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<0x56028 0x4>;
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@ -82,7 +82,6 @@
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target-module@48056000 {
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compatible = "ti,sysc-omap2", "ti,sysc";
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ti,hwmods = "dma";
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reg = <0x48056000 0x4>,
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<0x4805602c 0x4>,
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<0x48056028 0x4>;
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@ -208,7 +208,6 @@
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target-module@48056000 {
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compatible = "ti,sysc-omap2", "ti,sysc";
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ti,hwmods = "dma";
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reg = <0x48056000 0x4>,
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<0x4805602c 0x4>,
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<0x48056028 0x4>;
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@ -136,7 +136,6 @@
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target-module@56000 { /* 0x4a056000, ap 7 0a.0 */
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compatible = "ti,sysc-omap2", "ti,sysc";
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ti,hwmods = "dma_system";
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reg = <0x56000 0x4>,
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<0x5602c 0x4>,
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<0x56028 0x4>;
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@ -213,7 +213,6 @@
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target-module@56000 { /* 0x4a056000, ap 7 02.0 */
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compatible = "ti,sysc-omap2", "ti,sysc";
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ti,hwmods = "dma_system";
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reg = <0x56000 0x4>,
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<0x5602c 0x4>,
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<0x56028 0x4>;
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@ -11,7 +11,6 @@
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*/
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#include <linux/platform_data/i2c-omap.h>
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#include <linux/omap-dma.h>
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#include "omap_hwmod.h"
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#include "l3_2xxx.h"
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@ -126,13 +125,6 @@ static struct omap_hwmod omap2420_i2c2_hwmod = {
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.flags = HWMOD_16BIT_REG,
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};
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static struct omap_hwmod omap2420_dma_system_hwmod = {
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.name = "dma",
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.class = &omap2xxx_dma_hwmod_class,
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.main_clk = "core_l3_ck",
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.flags = HWMOD_NO_IDLEST,
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};
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/* mailbox */
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static struct omap_hwmod omap2420_mailbox_hwmod = {
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.name = "mailbox",
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@ -320,22 +312,6 @@ static struct omap_hwmod_ocp_if omap2420_l4_wkup__gpio4 = {
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.user = OCP_USER_MPU | OCP_USER_SDMA,
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};
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/* dma_system -> L3 */
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static struct omap_hwmod_ocp_if omap2420_dma_system__l3 = {
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.master = &omap2420_dma_system_hwmod,
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.slave = &omap2xxx_l3_main_hwmod,
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.clk = "core_l3_ck",
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.user = OCP_USER_MPU | OCP_USER_SDMA,
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};
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/* l4_core -> dma_system */
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static struct omap_hwmod_ocp_if omap2420_l4_core__dma_system = {
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.master = &omap2xxx_l4_core_hwmod,
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.slave = &omap2420_dma_system_hwmod,
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.clk = "sdma_ick",
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.user = OCP_USER_MPU | OCP_USER_SDMA,
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};
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/* l4_core -> mailbox */
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static struct omap_hwmod_ocp_if omap2420_l4_core__mailbox = {
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.master = &omap2xxx_l4_core_hwmod,
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@ -427,8 +403,6 @@ static struct omap_hwmod_ocp_if *omap2420_hwmod_ocp_ifs[] __initdata = {
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&omap2420_l4_wkup__gpio2,
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&omap2420_l4_wkup__gpio3,
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&omap2420_l4_wkup__gpio4,
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&omap2420_dma_system__l3,
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&omap2420_l4_core__dma_system,
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&omap2420_l4_core__mailbox,
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&omap2420_l4_core__mcbsp1,
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&omap2420_l4_core__mcbsp2,
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@ -12,7 +12,6 @@
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#include <linux/platform_data/i2c-omap.h>
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#include <linux/platform_data/hsmmc-omap.h>
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#include <linux/omap-dma.h>
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#include "omap_hwmod.h"
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#include "l3_2xxx.h"
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@ -121,13 +120,6 @@ static struct omap_hwmod omap2430_gpio5_hwmod = {
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.class = &omap2xxx_gpio_hwmod_class,
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};
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static struct omap_hwmod omap2430_dma_system_hwmod = {
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.name = "dma",
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.class = &omap2xxx_dma_hwmod_class,
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.main_clk = "core_l3_ck",
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.flags = HWMOD_NO_IDLEST,
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};
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/* mailbox */
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static struct omap_hwmod omap2430_mailbox_hwmod = {
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.name = "mailbox",
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@ -500,22 +492,6 @@ static struct omap_hwmod_ocp_if omap2430_l4_core__gpio5 = {
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.user = OCP_USER_MPU | OCP_USER_SDMA,
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};
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/* dma_system -> L3 */
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static struct omap_hwmod_ocp_if omap2430_dma_system__l3 = {
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.master = &omap2430_dma_system_hwmod,
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.slave = &omap2xxx_l3_main_hwmod,
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.clk = "core_l3_ck",
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.user = OCP_USER_MPU | OCP_USER_SDMA,
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};
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/* l4_core -> dma_system */
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static struct omap_hwmod_ocp_if omap2430_l4_core__dma_system = {
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.master = &omap2xxx_l4_core_hwmod,
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.slave = &omap2430_dma_system_hwmod,
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.clk = "sdma_ick",
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.user = OCP_USER_MPU | OCP_USER_SDMA,
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};
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/* l4_core -> mailbox */
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static struct omap_hwmod_ocp_if omap2430_l4_core__mailbox = {
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.master = &omap2xxx_l4_core_hwmod,
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@ -627,8 +603,6 @@ static struct omap_hwmod_ocp_if *omap2430_hwmod_ocp_ifs[] __initdata = {
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&omap2430_l4_wkup__gpio3,
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&omap2430_l4_wkup__gpio4,
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&omap2430_l4_core__gpio5,
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&omap2430_dma_system__l3,
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&omap2430_l4_core__dma_system,
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&omap2430_l4_core__mailbox,
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&omap2430_l4_core__mcbsp1,
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&omap2430_l4_core__mcbsp2,
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@ -7,7 +7,6 @@
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*/
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#include <linux/types.h>
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#include <linux/omap-dma.h>
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#include "omap_hwmod.h"
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#include "omap_hwmod_common_data.h"
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@ -95,23 +94,6 @@ struct omap_hwmod_class omap2xxx_gpio_hwmod_class = {
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.sysc = &omap2xxx_gpio_sysc,
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};
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/* system dma */
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static struct omap_hwmod_class_sysconfig omap2xxx_dma_sysc = {
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.rev_offs = 0x0000,
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.sysc_offs = 0x002c,
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.syss_offs = 0x0028,
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.sysc_flags = (SYSC_HAS_SOFTRESET | SYSC_HAS_MIDLEMODE |
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SYSC_HAS_CLOCKACTIVITY | SYSC_HAS_EMUFREE |
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SYSC_HAS_AUTOIDLE | SYSS_HAS_RESET_STATUS),
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.idlemodes = (MSTANDBY_FORCE | MSTANDBY_NO | MSTANDBY_SMART),
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.sysc_fields = &omap_hwmod_sysc_type1,
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};
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struct omap_hwmod_class omap2xxx_dma_hwmod_class = {
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.name = "dma",
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.sysc = &omap2xxx_dma_sysc,
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};
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/*
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* 'mailbox' class
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* mailbox module allowing communication between the on-chip processors
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@ -16,7 +16,6 @@
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#include <linux/power/smartreflex.h>
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#include <linux/platform_data/hsmmc-omap.h>
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#include <linux/omap-dma.h>
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#include "l3_3xxx.h"
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#include "l4_3xxx.h"
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@ -833,39 +832,6 @@ static struct omap_hwmod omap3xxx_gpio6_hwmod = {
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.class = &omap3xxx_gpio_hwmod_class,
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};
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static struct omap_hwmod_class_sysconfig omap3xxx_dma_sysc = {
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.rev_offs = 0x0000,
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.sysc_offs = 0x002c,
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.syss_offs = 0x0028,
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.sysc_flags = (SYSC_HAS_SIDLEMODE | SYSC_HAS_SOFTRESET |
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SYSC_HAS_MIDLEMODE | SYSC_HAS_CLOCKACTIVITY |
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SYSC_HAS_EMUFREE | SYSC_HAS_AUTOIDLE |
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SYSS_HAS_RESET_STATUS),
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.idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART |
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MSTANDBY_FORCE | MSTANDBY_NO | MSTANDBY_SMART),
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.sysc_fields = &omap_hwmod_sysc_type1,
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};
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static struct omap_hwmod_class omap3xxx_dma_hwmod_class = {
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.name = "dma",
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.sysc = &omap3xxx_dma_sysc,
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};
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/* dma_system */
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static struct omap_hwmod omap3xxx_dma_system_hwmod = {
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.name = "dma",
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.class = &omap3xxx_dma_hwmod_class,
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.main_clk = "core_l3_ick",
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.prcm = {
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.omap2 = {
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.module_offs = CORE_MOD,
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.idlest_reg_id = 1,
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.idlest_idle_bit = OMAP3430_ST_SDMA_SHIFT,
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},
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},
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.flags = HWMOD_NO_IDLEST,
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};
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/*
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* 'mcbsp' class
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* multi channel buffered serial port controller
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@ -2225,23 +2191,6 @@ static struct omap_hwmod_ocp_if omap3xxx_l4_per__gpio6 = {
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.user = OCP_USER_MPU | OCP_USER_SDMA,
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};
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/* dma_system -> L3 */
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static struct omap_hwmod_ocp_if omap3xxx_dma_system__l3 = {
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.master = &omap3xxx_dma_system_hwmod,
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.slave = &omap3xxx_l3_main_hwmod,
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.clk = "core_l3_ick",
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.user = OCP_USER_MPU | OCP_USER_SDMA,
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};
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/* l4_cfg -> dma_system */
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static struct omap_hwmod_ocp_if omap3xxx_l4_core__dma_system = {
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.master = &omap3xxx_l4_core_hwmod,
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.slave = &omap3xxx_dma_system_hwmod,
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.clk = "core_l4_ick",
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.user = OCP_USER_MPU | OCP_USER_SDMA,
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};
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/* l4_core -> mcbsp1 */
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static struct omap_hwmod_ocp_if omap3xxx_l4_core__mcbsp1 = {
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.master = &omap3xxx_l4_core_hwmod,
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@ -2620,8 +2569,6 @@ static struct omap_hwmod_ocp_if *omap3xxx_hwmod_ocp_ifs[] __initdata = {
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&omap3xxx_l4_per__gpio4,
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&omap3xxx_l4_per__gpio5,
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&omap3xxx_l4_per__gpio6,
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&omap3xxx_dma_system__l3,
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&omap3xxx_l4_core__dma_system,
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&omap3xxx_l4_core__mcbsp1,
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&omap3xxx_l4_per__mcbsp2,
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&omap3xxx_l4_per__mcbsp3,
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@ -20,8 +20,6 @@
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#include <linux/io.h>
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#include <linux/power/smartreflex.h>
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#include <linux/omap-dma.h>
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#include "omap_hwmod.h"
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#include "omap_hwmod_common_data.h"
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#include "cm1_44xx.h"
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@ -32,9 +30,6 @@
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/* Base offset for all OMAP4 interrupts external to MPUSS */
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#define OMAP44XX_IRQ_GIC_START 32
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/* Base offset for all OMAP4 dma requests */
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#define OMAP44XX_DMA_REQ_START 1
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/*
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* IP blocks
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*/
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@ -398,44 +393,6 @@ static struct omap_hwmod omap44xx_debugss_hwmod = {
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},
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};
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/*
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* 'dma' class
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* dma controller for data exchange between memory to memory (i.e. internal or
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* external memory) and gp peripherals to memory or memory to gp peripherals
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*/
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static struct omap_hwmod_class_sysconfig omap44xx_dma_sysc = {
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.rev_offs = 0x0000,
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.sysc_offs = 0x002c,
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.syss_offs = 0x0028,
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.sysc_flags = (SYSC_HAS_AUTOIDLE | SYSC_HAS_CLOCKACTIVITY |
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SYSC_HAS_EMUFREE | SYSC_HAS_MIDLEMODE |
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SYSC_HAS_SIDLEMODE | SYSC_HAS_SOFTRESET |
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SYSS_HAS_RESET_STATUS),
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.idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART |
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MSTANDBY_FORCE | MSTANDBY_NO | MSTANDBY_SMART),
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.sysc_fields = &omap_hwmod_sysc_type1,
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};
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static struct omap_hwmod_class omap44xx_dma_hwmod_class = {
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.name = "dma",
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.sysc = &omap44xx_dma_sysc,
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};
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/* dma_system */
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static struct omap_hwmod omap44xx_dma_system_hwmod = {
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.name = "dma_system",
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.class = &omap44xx_dma_hwmod_class,
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.clkdm_name = "l3_dma_clkdm",
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.main_clk = "l3_div_ck",
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.prcm = {
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.omap4 = {
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.clkctrl_offs = OMAP4_CM_SDMA_SDMA_CLKCTRL_OFFSET,
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.context_offs = OMAP4_RM_SDMA_SDMA_CONTEXT_OFFSET,
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},
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},
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};
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/*
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* 'dmic' class
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* digital microphone controller
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@ -2205,14 +2162,6 @@ static struct omap_hwmod_ocp_if omap44xx_debugss__l3_main_2 = {
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.user = OCP_USER_MPU | OCP_USER_SDMA,
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};
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/* dma_system -> l3_main_2 */
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static struct omap_hwmod_ocp_if omap44xx_dma_system__l3_main_2 = {
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.master = &omap44xx_dma_system_hwmod,
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.slave = &omap44xx_l3_main_2_hwmod,
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.clk = "l3_div_ck",
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.user = OCP_USER_MPU | OCP_USER_SDMA,
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};
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/* fdif -> l3_main_2 */
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static struct omap_hwmod_ocp_if omap44xx_fdif__l3_main_2 = {
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.master = &omap44xx_fdif_hwmod,
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@ -2445,14 +2394,6 @@ static struct omap_hwmod_ocp_if omap44xx_l3_instr__debugss = {
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.user = OCP_USER_MPU | OCP_USER_SDMA,
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};
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/* l4_cfg -> dma_system */
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static struct omap_hwmod_ocp_if omap44xx_l4_cfg__dma_system = {
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.master = &omap44xx_l4_cfg_hwmod,
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.slave = &omap44xx_dma_system_hwmod,
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.clk = "l4_div_ck",
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.user = OCP_USER_MPU | OCP_USER_SDMA,
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};
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/* l4_abe -> dmic */
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static struct omap_hwmod_ocp_if omap44xx_l4_abe__dmic = {
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.master = &omap44xx_l4_abe_hwmod,
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@ -2945,7 +2886,6 @@ static struct omap_hwmod_ocp_if *omap44xx_hwmod_ocp_ifs[] __initdata = {
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&omap44xx_l4_cfg__l3_main_1,
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&omap44xx_mpu__l3_main_1,
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&omap44xx_debugss__l3_main_2,
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&omap44xx_dma_system__l3_main_2,
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&omap44xx_fdif__l3_main_2,
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&omap44xx_hsi__l3_main_2,
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&omap44xx_ipu__l3_main_2,
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@ -2975,7 +2915,6 @@ static struct omap_hwmod_ocp_if *omap44xx_hwmod_ocp_ifs[] __initdata = {
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&omap44xx_l4_wkup__ctrl_module_wkup,
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&omap44xx_l4_wkup__ctrl_module_pad_wkup,
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&omap44xx_l3_instr__debugss,
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&omap44xx_l4_cfg__dma_system,
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&omap44xx_l4_abe__dmic,
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&omap44xx_dsp__iva,
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/* &omap44xx_dsp__sl2if, */
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@ -17,8 +17,6 @@
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#include <linux/io.h>
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#include <linux/power/smartreflex.h>
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#include <linux/omap-dma.h>
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#include "omap_hwmod.h"
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#include "omap_hwmod_common_data.h"
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#include "cm1_54xx.h"
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@ -28,10 +26,6 @@
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||||
/* Base offset for all OMAP5 interrupts external to MPUSS */
|
||||
#define OMAP54XX_IRQ_GIC_START 32
|
||||
|
||||
/* Base offset for all OMAP5 dma requests */
|
||||
#define OMAP54XX_DMA_REQ_START 1
|
||||
|
||||
|
||||
/*
|
||||
* IP blocks
|
||||
*/
|
||||
@ -232,44 +226,6 @@ static struct omap_hwmod omap54xx_counter_32k_hwmod = {
|
||||
},
|
||||
};
|
||||
|
||||
/*
|
||||
* 'dma' class
|
||||
* dma controller for data exchange between memory to memory (i.e. internal or
|
||||
* external memory) and gp peripherals to memory or memory to gp peripherals
|
||||
*/
|
||||
|
||||
static struct omap_hwmod_class_sysconfig omap54xx_dma_sysc = {
|
||||
.rev_offs = 0x0000,
|
||||
.sysc_offs = 0x002c,
|
||||
.syss_offs = 0x0028,
|
||||
.sysc_flags = (SYSC_HAS_AUTOIDLE | SYSC_HAS_CLOCKACTIVITY |
|
||||
SYSC_HAS_EMUFREE | SYSC_HAS_MIDLEMODE |
|
||||
SYSC_HAS_SIDLEMODE | SYSC_HAS_SOFTRESET |
|
||||
SYSS_HAS_RESET_STATUS),
|
||||
.idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART |
|
||||
MSTANDBY_FORCE | MSTANDBY_NO | MSTANDBY_SMART),
|
||||
.sysc_fields = &omap_hwmod_sysc_type1,
|
||||
};
|
||||
|
||||
static struct omap_hwmod_class omap54xx_dma_hwmod_class = {
|
||||
.name = "dma",
|
||||
.sysc = &omap54xx_dma_sysc,
|
||||
};
|
||||
|
||||
/* dma_system */
|
||||
static struct omap_hwmod omap54xx_dma_system_hwmod = {
|
||||
.name = "dma_system",
|
||||
.class = &omap54xx_dma_hwmod_class,
|
||||
.clkdm_name = "dma_clkdm",
|
||||
.main_clk = "l3_iclk_div",
|
||||
.prcm = {
|
||||
.omap4 = {
|
||||
.clkctrl_offs = OMAP54XX_CM_DMA_DMA_SYSTEM_CLKCTRL_OFFSET,
|
||||
.context_offs = OMAP54XX_RM_DMA_DMA_SYSTEM_CONTEXT_OFFSET,
|
||||
},
|
||||
},
|
||||
};
|
||||
|
||||
/*
|
||||
* 'dmic' class
|
||||
* digital microphone controller
|
||||
@ -1415,14 +1371,6 @@ static struct omap_hwmod_ocp_if omap54xx_l4_wkup__counter_32k = {
|
||||
.user = OCP_USER_MPU | OCP_USER_SDMA,
|
||||
};
|
||||
|
||||
/* l4_cfg -> dma_system */
|
||||
static struct omap_hwmod_ocp_if omap54xx_l4_cfg__dma_system = {
|
||||
.master = &omap54xx_l4_cfg_hwmod,
|
||||
.slave = &omap54xx_dma_system_hwmod,
|
||||
.clk = "l4_root_clk_div",
|
||||
.user = OCP_USER_MPU | OCP_USER_SDMA,
|
||||
};
|
||||
|
||||
/* l4_abe -> dmic */
|
||||
static struct omap_hwmod_ocp_if omap54xx_l4_abe__dmic = {
|
||||
.master = &omap54xx_l4_abe_hwmod,
|
||||
@ -1665,7 +1613,6 @@ static struct omap_hwmod_ocp_if *omap54xx_hwmod_ocp_ifs[] __initdata = {
|
||||
&omap54xx_l3_main_1__l4_wkup,
|
||||
&omap54xx_mpu__mpu_private,
|
||||
&omap54xx_l4_wkup__counter_32k,
|
||||
&omap54xx_l4_cfg__dma_system,
|
||||
&omap54xx_l4_abe__dmic,
|
||||
&omap54xx_l4_cfg__mmu_dsp,
|
||||
&omap54xx_l3_main_2__dss,
|
||||
|
@ -17,8 +17,6 @@
|
||||
#include <linux/io.h>
|
||||
#include <linux/power/smartreflex.h>
|
||||
|
||||
#include <linux/omap-dma.h>
|
||||
|
||||
#include "omap_hwmod.h"
|
||||
#include "omap_hwmod_common_data.h"
|
||||
#include "cm1_7xx.h"
|
||||
@ -29,10 +27,6 @@
|
||||
/* Base offset for all DRA7XX interrupts external to MPUSS */
|
||||
#define DRA7XX_IRQ_GIC_START 32
|
||||
|
||||
/* Base offset for all DRA7XX dma requests */
|
||||
#define DRA7XX_DMA_REQ_START 1
|
||||
|
||||
|
||||
/*
|
||||
* IP blocks
|
||||
*/
|
||||
@ -387,44 +381,6 @@ static struct omap_hwmod dra7xx_epwmss2_hwmod = {
|
||||
},
|
||||
};
|
||||
|
||||
/*
|
||||
* 'dma' class
|
||||
*
|
||||
*/
|
||||
|
||||
static struct omap_hwmod_class_sysconfig dra7xx_dma_sysc = {
|
||||
.rev_offs = 0x0000,
|
||||
.sysc_offs = 0x002c,
|
||||
.syss_offs = 0x0028,
|
||||
.sysc_flags = (SYSC_HAS_AUTOIDLE | SYSC_HAS_CLOCKACTIVITY |
|
||||
SYSC_HAS_EMUFREE | SYSC_HAS_MIDLEMODE |
|
||||
SYSC_HAS_SIDLEMODE | SYSC_HAS_SOFTRESET |
|
||||
SYSS_HAS_RESET_STATUS),
|
||||
.idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART |
|
||||
SIDLE_SMART_WKUP | MSTANDBY_FORCE | MSTANDBY_NO |
|
||||
MSTANDBY_SMART | MSTANDBY_SMART_WKUP),
|
||||
.sysc_fields = &omap_hwmod_sysc_type1,
|
||||
};
|
||||
|
||||
static struct omap_hwmod_class dra7xx_dma_hwmod_class = {
|
||||
.name = "dma",
|
||||
.sysc = &dra7xx_dma_sysc,
|
||||
};
|
||||
|
||||
/* dma_system */
|
||||
static struct omap_hwmod dra7xx_dma_system_hwmod = {
|
||||
.name = "dma_system",
|
||||
.class = &dra7xx_dma_hwmod_class,
|
||||
.clkdm_name = "dma_clkdm",
|
||||
.main_clk = "l3_iclk_div",
|
||||
.prcm = {
|
||||
.omap4 = {
|
||||
.clkctrl_offs = DRA7XX_CM_DMA_DMA_SYSTEM_CLKCTRL_OFFSET,
|
||||
.context_offs = DRA7XX_RM_DMA_DMA_SYSTEM_CONTEXT_OFFSET,
|
||||
},
|
||||
},
|
||||
};
|
||||
|
||||
/*
|
||||
* 'tpcc' class
|
||||
*
|
||||
@ -1698,14 +1654,6 @@ static struct omap_hwmod_ocp_if dra7xx_l4_per2__dcan2 = {
|
||||
.user = OCP_USER_MPU | OCP_USER_SDMA,
|
||||
};
|
||||
|
||||
/* l4_cfg -> dma_system */
|
||||
static struct omap_hwmod_ocp_if dra7xx_l4_cfg__dma_system = {
|
||||
.master = &dra7xx_l4_cfg_hwmod,
|
||||
.slave = &dra7xx_dma_system_hwmod,
|
||||
.clk = "l3_iclk_div",
|
||||
.user = OCP_USER_MPU | OCP_USER_SDMA,
|
||||
};
|
||||
|
||||
/* l3_main_1 -> tpcc */
|
||||
static struct omap_hwmod_ocp_if dra7xx_l3_main_1__tpcc = {
|
||||
.master = &dra7xx_l3_main_1_hwmod,
|
||||
@ -2140,7 +2088,6 @@ static struct omap_hwmod_ocp_if *dra7xx_hwmod_ocp_ifs[] __initdata = {
|
||||
&dra7xx_l4_wkup__ctrl_module_wkup,
|
||||
&dra7xx_l4_wkup__dcan1,
|
||||
&dra7xx_l4_per2__dcan2,
|
||||
&dra7xx_l4_cfg__dma_system,
|
||||
&dra7xx_l3_main_1__tpcc,
|
||||
&dra7xx_l3_main_1__tptc0,
|
||||
&dra7xx_l3_main_1__tptc1,
|
||||
|
@ -98,7 +98,6 @@ extern struct omap_hwmod_class omap2_hdq1w_class;
|
||||
extern struct omap_hwmod_class omap2xxx_timer_hwmod_class;
|
||||
extern struct omap_hwmod_class omap2xxx_wd_timer_hwmod_class;
|
||||
extern struct omap_hwmod_class omap2xxx_gpio_hwmod_class;
|
||||
extern struct omap_hwmod_class omap2xxx_dma_hwmod_class;
|
||||
extern struct omap_hwmod_class omap2xxx_mailbox_hwmod_class;
|
||||
extern struct omap_hwmod_class omap2xxx_mcspi_class;
|
||||
|
||||
|
Loading…
Reference in New Issue
Block a user