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i.MX arm64 device tree changes for 5.3:

Browse Source 
- Add i.MX8MQ based Librem5 devkit support.
  - Add SNVS power key support for i.MX8MQ and i.MX8MM.
  - Add GPIO alias for imx8mq and i.MX8QXP.
  - A series from Daniel Baluta to add SAI devices and enable audio
    support for imx8mm-evk board.
  - Add DDR performance monitor unit support for i.MX8QXP.
  - Add irqsteer interrupt controller device for i.MX8MQ SoC.
  - Add CPU speed grading and all OPPs for i.MX8MM and i.MX8MQ.
  - Add OCOTP device node for i.MX8QXP.
  - Various device addition for LS1028A: SATA, qDMA, USB, Mali DP500 and
    temperature sensor.
  - Random minor coding style improvements.
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iQEcBAABAgAGBQJdEcFcAAoJEFBXWFqHsHzOcNYIAICVsBiJX/gU0t+jT7i1KL83
 jDe/DDNg8j9PgR0ElLPejskJgnNYLS0DTWYCY/yPgzK8bwLuqxseVyjXBhyptZ1o
 Oecgp9c/79RGsJi9+tFlPKCB/jL4gvagbNn0kPAAoCv3dV5n5FikuSXfsN1v0DJi
 JpBXO0IHpkqRTJKk7Ran5MzxxaHbWkjMn0u80ewsAioZv/XhPg5xVSsONleQdh2V
 YtZkjcAuA7M9ZOLTKcEFmGyZW/ZTLcW7+xaj9ETJGtMJEi60igPyeFcmd1YIKfIh
 g1RwqgDilwEbh2rNulyZbRkRJKQDjTeHUNRqyGEM54lxAB52VQo5hHYa56K2m9Q=
 =SIR/
 -----END PGP SIGNATURE-----

Merge tag 'imx-dt64-5.3' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into arm/dt

i.MX arm64 device tree changes for 5.3:
 - Add i.MX8MQ based Librem5 devkit support.
 - Add SNVS power key support for i.MX8MQ and i.MX8MM.
 - Add GPIO alias for imx8mq and i.MX8QXP.
 - A series from Daniel Baluta to add SAI devices and enable audio
   support for imx8mm-evk board.
 - Add DDR performance monitor unit support for i.MX8QXP.
 - Add irqsteer interrupt controller device for i.MX8MQ SoC.
 - Add CPU speed grading and all OPPs for i.MX8MM and i.MX8MQ.
 - Add OCOTP device node for i.MX8QXP.
 - Various device addition for LS1028A: SATA, qDMA, USB, Mali DP500 and
   temperature sensor.
 - Random minor coding style improvements.

* tag 'imx-dt64-5.3' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux: (32 commits)
  arm64: dts: librem5: enable the SNVS power key
  arm64: dts: librem5: Limit the USB to 5V
  arm64: dts: imx8qxp: added ddr performance monitor nodes
  arm64: dts: imx8qxp: sort LSIO subsystem devices
  arm64: dts: imx8qxp: sort alias alphabetically
  arm64: dts: imx8qxp: Add lsio_mu13 node
  arm64: dts: imx8mm-evk: Enable audio codec wm8524
  arm64: dts: fsl: librem5: Add a device tree for the Librem5 devkit
  arm64: dts: fsl: ls1028a: Add qDMA node
  arm64: dts: imx8mm: Enable SNVS power key according to board design
  arm64: dts: imx8mq-evk: Enable SNVS power key
  arm64: dts: ls1028a: add crypto node
  arm64: dts: ls1028a: Add temperature sensor node
  arm64: dts: imx8mm: Move gic node into soc node
  arm64: dts: imx8mm: Move usbphy out of soc node
  arm64: dts: imx8mm: Pass the 'ranges' property
  arm64: dts: imx8mm: Pass a unit name for the 'soc' node
  arm64: dts: fsl: imx8mq: add the snvs power key node
  arm64: dts: ls1028a: fix watchdog device node
  arm64: dts: ls1028a: Enable sata.
  ...

Signed-off-by: Olof Johansson <olof@lixom.net>
This commit is contained in:
Olof Johansson 2019-06-25 04:52:55 -07:00
commit 37937ee73b
10 changed files with 1430 additions and 90 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

1
arch/arm64/boot/dts/freescale/Makefile
View File

@ -22,6 +22,7 @@ dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-lx2160a-rdb.dtb
dtb-$(CONFIG_ARCH_MXC) += imx8mm-evk.dtb
dtb-$(CONFIG_ARCH_MXC) += imx8mq-evk.dtb
dtb-$(CONFIG_ARCH_MXC) += imx8mq-librem5-devkit.dtb
dtb-$(CONFIG_ARCH_MXC) += imx8mq-zii-ultra-rmb3.dtb
dtb-$(CONFIG_ARCH_MXC) += imx8mq-zii-ultra-zest.dtb
dtb-$(CONFIG_ARCH_MXC) += imx8qxp-mek.dtb

20
arch/arm64/boot/dts/freescale/fsl-ls1028a-qds.dts
View File

@ -17,6 +17,7 @@
compatible = "fsl,ls1028a-qds", "fsl,ls1028a";
aliases {
crypto = &crypto;
gpio0 = &gpio1;
gpio1 = &gpio2;
gpio2 = &gpio3;
@ -47,6 +48,15 @@
regulator-always-on;
};
sb_3v3: regulator-sb3v3 {
compatible = "regulator-fixed";
regulator-name = "3v3_vbus";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-boot-on;
regulator-always-on;
};
sound {
compatible = "simple-audio-card";
simple-audio-card,format = "i2s";
@ -117,6 +127,12 @@
#size-cells = <0>;
reg = <0x3>;
temperature-sensor@4c {
compatible = "nxp,sa56004";
reg = <0x4c>;
vcc-supply = <&sb_3v3>;
};
rtc@51 {
compatible = "nxp,pcf2129";
reg = <0x51>;
@ -153,3 +169,7 @@
&sai1 {
status = "okay";
};
&sata {
status = "okay";
};

20
arch/arm64/boot/dts/freescale/fsl-ls1028a-rdb.dts
View File

@ -16,6 +16,7 @@
compatible = "fsl,ls1028a-rdb", "fsl,ls1028a";
aliases {
crypto = &crypto;
serial0 = &duart0;
serial1 = &duart1;
};
@ -43,6 +44,15 @@
regulator-always-on;
};
sb_3v3: regulator-sb3v3 {
compatible = "regulator-fixed";
regulator-name = "3v3_vbus";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-boot-on;
regulator-always-on;
};
sound {
compatible = "simple-audio-card";
simple-audio-card,format = "i2s";
@ -115,6 +125,12 @@
#size-cells = <0>;
reg = <0x3>;
temperature-sensor@4c {
compatible = "nxp,sa56004";
reg = <0x4c>;
vcc-supply = <&sb_3v3>;
};
rtc@51 {
compatible = "nxp,pcf2129";
reg = <0x51>;
@ -151,3 +167,7 @@
&sai4 {
status = "okay";
};
&sata {
status = "okay";
};

136
arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi
View File

@ -70,6 +70,27 @@
clock-output-names = "sysclk";
};
dpclk: clock-dp {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <27000000>;
clock-output-names= "dpclk";
};
aclk: clock-axi {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <650000000>;
clock-output-names= "aclk";
};
pclk: clock-apb {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <650000000>;
clock-output-names= "pclk";
};
reboot {
compatible ="syscon-reboot";
regmap = <&dcfg>;
@ -285,13 +306,24 @@
#interrupt-cells = <2>;
};
wdog0: watchdog@23c0000 {
compatible = "fsl,ls1028a-wdt", "fsl,imx21-wdt";
reg = <0x0 0x23c0000 0x0 0x10000>;
interrupts = <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clockgen 4 1>;
big-endian;
status = "disabled";
usb0: usb@3100000 {
compatible = "fsl,ls1028a-dwc3", "snps,dwc3";
reg = <0x0 0x3100000 0x0 0x10000>;
interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>;
dr_mode = "host";
snps,dis_rxdet_inp3_quirk;
snps,quirk-frame-length-adjustment = <0x20>;
snps,incr-burst-type-adjustment = <1>, <4>, <8>, <16>;
};
usb1: usb@3110000 {
compatible = "fsl,ls1028a-dwc3", "snps,dwc3";
reg = <0x0 0x3110000 0x0 0x10000>;
interrupts = <GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH>;
dr_mode = "host";
snps,dis_rxdet_inp3_quirk;
snps,quirk-frame-length-adjustment = <0x20>;
snps,incr-burst-type-adjustment = <1>, <4>, <8>, <16>;
};
sata: sata@3200000 {
@ -356,6 +388,79 @@
<GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH>;
};
crypto: crypto@8000000 {
compatible = "fsl,sec-v5.0", "fsl,sec-v4.0";
fsl,sec-era = <10>;
#address-cells = <1>;
#size-cells = <1>;
ranges = <0x0 0x00 0x8000000 0x100000>;
reg = <0x00 0x8000000 0x0 0x100000>;
interrupts = <GIC_SPI 139 IRQ_TYPE_LEVEL_HIGH>;
dma-coherent;
sec_jr0: jr@10000 {
compatible = "fsl,sec-v5.0-job-ring",
"fsl,sec-v4.0-job-ring";
reg = <0x10000 0x10000>;
interrupts = <GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>;
};
sec_jr1: jr@20000 {
compatible = "fsl,sec-v5.0-job-ring",
"fsl,sec-v4.0-job-ring";
reg = <0x20000 0x10000>;
interrupts = <GIC_SPI 141 IRQ_TYPE_LEVEL_HIGH>;
};
sec_jr2: jr@30000 {
compatible = "fsl,sec-v5.0-job-ring",
"fsl,sec-v4.0-job-ring";
reg = <0x30000 0x10000>;
interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>;
};
sec_jr3: jr@40000 {
compatible = "fsl,sec-v5.0-job-ring",
"fsl,sec-v4.0-job-ring";
reg = <0x40000 0x10000>;
interrupts = <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>;
};
};
qdma: dma-controller@8380000 {
compatible = "fsl,ls1028a-qdma", "fsl,ls1021a-qdma";
reg = <0x0 0x8380000 0x0 0x1000>, /* Controller regs */
<0x0 0x8390000 0x0 0x10000>, /* Status regs */
<0x0 0x83a0000 0x0 0x40000>; /* Block regs */
interrupts = <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 251 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 252 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 253 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 254 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "qdma-error", "qdma-queue0",
"qdma-queue1", "qdma-queue2", "qdma-queue3";
dma-channels = <8>;
block-number = <1>;
block-offset = <0x10000>;
fsl,dma-queues = <2>;
status-sizes = <64>;
queue-sizes = <64 64>;
};
cluster1_core0_watchdog: watchdog@c000000 {
compatible = "arm,sp805", "arm,primecell";
reg = <0x0 0xc000000 0x0 0x1000>;
clocks = <&clockgen 4 15>, <&clockgen 4 15>;
clock-names = "apb_pclk", "wdog_clk";
};
cluster1_core1_watchdog: watchdog@c010000 {
compatible = "arm,sp805", "arm,primecell";
reg = <0x0 0xc010000 0x0 0x1000>;
clocks = <&clockgen 4 15>, <&clockgen 4 15>;
clock-names = "apb_pclk", "wdog_clk";
};
sai1: audio-controller@f100000 {
#sound-dai-cells = <0>;
compatible = "fsl,vf610-sai";
@ -433,4 +538,21 @@
};
};
};
malidp0: display@f080000 {
compatible = "arm,mali-dp500";
reg = <0x0 0xf080000 0x0 0x10000>;
interrupts = <0 222 IRQ_TYPE_LEVEL_HIGH>,
<0 223 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "DE", "SE";
clocks = <&dpclk>, <&aclk>, <&aclk>, <&pclk>;
clock-names = "pxlclk", "mclk", "aclk", "pclk";
arm,malidp-output-port-lines = /bits/ 8 <8 8 8>;
port {
dp0_out: endpoint {
};
};
};
};

190
arch/arm64/boot/dts/freescale/imx8mm-evk.dts
View File

@ -37,6 +37,41 @@
gpio = <&gpio2 19 GPIO_ACTIVE_HIGH>;
enable-active-high;
};
wm8524: audio-codec {
#sound-dai-cells = <0>;
compatible = "wlf,wm8524";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_gpio_wlf>;
wlf,mute-gpios = <&gpio5 21 GPIO_ACTIVE_LOW>;
};
sound-wm8524 {
compatible = "simple-audio-card";
simple-audio-card,name = "wm8524-audio";
simple-audio-card,format = "i2s";
simple-audio-card,frame-master = <&cpudai>;
simple-audio-card,bitclock-master = <&cpudai>;
simple-audio-card,widgets =
"Line", "Left Line Out Jack",
"Line", "Right Line Out Jack";
simple-audio-card,routing =
"Left Line Out Jack", "LINEVOUTL",
"Right Line Out Jack", "LINEVOUTR";
cpudai: simple-audio-card,cpu {
sound-dai = <&sai3>;
};
simple-audio-card,codec {
sound-dai = <&wm8524>;
clocks = <&clk IMX8MM_CLK_SAI3_ROOT>;
};
};
};
&A53_0 {
cpu-supply = <&buck2_reg>;
};
&fec1 {
@ -61,6 +96,19 @@
};
};
&sai3 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_sai3>;
assigned-clocks = <&clk IMX8MM_CLK_SAI3>;
assigned-clock-parents = <&clk IMX8MM_AUDIO_PLL1_OUT>;
assigned-clock-rates = <24576000>;
status = "okay";
};
&snvs_pwrkey {
status = "okay";
};
&uart2 { /* console */
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart2>;
@ -95,6 +143,120 @@
status = "okay";
};
&i2c1 {
clock-frequency = <400000>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2c1>;
status = "okay";
pmic@4b {
compatible = "rohm,bd71847";
reg = <0x4b>;
pinctrl-0 = <&pinctrl_pmic>;
interrupt-parent = <&gpio1>;
interrupts = <3 GPIO_ACTIVE_LOW>;
rohm,reset-snvs-powered;
regulators {
buck1_reg: BUCK1 {
regulator-name = "BUCK1";
regulator-min-microvolt = <700000>;
regulator-max-microvolt = <1300000>;
regulator-boot-on;
regulator-always-on;
regulator-ramp-delay = <1250>;
};
buck2_reg: BUCK2 {
regulator-name = "BUCK2";
regulator-min-microvolt = <700000>;
regulator-max-microvolt = <1300000>;
regulator-boot-on;
regulator-always-on;
regulator-ramp-delay = <1250>;
rohm,dvs-run-voltage = <1000000>;
rohm,dvs-idle-voltage = <900000>;
};
buck3_reg: BUCK3 {
// BUCK5 in datasheet
regulator-name = "BUCK3";
regulator-min-microvolt = <700000>;
regulator-max-microvolt = <1350000>;
regulator-boot-on;
regulator-always-on;
};
buck4_reg: BUCK4 {
// BUCK6 in datasheet
regulator-name = "BUCK4";
regulator-min-microvolt = <3000000>;
regulator-max-microvolt = <3300000>;
regulator-boot-on;
regulator-always-on;
};
buck5_reg: BUCK5 {
// BUCK7 in datasheet
regulator-name = "BUCK5";
regulator-min-microvolt = <1605000>;
regulator-max-microvolt = <1995000>;
regulator-boot-on;
regulator-always-on;
};
buck6_reg: BUCK6 {
// BUCK8 in datasheet
regulator-name = "BUCK6";
regulator-min-microvolt = <800000>;
regulator-max-microvolt = <1400000>;
regulator-boot-on;
regulator-always-on;
};
ldo1_reg: LDO1 {
regulator-name = "LDO1";
regulator-min-microvolt = <3000000>;
regulator-max-microvolt = <3300000>;
regulator-boot-on;
regulator-always-on;
};
ldo2_reg: LDO2 {
regulator-name = "LDO2";
regulator-min-microvolt = <900000>;
regulator-max-microvolt = <900000>;
regulator-boot-on;
regulator-always-on;
};
ldo3_reg: LDO3 {
regulator-name = "LDO3";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <3300000>;
regulator-boot-on;
regulator-always-on;
};
ldo4_reg: LDO4 {
regulator-name = "LDO4";
regulator-min-microvolt = <900000>;
regulator-max-microvolt = <1800000>;
regulator-boot-on;
regulator-always-on;
};
ldo6_reg: LDO6 {
regulator-name = "LDO6";
regulator-min-microvolt = <900000>;
regulator-max-microvolt = <1800000>;
regulator-boot-on;
regulator-always-on;
};
};
};
};
&iomuxc {
pinctrl-names = "default";
@ -124,12 +286,40 @@
>;
};
pinctrl_gpio_wlf: gpiowlfgrp {
fsl,pins = <
MX8MM_IOMUXC_I2C4_SDA_GPIO5_IO21 0xd6
>;
};
pinctrl_i2c1: i2c1grp {
fsl,pins = <
MX8MM_IOMUXC_I2C1_SCL_I2C1_SCL 0x400001c3
MX8MM_IOMUXC_I2C1_SDA_I2C1_SDA 0x400001c3
>;
};
pinctrl_pmic: pmicirq {
fsl,pins = <
MX8MM_IOMUXC_GPIO1_IO03_GPIO1_IO3 0x41
>;
};
pinctrl_reg_usdhc2_vmmc: regusdhc2vmmc {
fsl,pins = <
MX8MM_IOMUXC_SD2_RESET_B_GPIO2_IO19 0x41
>;
};
pinctrl_sai3: sai3grp {
fsl,pins = <
MX8MM_IOMUXC_SAI3_TXFS_SAI3_TX_SYNC 0xd6
MX8MM_IOMUXC_SAI3_TXC_SAI3_TX_BCLK 0xd6
MX8MM_IOMUXC_SAI3_MCLK_SAI3_MCLK 0xd6
MX8MM_IOMUXC_SAI3_TXD_SAI3_TX_DATA0 0xd6
>;
};
pinctrl_uart2: uart2grp {
fsl,pins = <
MX8MM_IOMUXC_UART2_RXD_UART2_DCE_RX 0x140

144
arch/arm64/boot/dts/freescale/imx8mm.dtsi
View File

@ -53,6 +53,8 @@
enable-method = "psci";
next-level-cache = <&A53_L2>;
operating-points-v2 = <&a53_opp_table>;
nvmem-cells = <&cpu_speed_grade>;
nvmem-cell-names = "speed_grade";
};
A53_1: cpu@1 {
@ -100,14 +102,23 @@
opp-1200000000 {
opp-hz = /bits/ 64 <1200000000>;
opp-microvolt = <850000>;
opp-supported-hw = <0xe>, <0x7>;
clock-latency-ns = <150000>;
};
opp-1600000000 {
opp-hz = /bits/ 64 <1600000000>;
opp-microvolt = <900000>;
opp-supported-hw = <0xc>, <0x7>;
clock-latency-ns = <150000>;
};
opp-1800000000 {
opp-hz = /bits/ 64 <1800000000>;
opp-microvolt = <1000000>;
/* Consumer only but rely on speed grading */
opp-supported-hw = <0x8>, <0x7>;
clock-latency-ns = <150000>;
opp-suspend;
};
};
@ -158,15 +169,6 @@
clock-output-names = "clk_ext4";
};
gic: interrupt-controller@38800000 {
compatible = "arm,gic-v3";
reg = <0x0 0x38800000 0 0x10000>, /* GIC Dist */
<0x0 0x38880000 0 0xC0000>; /* GICR (RD_base + SGI_base) */
#interrupt-cells = <3>;
interrupt-controller;
interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH>;
};
psci {
compatible = "arm,psci-1.0";
method = "smc";
@ -189,7 +191,23 @@
arm,no-tick-in-suspend;
};
soc {
usbphynop1: usbphynop1 {
compatible = "usb-nop-xceiv";
clocks = <&clk IMX8MM_CLK_USB_PHY_REF>;
assigned-clocks = <&clk IMX8MM_CLK_USB_PHY_REF>;
assigned-clock-parents = <&clk IMX8MM_SYS_PLL1_100M>;
clock-names = "main_clk";
};
usbphynop2: usbphynop2 {
compatible = "usb-nop-xceiv";
clocks = <&clk IMX8MM_CLK_USB_PHY_REF>;
assigned-clocks = <&clk IMX8MM_CLK_USB_PHY_REF>;
assigned-clock-parents = <&clk IMX8MM_SYS_PLL1_100M>;
clock-names = "main_clk";
};
soc@0 {
compatible = "simple-bus";
#address-cells = <1>;
#size-cells = <1>;
@ -199,7 +217,73 @@
compatible = "fsl,aips-bus", "simple-bus";
#address-cells = <1>;
#size-cells = <1>;
ranges;
ranges = <0x30000000 0x30000000 0x400000>;
sai1: sai@30010000 {
compatible = "fsl,imx8mm-sai", "fsl,imx8mq-sai";
reg = <0x30010000 0x10000>;
interrupts = <GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clk IMX8MM_CLK_SAI1_IPG>,
<&clk IMX8MM_CLK_SAI1_ROOT>,
<&clk IMX8MM_CLK_DUMMY>, <&clk IMX8MM_CLK_DUMMY>;
clock-names = "bus", "mclk1", "mclk2", "mclk3";
dmas = <&sdma2 0 2 0>, <&sdma2 1 2 0>;
dma-names = "rx", "tx";
status = "disabled";
};
sai2: sai@30020000 {
compatible = "fsl,imx8mm-sai", "fsl,imx8mq-sai";
reg = <0x30020000 0x10000>;
interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clk IMX8MM_CLK_SAI2_IPG>,
<&clk IMX8MM_CLK_SAI2_ROOT>,
<&clk IMX8MM_CLK_DUMMY>, <&clk IMX8MM_CLK_DUMMY>;
clock-names = "bus", "mclk1", "mclk2", "mclk3";
dmas = <&sdma2 2 2 0>, <&sdma2 3 2 0>;
dma-names = "rx", "tx";
status = "disabled";
};
sai3: sai@30030000 {
#sound-dai-cells = <0>;
compatible = "fsl,imx8mm-sai", "fsl,imx8mq-sai";
reg = <0x30030000 0x10000>;
interrupts = <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clk IMX8MM_CLK_SAI3_IPG>,
<&clk IMX8MM_CLK_SAI3_ROOT>,
<&clk IMX8MM_CLK_DUMMY>, <&clk IMX8MM_CLK_DUMMY>;
clock-names = "bus", "mclk1", "mclk2", "mclk3";
dmas = <&sdma2 4 2 0>, <&sdma2 5 2 0>;
dma-names = "rx", "tx";
status = "disabled";
};
sai5: sai@30050000 {
compatible = "fsl,imx8mm-sai", "fsl,imx8mq-sai";
reg = <0x30050000 0x10000>;
interrupts = <GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clk IMX8MM_CLK_SAI5_IPG>,
<&clk IMX8MM_CLK_SAI5_ROOT>,
<&clk IMX8MM_CLK_DUMMY>, <&clk IMX8MM_CLK_DUMMY>;
clock-names = "bus", "mclk1", "mclk2", "mclk3";
dmas = <&sdma2 8 2 0>, <&sdma2 9 2 0>;
dma-names = "rx", "tx";
status = "disabled";
};
sai6: sai@30060000 {
compatible = "fsl,imx8mm-sai", "fsl,imx8mq-sai";
reg = <0x30060000 0x10000>;
interrupts = <GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clk IMX8MM_CLK_SAI6_IPG>,
<&clk IMX8MM_CLK_SAI6_ROOT>,
<&clk IMX8MM_CLK_DUMMY>, <&clk IMX8MM_CLK_DUMMY>;
clock-names = "bus", "mclk1", "mclk2", "mclk3";
dmas = <&sdma2 10 2 0>, <&sdma2 11 2 0>;
dma-names = "rx", "tx";
status = "disabled";
};
gpio1: gpio@30200000 {
compatible = "fsl,imx8mm-gpio", "fsl,imx35-gpio";
@ -324,6 +408,10 @@
/* For nvmem subnodes */
#address-cells = <1>;
#size-cells = <1>;
cpu_speed_grade: speed-grade@10 {
reg = <0x10 4>;
};
};
anatop: anatop@30360000 {
@ -351,6 +439,7 @@
interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
linux,keycode = <KEY_POWER>;
wakeup-source;
status = "disabled";
};
};
@ -376,7 +465,7 @@
compatible = "fsl,aips-bus", "simple-bus";
#address-cells = <1>;
#size-cells = <1>;
ranges;
ranges = <0x30400000 0x30400000 0x400000>;
pwm1: pwm@30660000 {
compatible = "fsl,imx8mm-pwm", "fsl,imx27-pwm";
@ -427,7 +516,7 @@
compatible = "fsl,aips-bus", "simple-bus";
#address-cells = <1>;
#size-cells = <1>;
ranges;
ranges = <0x30800000 0x30800000 0x400000>;
ecspi1: spi@30820000 {
compatible = "fsl,imx8mm-ecspi", "fsl,imx51-ecspi";
@ -646,7 +735,7 @@
compatible = "fsl,aips-bus", "simple-bus";
#address-cells = <1>;
#size-cells = <1>;
ranges;
ranges = <0x32c00000 0x32c00000 0x400000>;
usbotg1: usb@32e40000 {
compatible = "fsl,imx8mm-usb", "fsl,imx7d-usb";
@ -663,14 +752,6 @@
status = "disabled";
};
usbphynop1: usbphynop1 {
compatible = "usb-nop-xceiv";
clocks = <&clk IMX8MM_CLK_USB_PHY_REF>;
assigned-clocks = <&clk IMX8MM_CLK_USB_PHY_REF>;
assigned-clock-parents = <&clk IMX8MM_SYS_PLL1_100M>;
clock-names = "main_clk";
};
usbmisc1: usbmisc@32e40200 {
compatible = "fsl,imx8mm-usbmisc", "fsl,imx7d-usbmisc";
#index-cells = <1>;
@ -692,14 +773,6 @@
status = "disabled";
};
usbphynop2: usbphynop2 {
compatible = "usb-nop-xceiv";
clocks = <&clk IMX8MM_CLK_USB_PHY_REF>;
assigned-clocks = <&clk IMX8MM_CLK_USB_PHY_REF>;
assigned-clock-parents = <&clk IMX8MM_SYS_PLL1_100M>;
clock-names = "main_clk";
};
usbmisc2: usbmisc@32e50200 {
compatible = "fsl,imx8mm-usbmisc", "fsl,imx7d-usbmisc";
#index-cells = <1>;
@ -736,5 +809,14 @@
dma-names = "rx-tx";
status = "disabled";
};
gic: interrupt-controller@38800000 {
compatible = "arm,gic-v3";
reg = <0x38800000 0x10000>, /* GIC Dist */
<0x38880000 0xc0000>; /* GICR (RD_base + SGI_base) */
#interrupt-cells = <3>;
interrupt-controller;
interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH>;
};
};
};

4
arch/arm64/boot/dts/freescale/imx8mq-evk.dts
View File

@ -242,6 +242,10 @@
power-supply = <&sw1a_reg>;
};
&snvs_pwrkey {
status = "okay";
};
&uart1 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart1>;

809
arch/arm64/boot/dts/freescale/imx8mq-librem5-devkit.dts Normal file
View File

@ -0,0 +1,809 @@
// SPDX-License-Identifier: GPL-2.0+
/*
* Copyright 2018-2019 Purism SPC
*/
/dts-v1/;
#include "dt-bindings/input/input.h"
#include "dt-bindings/pwm/pwm.h"
#include "dt-bindings/usb/pd.h"
#include "imx8mq.dtsi"
/ {
model = "Purism Librem 5 devkit";
compatible = "purism,librem5-devkit", "fsl,imx8mq";
backlight_dsi: backlight-dsi {
compatible = "pwm-backlight";
/* 200 Hz for the PAM2841 */
pwms = <&pwm1 0 5000000>;
brightness-levels = <0 100>;
num-interpolated-steps = <100>;
/* Default brightness level (index into the array defined by */
/* the "brightness-levels" property) */
default-brightness-level = <0>;
power-supply = <&reg_22v4_p>;
};
chosen {
stdout-path = &uart1;
};
gpio-keys {
compatible = "gpio-keys";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_gpio_keys>;
btn1 {
label = "VOL_UP";
gpios = <&gpio4 21 GPIO_ACTIVE_LOW>;
wakeup-source;
linux,code = <KEY_VOLUMEUP>;
};
btn2 {
label = "VOL_DOWN";
gpios = <&gpio4 22 GPIO_ACTIVE_LOW>;
wakeup-source;
linux,code = <KEY_VOLUMEDOWN>;
};
hp-det {
label = "HP_DET";
gpios = <&gpio3 20 GPIO_ACTIVE_LOW>;
wakeup-source;
linux,code = <KEY_HP>;
};
};
leds {
compatible = "gpio-leds";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_gpio_leds>;
led1 {
label = "LED 1";
gpios = <&gpio1 13 GPIO_ACTIVE_HIGH>;
default-state = "off";
};
};
pmic_osc: clock-pmic {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <32768>;
clock-output-names = "pmic_osc";
};
reg_1v8_p: regulator-1v8-p {
compatible = "regulator-fixed";
regulator-name = "1v8_p";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
vin-supply = <&reg_pwr_en>;
};
reg_2v8_p: regulator-2v8-p {
compatible = "regulator-fixed";
regulator-name = "2v8_p";
regulator-min-microvolt = <2800000>;
regulator-max-microvolt = <2800000>;
vin-supply = <&reg_pwr_en>;
};
reg_3v3_p: regulator-3v3-p {
compatible = "regulator-fixed";
regulator-name = "3v3_p";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
vin-supply = <&reg_pwr_en>;
regulator-state-mem {
regulator-on-in-suspend;
};
};
reg_5v_p: regulator-5v-p {
compatible = "regulator-fixed";
regulator-name = "5v_p";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
vin-supply = <&reg_pwr_en>;
regulator-state-mem {
regulator-on-in-suspend;
};
};
reg_22v4_p: regulator-22v4-p {
compatible = "regulator-fixed";
regulator-name = "22v4_P";
regulator-min-microvolt = <22400000>;
regulator-max-microvolt = <22400000>;
vin-supply = <&reg_pwr_en>;
};
reg_pwr_en: regulator-pwr-en {
compatible = "regulator-fixed";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_pwr_en>;
regulator-name = "PWR_EN";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
gpio = <&gpio1 8 GPIO_ACTIVE_HIGH>;
enable-active-high;
regulator-always-on;
};
reg_usdhc2_vmmc: regulator-usdhc2-vmmc {
compatible = "regulator-fixed";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usdhc2_pwr>;
regulator-name = "VSD_3V3";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
gpio = <&gpio2 19 GPIO_ACTIVE_HIGH>;
enable-active-high;
regulator-always-on;
};
vibrator {
compatible = "gpio-vibrator";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_haptic>;
enable-gpios = <&gpio5 4 GPIO_ACTIVE_LOW>;
vcc-supply = <&reg_3v3_p>;
};
wifi_pwr_en: regulator-wifi-en {
compatible = "regulator-fixed";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_wifi_pwr_en>;
regulator-name = "WIFI_EN";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
gpio = <&gpio3 5 GPIO_ACTIVE_HIGH>;
enable-active-high;
regulator-always-on;
};
};
&clk {
assigned-clocks = <&clk IMX8MQ_AUDIO_PLL1>, <&clk IMX8MQ_AUDIO_PLL2>;
assigned-clock-rates = <786432000>, <722534400>;
};
&fec1 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_fec1>;
phy-mode = "rgmii-id";
phy-handle = <&ethphy0>;
fsl,magic-packet;
phy-supply = <&reg_3v3_p>;
status = "okay";
mdio {
#address-cells = <1>;
#size-cells = <0>;
ethphy0: ethernet-phy@1 {
compatible = "ethernet-phy-ieee802.3-c22";
reg = <1>;
};
};
};
&i2c1 {
clock-frequency = <100000>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2c1>;
status = "okay";
pmic: pmic@4b {
compatible = "rohm,bd71837";
reg = <0x4b>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_pmic>;
clocks = <&pmic_osc>;
clock-names = "osc";
clock-output-names = "pmic_clk";
interrupt-parent = <&gpio1>;
interrupts = <3 GPIO_ACTIVE_LOW>;
interrupt-names = "irq";
rohm,reset-snvs-powered;
regulators {
buck1_reg: BUCK1 {
regulator-name = "buck1";
regulator-min-microvolt = <700000>;
regulator-max-microvolt = <1300000>;
regulator-boot-on;
regulator-ramp-delay = <1250>;
rohm,dvs-run-voltage = <900000>;
rohm,dvs-idle-voltage = <850000>;
rohm,dvs-suspend-voltage = <800000>;
};
buck2_reg: BUCK2 {
regulator-name = "buck2";
regulator-min-microvolt = <700000>;
regulator-max-microvolt = <1300000>;
regulator-boot-on;
regulator-ramp-delay = <1250>;
rohm,dvs-run-voltage = <1000000>;
rohm,dvs-idle-voltage = <900000>;
};
buck3_reg: BUCK3 {
regulator-name = "buck3";
regulator-min-microvolt = <700000>;
regulator-max-microvolt = <1300000>;
regulator-boot-on;
rohm,dvs-run-voltage = <1000000>;
};
buck4_reg: BUCK4 {
regulator-name = "buck4";
regulator-min-microvolt = <700000>;
regulator-max-microvolt = <1300000>;
rohm,dvs-run-voltage = <1000000>;
};
buck5_reg: BUCK5 {
regulator-name = "buck5";
regulator-min-microvolt = <700000>;
regulator-max-microvolt = <1350000>;
regulator-boot-on;
};
buck6_reg: BUCK6 {
regulator-name = "buck6";
regulator-min-microvolt = <3000000>;
regulator-max-microvolt = <3300000>;
regulator-boot-on;
};
buck7_reg: BUCK7 {
regulator-name = "buck7";
regulator-min-microvolt = <1605000>;
regulator-max-microvolt = <1995000>;
regulator-boot-on;
};
buck8_reg: BUCK8 {
regulator-name = "buck8";
regulator-min-microvolt = <800000>;
regulator-max-microvolt = <1400000>;
regulator-boot-on;
};
ldo1_reg: LDO1 {
regulator-name = "ldo1";
regulator-min-microvolt = <3000000>;
regulator-max-microvolt = <3300000>;
regulator-boot-on;
/* leave on for snvs power button */
regulator-always-on;
};
ldo2_reg: LDO2 {
regulator-name = "ldo2";
regulator-min-microvolt = <900000>;
regulator-max-microvolt = <900000>;
regulator-boot-on;
/* leave on for snvs power button */
regulator-always-on;
};
ldo3_reg: LDO3 {
regulator-name = "ldo3";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <3300000>;
regulator-boot-on;
};
ldo4_reg: LDO4 {
regulator-name = "ldo4";
regulator-min-microvolt = <900000>;
regulator-max-microvolt = <1800000>;
regulator-boot-on;
};
ldo5_reg: LDO5 {
regulator-name = "ldo5";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <3300000>;
};
ldo6_reg: LDO6 {
regulator-name = "ldo6";
regulator-min-microvolt = <900000>;
regulator-max-microvolt = <1800000>;
regulator-boot-on;
};
ldo7_reg: LDO7 {
regulator-name = "ldo7";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <3300000>;
regulator-boot-on;
};
};
};
typec_ptn5100: usb_typec@52 {
compatible = "nxp,ptn5110";
reg = <0x52>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_typec>;
interrupt-parent = <&gpio3>;
interrupts = <1 IRQ_TYPE_LEVEL_LOW>;
connector {
compatible = "usb-c-connector";
label = "USB-C";
data-role = "dual";
power-role = "dual";
try-power-role = "sink";
source-pdos = <PDO_FIXED(5000, 2000,
PDO_FIXED_USB_COMM |
PDO_FIXED_DUAL_ROLE |
PDO_FIXED_DATA_SWAP )>;
sink-pdos = <PDO_FIXED(5000, 2000, PDO_FIXED_USB_COMM |
PDO_FIXED_DUAL_ROLE |
PDO_FIXED_DATA_SWAP )
PDO_VAR(5000, 3000, 3000)>;
op-sink-microwatt = <10000000>;
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
usb_con_hs: endpoint {
remote-endpoint = <&typec_hs>;
};
};
port@1 {
reg = <1>;
usb_con_ss: endpoint {
remote-endpoint = <&typec_ss>;
};
};
};
};
};
rtc@68 {
compatible = "microcrystal,rv4162";
reg = <0x68>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_rtc>;
interrupt-parent = <&gpio4>;
interrupts = <29 IRQ_TYPE_LEVEL_LOW>;
};
charger@6b { /* bq25896 */
compatible = "ti,bq25890";
reg = <0x6b>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_charger>;
interrupt-parent = <&gpio3>;
interrupts = <25 IRQ_TYPE_EDGE_FALLING>;
ti,battery-regulation-voltage = <4192000>; /* 4.192V */
ti,charge-current = <1600000>; /* 1.6A */
ti,termination-current = <66000>; /* 66mA */
ti,precharge-current = <130000>; /* 130mA */
ti,minimum-sys-voltage = <3000000>; /* 3V */
ti,boost-voltage = <5000000>; /* 5V */
ti,boost-max-current = <50000>; /* 50mA */
};
};
&i2c3 {
clock-frequency = <100000>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2c3>;
status = "okay";
magnetometer@1e {
compatible = "st,lsm9ds1-magn";
reg = <0x1e>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_imu>;
interrupt-parent = <&gpio3>;
interrupts = <19 IRQ_TYPE_LEVEL_LOW>;
vdd-supply = <&reg_3v3_p>;
vddio-supply = <&reg_3v3_p>;
};
touchscreen@5d {
compatible = "goodix,gt5688";
reg = <0x5d>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_ts>;
interrupt-parent = <&gpio3>;
interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
reset-gpios = <&gpio1 5 GPIO_ACTIVE_HIGH>;
irq-gpios = <&gpio3 0 GPIO_ACTIVE_HIGH>;
touchscreen-size-x = <720>;
touchscreen-size-y = <1440>;
AVDD28-supply = <&reg_2v8_p>;
VDDIO-supply = <&reg_1v8_p>;
};
};
&iomuxc {
pinctrl_bl: blgrp {
fsl,pins = <
MX8MQ_IOMUXC_GPIO1_IO01_PWM1_OUT 0x6 /* DSI_BL_PWM */
>;
};
pinctrl_bt: btgrp {
fsl,pins = <
MX8MQ_IOMUXC_NAND_DATA05_GPIO3_IO11 0x16 /* nBT_DISABLE */
MX8MQ_IOMUXC_NAND_DATA01_GPIO3_IO7 0x10 /* BT_HOST_WAKE */
>;
};
pinctrl_charger: chargergrp {
fsl,pins = <
MX8MQ_IOMUXC_SAI5_MCLK_GPIO3_IO25 0x80 /* CHRG_nINT */
>;
};
pinctrl_fec1: fec1grp {
fsl,pins = <
MX8MQ_IOMUXC_ENET_MDC_ENET1_MDC 0x3
MX8MQ_IOMUXC_ENET_MDIO_ENET1_MDIO 0x3
MX8MQ_IOMUXC_ENET_TD3_ENET1_RGMII_TD3 0x1f
MX8MQ_IOMUXC_ENET_TD2_ENET1_RGMII_TD2 0x1f
MX8MQ_IOMUXC_ENET_TD1_ENET1_RGMII_TD1 0x1f
MX8MQ_IOMUXC_ENET_TD0_ENET1_RGMII_TD0 0x1f
MX8MQ_IOMUXC_ENET_RD3_ENET1_RGMII_RD3 0x91
MX8MQ_IOMUXC_ENET_RD2_ENET1_RGMII_RD2 0x91
MX8MQ_IOMUXC_ENET_RD1_ENET1_RGMII_RD1 0x91
MX8MQ_IOMUXC_ENET_RD0_ENET1_RGMII_RD0 0x91
MX8MQ_IOMUXC_ENET_TXC_ENET1_RGMII_TXC 0x1f
MX8MQ_IOMUXC_ENET_RXC_ENET1_RGMII_RXC 0x91
MX8MQ_IOMUXC_ENET_RX_CTL_ENET1_RGMII_RX_CTL 0x91
MX8MQ_IOMUXC_ENET_TX_CTL_ENET1_RGMII_TX_CTL 0x1f
MX8MQ_IOMUXC_GPIO1_IO09_GPIO1_IO9 0x19
MX8MQ_IOMUXC_GPIO1_IO15_CCMSRCGPCMIX_CLKO2 0x1f
>;
};
pinctrl_ts: tsgrp {
fsl,pins = <
MX8MQ_IOMUXC_NAND_ALE_GPIO3_IO0 0x16 /* TOUCH INT */
MX8MQ_IOMUXC_GPIO1_IO05_GPIO1_IO5 0x19 /* TOUCH RST */
>;
};
pinctrl_gpio_leds: gpioledgrp {
fsl,pins = <
MX8MQ_IOMUXC_GPIO1_IO13_GPIO1_IO13 0x16
>;
};
pinctrl_gpio_keys: gpiokeygrp {
fsl,pins = <
MX8MQ_IOMUXC_SAI2_RXFS_GPIO4_IO21 0x16
MX8MQ_IOMUXC_SAI2_RXC_GPIO4_IO22 0x16
MX8MQ_IOMUXC_SAI5_RXC_GPIO3_IO20 0x180 /* HP_DET */
>;
};
pinctrl_haptic: hapticgrp {
fsl,pins = <
MX8MQ_IOMUXC_SPDIF_RX_GPIO5_IO4 0xc6 /* nHAPTIC */
>;
};
pinctrl_i2c1: i2c1grp {
fsl,pins = <
MX8MQ_IOMUXC_I2C1_SCL_I2C1_SCL 0x4000001f
MX8MQ_IOMUXC_I2C1_SDA_I2C1_SDA 0x4000001f
>;
};
pinctrl_i2c3: i2c3grp {
fsl,pins = <
MX8MQ_IOMUXC_I2C3_SCL_I2C3_SCL 0x4000001f
MX8MQ_IOMUXC_I2C3_SDA_I2C3_SDA 0x4000001f
>;
};
pinctrl_imu: imugrp {
fsl,pins = <
MX8MQ_IOMUXC_SAI5_RXFS_GPIO3_IO19 0x8 /* IMU_INT */
>;
};
pinctrl_pmic: pmicgrp {
fsl,pins = <
MX8MQ_IOMUXC_GPIO1_IO03_GPIO1_IO3 0x80 /* PMIC intr */
>;
};
pinctrl_pwr_en: pwrengrp {
fsl,pins = <
MX8MQ_IOMUXC_GPIO1_IO08_GPIO1_IO8 0x06
>;
};
pinctrl_rtc: rtcgrp {
fsl,pins = <
MX8MQ_IOMUXC_SAI3_RXC_GPIO4_IO29 0x80 /* RTC intr */
>;
};
pinctrl_typec: typecgrp {
fsl,pins = <
MX8MQ_IOMUXC_NAND_DATA06_GPIO3_IO12 0x16
MX8MQ_IOMUXC_NAND_CE0_B_GPIO3_IO1 0x80
>;
};
pinctrl_uart1: uart1grp {
fsl,pins = <
MX8MQ_IOMUXC_UART1_RXD_UART1_DCE_RX 0x49
MX8MQ_IOMUXC_UART1_TXD_UART1_DCE_TX 0x49
>;
};
pinctrl_uart2: uart2grp {
fsl,pins = <
MX8MQ_IOMUXC_UART2_TXD_UART2_DCE_TX 0x49
MX8MQ_IOMUXC_UART2_RXD_UART2_DCE_RX 0x49
MX8MQ_IOMUXC_UART4_RXD_UART2_DCE_CTS_B 0x49
MX8MQ_IOMUXC_UART4_TXD_UART2_DCE_RTS_B 0x49
>;
};
pinctrl_uart3: uart3grp {
fsl,pins = <
MX8MQ_IOMUXC_UART3_RXD_UART3_DCE_RX 0x49
MX8MQ_IOMUXC_UART3_TXD_UART3_DCE_TX 0x49
>;
};
pinctrl_uart4: uart4grp {
fsl,pins = <
MX8MQ_IOMUXC_ECSPI2_SCLK_UART4_DCE_RX 0x49
MX8MQ_IOMUXC_ECSPI2_MOSI_UART4_DCE_TX 0x49
MX8MQ_IOMUXC_ECSPI2_MISO_UART4_DCE_CTS_B 0x49
MX8MQ_IOMUXC_ECSPI2_SS0_UART4_DCE_RTS_B 0x49
MX8MQ_IOMUXC_GPIO1_IO00_ANAMIX_REF_CLK_32K 0x49
>;
};
pinctrl_usdhc1: usdhc1grp {
fsl,pins = <
MX8MQ_IOMUXC_SD1_CLK_USDHC1_CLK 0x83
MX8MQ_IOMUXC_SD1_CMD_USDHC1_CMD 0xc3
MX8MQ_IOMUXC_SD1_DATA0_USDHC1_DATA0 0xc3
MX8MQ_IOMUXC_SD1_DATA1_USDHC1_DATA1 0xc3
MX8MQ_IOMUXC_SD1_DATA2_USDHC1_DATA2 0xc3
MX8MQ_IOMUXC_SD1_DATA3_USDHC1_DATA3 0xc3
MX8MQ_IOMUXC_SD1_DATA4_USDHC1_DATA4 0xc3
MX8MQ_IOMUXC_SD1_DATA5_USDHC1_DATA5 0xc3
MX8MQ_IOMUXC_SD1_DATA6_USDHC1_DATA6 0xc3
MX8MQ_IOMUXC_SD1_DATA7_USDHC1_DATA7 0xc3
MX8MQ_IOMUXC_SD1_STROBE_USDHC1_STROBE 0x83
MX8MQ_IOMUXC_SD1_RESET_B_USDHC1_RESET_B 0xc1
>;
};
pinctrl_usdhc1_100mhz: usdhc1grp100mhz {
fsl,pins = <
MX8MQ_IOMUXC_SD1_CLK_USDHC1_CLK 0x8d
MX8MQ_IOMUXC_SD1_CMD_USDHC1_CMD 0xcd
MX8MQ_IOMUXC_SD1_DATA0_USDHC1_DATA0 0xcd
MX8MQ_IOMUXC_SD1_DATA1_USDHC1_DATA1 0xcd
MX8MQ_IOMUXC_SD1_DATA2_USDHC1_DATA2 0xcd
MX8MQ_IOMUXC_SD1_DATA3_USDHC1_DATA3 0xcd
MX8MQ_IOMUXC_SD1_DATA4_USDHC1_DATA4 0xcd
MX8MQ_IOMUXC_SD1_DATA5_USDHC1_DATA5 0xcd
MX8MQ_IOMUXC_SD1_DATA6_USDHC1_DATA6 0xcd
MX8MQ_IOMUXC_SD1_DATA7_USDHC1_DATA7 0xcd
MX8MQ_IOMUXC_SD1_STROBE_USDHC1_STROBE 0x8d
MX8MQ_IOMUXC_SD1_RESET_B_USDHC1_RESET_B 0xc1
>;
};
pinctrl_usdhc1_200mhz: usdhc1grp200mhz {
fsl,pins = <
MX8MQ_IOMUXC_SD1_CLK_USDHC1_CLK 0x9f
MX8MQ_IOMUXC_SD1_CMD_USDHC1_CMD 0xdf
MX8MQ_IOMUXC_SD1_DATA0_USDHC1_DATA0 0xdf
MX8MQ_IOMUXC_SD1_DATA1_USDHC1_DATA1 0xdf
MX8MQ_IOMUXC_SD1_DATA2_USDHC1_DATA2 0xdf
MX8MQ_IOMUXC_SD1_DATA3_USDHC1_DATA3 0xdf
MX8MQ_IOMUXC_SD1_DATA4_USDHC1_DATA4 0xdf
MX8MQ_IOMUXC_SD1_DATA5_USDHC1_DATA5 0xdf
MX8MQ_IOMUXC_SD1_DATA6_USDHC1_DATA6 0xdf
MX8MQ_IOMUXC_SD1_DATA7_USDHC1_DATA7 0xdf
MX8MQ_IOMUXC_SD1_STROBE_USDHC1_STROBE 0x9f
MX8MQ_IOMUXC_SD1_RESET_B_USDHC1_RESET_B 0xc1
>;
};
pinctrl_usdhc2_pwr: usdhc2grppwr {
fsl,pins = <
MX8MQ_IOMUXC_SD2_RESET_B_GPIO2_IO19 0x41
>;
};
pinctrl_usdhc2_gpio: usdhc2grpgpio {
fsl,pins = <
MX8MQ_IOMUXC_SD2_WP_GPIO2_IO20 0x80 /* WIFI_WAKE */
>;
};
pinctrl_usdhc2: usdhc2grp {
fsl,pins = <
MX8MQ_IOMUXC_SD2_CLK_USDHC2_CLK 0x83
MX8MQ_IOMUXC_SD2_CMD_USDHC2_CMD 0xc3
MX8MQ_IOMUXC_SD2_DATA0_USDHC2_DATA0 0xc3
MX8MQ_IOMUXC_SD2_DATA1_USDHC2_DATA1 0xc3
MX8MQ_IOMUXC_SD2_DATA2_USDHC2_DATA2 0xc3
MX8MQ_IOMUXC_SD2_DATA3_USDHC2_DATA3 0xc3
>;
};
pinctrl_usdhc2_100mhz: usdhc2grp100mhz {
fsl,pins = <
MX8MQ_IOMUXC_SD2_CLK_USDHC2_CLK 0x8d
MX8MQ_IOMUXC_SD2_CMD_USDHC2_CMD 0xcd
MX8MQ_IOMUXC_SD2_DATA0_USDHC2_DATA0 0xcd
MX8MQ_IOMUXC_SD2_DATA1_USDHC2_DATA1 0xcd
MX8MQ_IOMUXC_SD2_DATA2_USDHC2_DATA2 0xcd
MX8MQ_IOMUXC_SD2_DATA3_USDHC2_DATA3 0xcd
>;
};
pinctrl_usdhc2_200mhz: usdhc2grp200mhz {
fsl,pins = <
MX8MQ_IOMUXC_SD2_CLK_USDHC2_CLK 0x9f
MX8MQ_IOMUXC_SD2_CMD_USDHC2_CMD 0xcf
MX8MQ_IOMUXC_SD2_DATA0_USDHC2_DATA0 0xcf
MX8MQ_IOMUXC_SD2_DATA1_USDHC2_DATA1 0xcf
MX8MQ_IOMUXC_SD2_DATA2_USDHC2_DATA2 0xcf
MX8MQ_IOMUXC_SD2_DATA3_USDHC2_DATA3 0xcf
>;
};
pinctrl_wdog: wdoggrp {
fsl,pins = <
MX8MQ_IOMUXC_GPIO1_IO02_WDOG1_WDOG_B 0xc6
>;
};
pinctrl_wifi_pwr_en: wifipwrengrp {
fsl,pins = <
MX8MQ_IOMUXC_NAND_CLE_GPIO3_IO5 0x06
>;
};
pinctrl_wwan: wwangrp {
fsl,pins = <
MX8MQ_IOMUXC_NAND_CE3_B_GPIO3_IO4 0x09 /* nWWAN_DISABLE */
MX8MQ_IOMUXC_NAND_DATA02_GPIO3_IO8 0x80 /* nWoWWAN */
MX8MQ_IOMUXC_NAND_DATA03_GPIO3_IO9 0x19 /* WWAN_RESET */
>;
};
};
&pgc_gpu {
power-supply = <&buck3_reg>;
};
&pgc_vpu {
power-supply = <&buck4_reg>;
};
&pwm1 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_bl>;
status = "okay";
};
&snvs_pwrkey {
status = "okay";
};
&uart1 { /* console */
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart1>;
status = "okay";
};
&uart3 { /* GNSS */
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart3>;
status = "okay";
};
&uart4 { /* BT */
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart4>, <&pinctrl_bt>;
uart-has-rtscts;
status = "okay";
};
&usb3_phy0 {
status = "okay";
};
&usb3_phy1 {
vbus-supply = <&reg_5v_p>;
status = "okay";
};
&usb_dwc3_0 {
#address-cells = <1>;
#size-cells = <0>;
dr_mode = "otg";
status = "okay";
port@0 {
reg = <0>;
typec_hs: endpoint {
remote-endpoint = <&usb_con_hs>;
};
};
port@1 {
reg = <1>;
typec_ss: endpoint {
remote-endpoint = <&usb_con_ss>;
};
};
};
&usb_dwc3_1 {
dr_mode = "host";
status = "okay";
};
&usdhc1 {
pinctrl-names = "default", "state_100mhz", "state_200mhz";
pinctrl-0 = <&pinctrl_usdhc1>;
pinctrl-1 = <&pinctrl_usdhc1_100mhz>;
pinctrl-2 = <&pinctrl_usdhc1_200mhz>;
bus-width = <8>;
non-removable;
status = "okay";
};
&usdhc2 {
pinctrl-names = "default", "state_100mhz", "state_200mhz";
pinctrl-0 = <&pinctrl_usdhc2>;
pinctrl-1 = <&pinctrl_usdhc2_100mhz>;
pinctrl-2 = <&pinctrl_usdhc2_200mhz>;
bus-width = <4>;
vmmc-supply = <&reg_usdhc2_vmmc>;
power-supply = <&wifi_pwr_en>;
non-removable;
disable-wp;
cap-sdio-irq;
keep-power-in-suspend;
wakeup-source;
status = "okay";
};
&wdog1 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_wdog>;
fsl,ext-reset-output;
status = "okay";
};

60
arch/arm64/boot/dts/freescale/imx8mq.dtsi
View File

@ -8,6 +8,7 @@
#include <dt-bindings/power/imx8mq-power.h>
#include <dt-bindings/reset/imx8mq-reset.h>
#include <dt-bindings/gpio/gpio.h>
#include "dt-bindings/input/input.h"
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/thermal/thermal.h>
#include "imx8mq-pinfunc.h"
@ -19,6 +20,11 @@
#size-cells = <2>;
aliases {
gpio0 = &gpio1;
gpio1 = &gpio2;
gpio2 = &gpio3;
gpio3 = &gpio4;
gpio4 = &gpio5;
i2c0 = &i2c1;
i2c1 = &i2c2;
i2c2 = &i2c3;
@ -95,6 +101,8 @@
next-level-cache = <&A53_L2>;
operating-points-v2 = <&a53_opp_table>;
#cooling-cells = <2>;
nvmem-cells = <&cpu_speed_grade>;
nvmem-cell-names = "speed_grade";
};
A53_1: cpu@1 {
@ -145,14 +153,32 @@
opp-800000000 {
opp-hz = /bits/ 64 <800000000>;
opp-microvolt = <900000>;
/* Industrial only */
opp-supported-hw = <0xf>, <0x4>;
clock-latency-ns = <150000>;
};
opp-1000000000 {
opp-hz = /bits/ 64 <1000000000>;
opp-microvolt = <900000>;
/* Consumer only */
opp-supported-hw = <0xe>, <0x3>;
clock-latency-ns = <150000>;
};
opp-1300000000 {
opp-hz = /bits/ 64 <1300000000>;
opp-microvolt = <1000000>;
opp-supported-hw = <0xc>, <0x7>;
clock-latency-ns = <150000>;
};
opp-1500000000 {
opp-hz = /bits/ 64 <1500000000>;
opp-microvolt = <1000000>;
/* Consumer only but rely on speed grading */
opp-supported-hw = <0x8>, <0x7>;
clock-latency-ns = <150000>;
opp-suspend;
};
};
@ -415,6 +441,10 @@
clocks = <&clk IMX8MQ_CLK_OCOTP_ROOT>;
#address-cells = <1>;
#size-cells = <1>;
cpu_speed_grade: speed-grade@10 {
reg = <0x10 4>;
};
};
anatop: syscon@30360000 {
@ -437,6 +467,14 @@
clock-names = "snvs-rtc";
};
snvs_pwrkey: snvs-powerkey {
compatible = "fsl,sec-v4.0-pwrkey";
regmap = <&snvs>;
interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
linux,keycode = <KEY_POWER>;
wakeup-source;
status = "disabled";
};
};
clk: clock-controller@30380000 {
@ -817,6 +855,25 @@
};
};
bus@32c00000 { /* AIPS4 */
compatible = "fsl,imx8mq-aips-bus", "simple-bus";
#address-cells = <1>;
#size-cells = <1>;
ranges = <0x32c00000 0x32c00000 0x400000>;
irqsteer: interrupt-controller@32e2d000 {
compatible = "fsl,imx8m-irqsteer", "fsl,imx-irqsteer";
reg = <0x32e2d000 0x1000>;
interrupts = <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clk IMX8MQ_CLK_DISP_APB_ROOT>;
clock-names = "ipg";
fsl,channel = <0>;
fsl,num-irqs = <64>;
interrupt-controller;
#interrupt-cells = <1>;
};
};
gpu: gpu@38000000 {
compatible = "vivante,gc";
reg = <0x38000000 0x40000>;
@ -905,7 +962,6 @@
status = "disabled";
};
pcie0: pcie@33800000 {
compatible = "fsl,imx8mq-pcie";
reg = <0x33800000 0x400000>,

136
arch/arm64/boot/dts/freescale/imx8qxp.dtsi
View File

@ -17,11 +17,19 @@
#size-cells = <2>;
aliases {
gpio0 = &lsio_gpio0;
gpio1 = &lsio_gpio1;
gpio2 = &lsio_gpio2;
gpio3 = &lsio_gpio3;
gpio4 = &lsio_gpio4;
gpio5 = &lsio_gpio5;
gpio6 = &lsio_gpio6;
gpio7 = &lsio_gpio7;
mmc0 = &usdhc1;
mmc1 = &usdhc2;
mmc2 = &usdhc3;
serial0 = &adma_lpuart0;
mu1 = &lsio_mu1;
serial0 = &adma_lpuart0;
};
cpus {
@ -141,6 +149,12 @@
compatible = "fsl,imx8qxp-iomuxc";
};
ocotp: imx8qx-ocotp {
compatible = "fsl,imx8qxp-scu-ocotp";
#address-cells = <1>;
#size-cells = <1>;
};
pd: imx8qx-pd {
compatible = "fsl,imx8qxp-scu-pd";
#power-domain-cells = <1>;
@ -149,6 +163,11 @@
rtc: rtc {
compatible = "fsl,imx8qxp-sc-rtc";
};
watchdog {
compatible = "fsl,imx8qxp-sc-wdt", "fsl,imx-sc-wdt";
timeout-sec = <60>;
};
};
timer {
@ -378,57 +397,26 @@
};
};
ddr_subsyss: bus@5c000000 {
compatible = "simple-bus";
#address-cells = <1>;
#size-cells = <1>;
ranges = <0x5c000000 0x0 0x5c000000 0x1000000>;
ddr-pmu@5c020000 {
compatible = "fsl,imx8-ddr-pmu";
reg = <0x5c020000 0x10000>;
interrupt-parent = <&gic>;
interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>;
};
};
lsio_subsys: bus@5d000000 {
compatible = "simple-bus";
#address-cells = <1>;
#size-cells = <1>;
ranges = <0x5d000000 0x0 0x5d000000 0x1000000>;
lsio_lpcg: clock-controller@5d400000 {
compatible = "fsl,imx8qxp-lpcg-lsio";
reg = <0x5d400000 0x400000>;
#clock-cells = <1>;
};
lsio_mu0: mailbox@5d1b0000 {
compatible = "fsl,imx8qxp-mu", "fsl,imx6sx-mu";
reg = <0x5d1b0000 0x10000>;
interrupts = <GIC_SPI 176 IRQ_TYPE_LEVEL_HIGH>;
#mbox-cells = <2>;
status = "disabled";
};
lsio_mu1: mailbox@5d1c0000 {
compatible = "fsl,imx8qxp-mu", "fsl,imx6sx-mu";
reg = <0x5d1c0000 0x10000>;
interrupts = <GIC_SPI 177 IRQ_TYPE_LEVEL_HIGH>;
#mbox-cells = <2>;
};
lsio_mu2: mailbox@5d1d0000 {
compatible = "fsl,imx8qxp-mu", "fsl,imx6sx-mu";
reg = <0x5d1d0000 0x10000>;
interrupts = <GIC_SPI 178 IRQ_TYPE_LEVEL_HIGH>;
#mbox-cells = <2>;
status = "disabled";
};
lsio_mu3: mailbox@5d1e0000 {
compatible = "fsl,imx8qxp-mu", "fsl,imx6sx-mu";
reg = <0x5d1e0000 0x10000>;
interrupts = <GIC_SPI 179 IRQ_TYPE_LEVEL_HIGH>;
#mbox-cells = <2>;
status = "disabled";
};
lsio_mu4: mailbox@5d1f0000 {
compatible = "fsl,imx8qxp-mu", "fsl,imx6sx-mu";
reg = <0x5d1f0000 0x10000>;
interrupts = <GIC_SPI 180 IRQ_TYPE_LEVEL_HIGH>;
#mbox-cells = <2>;
status = "disabled";
};
lsio_gpio0: gpio@5d080000 {
compatible = "fsl,imx8qxp-gpio", "fsl,imx35-gpio";
reg = <0x5d080000 0x10000>;
@ -516,10 +504,58 @@
#interrupt-cells = <2>;
power-domains = <&pd IMX_SC_R_GPIO_7>;
};
};
watchdog {
compatible = "fsl,imx8qxp-sc-wdt", "fsl,imx-sc-wdt";
timeout-sec = <60>;
lsio_mu0: mailbox@5d1b0000 {
compatible = "fsl,imx8qxp-mu", "fsl,imx6sx-mu";
reg = <0x5d1b0000 0x10000>;
interrupts = <GIC_SPI 176 IRQ_TYPE_LEVEL_HIGH>;
#mbox-cells = <2>;
status = "disabled";
};
lsio_mu1: mailbox@5d1c0000 {
compatible = "fsl,imx8qxp-mu", "fsl,imx6sx-mu";
reg = <0x5d1c0000 0x10000>;
interrupts = <GIC_SPI 177 IRQ_TYPE_LEVEL_HIGH>;
#mbox-cells = <2>;
};
lsio_mu2: mailbox@5d1d0000 {
compatible = "fsl,imx8qxp-mu", "fsl,imx6sx-mu";
reg = <0x5d1d0000 0x10000>;
interrupts = <GIC_SPI 178 IRQ_TYPE_LEVEL_HIGH>;
#mbox-cells = <2>;
status = "disabled";
};
lsio_mu3: mailbox@5d1e0000 {
compatible = "fsl,imx8qxp-mu", "fsl,imx6sx-mu";
reg = <0x5d1e0000 0x10000>;
interrupts = <GIC_SPI 179 IRQ_TYPE_LEVEL_HIGH>;
#mbox-cells = <2>;
status = "disabled";
};
lsio_mu4: mailbox@5d1f0000 {
compatible = "fsl,imx8qxp-mu", "fsl,imx6sx-mu";
reg = <0x5d1f0000 0x10000>;
interrupts = <GIC_SPI 180 IRQ_TYPE_LEVEL_HIGH>;
#mbox-cells = <2>;
status = "disabled";
};
lsio_mu13: mailbox@5d280000 {
compatible = "fsl,imx8qxp-mu", "fsl,imx6sx-mu";
reg = <0x5d280000 0x10000>;
interrupts = <GIC_SPI 192 IRQ_TYPE_LEVEL_HIGH>;
#mbox-cells = <2>;
power-domains = <&pd IMX_SC_R_MU_13A>;
};
lsio_lpcg: clock-controller@5d400000 {
compatible = "fsl,imx8qxp-lpcg-lsio";
reg = <0x5d400000 0x400000>;
#clock-cells = <1>;
};
};
};