forked from Minki/linux
Merge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/cooloney/blackfin-2.6
* 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/cooloney/blackfin-2.6: Blackfin arch: fix a broken define in dma-mapping Blackfin arch: fix bug - Turn on DEBUG_DOUBLEFAULT, booting SMP kernel crash Blackfin arch: fix bug - shared lib function in L2 failed be called Blackfin arch: fix incorrect limit check for bf54x check_gpio Blackfin arch: fix bug - Cpufreq assumes clocks in kHz and not Hz. Blackfin arch: dont warn when running a kernel on the oldest supported silicon Blackfin arch: fix bug - kernel build with write back policy fails to be booted up Blackfin arch: fix bug - dmacopy test case fail on all platform Blackfin arch: Fix typo when adding CONFIG_DEBUG_VERBOSE Blackfin arch: don't copy bss when copying L1 Blackfin arch: fix bug - Fail to boot jffs2 kernel for BF561 with SMP patch Blackfin arch: handle case of d_path() returning error in decode_address()
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commit
376fdd2a5d
@ -101,7 +101,7 @@ extern u16 _bfin_swrst; /* shadow for Software Reset Register (SWRST) */
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extern unsigned long _ramstart, _ramend, _rambase;
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extern unsigned long memory_start, memory_end, physical_mem_end;
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extern char _stext_l1[], _etext_l1[], _sdata_l1[], _edata_l1[], _sbss_l1[],
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_ebss_l1[], _l1_lma_start[], _sdata_b_l1[], _ebss_b_l1[],
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_ebss_l1[], _l1_lma_start[], _sdata_b_l1[], _sbss_b_l1[], _ebss_b_l1[],
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_stext_l2[], _etext_l2[], _sdata_l2[], _edata_l2[], _sbss_l2[],
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_ebss_l2[], _l2_lma_start[];
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@ -15,7 +15,11 @@ void dma_free_coherent(struct device *dev, size_t size, void *vaddr,
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#define dma_alloc_noncoherent(d, s, h, f) dma_alloc_coherent(d, s, h, f)
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#define dma_free_noncoherent(d, s, v, h) dma_free_coherent(d, s, v, h)
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#define dma_mapping_error
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static inline
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int dma_mapping_error(struct device *dev, dma_addr_t dma_addr)
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{
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return 0;
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}
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/*
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* Map a single buffer of the indicated size for DMA in streaming mode.
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@ -218,7 +218,7 @@ inline int check_gpio(unsigned gpio)
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if (gpio == GPIO_PB15 || gpio == GPIO_PC14 || gpio == GPIO_PC15
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|| gpio == GPIO_PH14 || gpio == GPIO_PH15
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|| gpio == GPIO_PJ14 || gpio == GPIO_PJ15
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|| gpio > MAX_BLACKFIN_GPIOS)
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|| gpio >= MAX_BLACKFIN_GPIOS)
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return -EINVAL;
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return 0;
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}
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@ -188,10 +188,11 @@ static struct cplb_desc cplb_data[] = {
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static u16 __init lock_kernel_check(u32 start, u32 end)
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{
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if ((end <= (u32) _end && end >= (u32)_stext) ||
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(start <= (u32) _end && start >= (u32)_stext))
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return IN_KERNEL;
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return 0;
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if (start >= (u32)_end || end <= (u32)_stext)
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return 0;
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/* This cplb block overlapped with kernel area. */
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return IN_KERNEL;
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}
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static unsigned short __init
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@ -351,9 +351,14 @@ int _access_ok(unsigned long addr, unsigned long size)
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return 1;
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#endif
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#if L1_DATA_B_LENGTH != 0
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if (addr >= L1_DATA_B_START
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if (addr >= L1_DATA_B_START + (_ebss_b_l1 - _sdata_b_l1)
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&& addr + size <= L1_DATA_B_START + L1_DATA_B_LENGTH)
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return 1;
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#endif
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#if L2_LENGTH != 0
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if (addr >= L2_START + (_ebss_l2 - _stext_l2)
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&& addr + size <= L2_START + L2_LENGTH)
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return 1;
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#endif
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return 0;
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}
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@ -119,23 +119,23 @@ void __init bfin_relocate_l1_mem(void)
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/* Copy _stext_l1 to _etext_l1 to L1 instruction SRAM */
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dma_memcpy(_stext_l1, _l1_lma_start, l1_code_length);
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l1_data_a_length = _ebss_l1 - _sdata_l1;
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l1_data_a_length = _sbss_l1 - _sdata_l1;
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if (l1_data_a_length > L1_DATA_A_LENGTH)
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panic("L1 Data SRAM Bank A Overflow\n");
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/* Copy _sdata_l1 to _ebss_l1 to L1 data bank A SRAM */
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/* Copy _sdata_l1 to _sbss_l1 to L1 data bank A SRAM */
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dma_memcpy(_sdata_l1, _l1_lma_start + l1_code_length, l1_data_a_length);
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l1_data_b_length = _ebss_b_l1 - _sdata_b_l1;
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l1_data_b_length = _sbss_b_l1 - _sdata_b_l1;
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if (l1_data_b_length > L1_DATA_B_LENGTH)
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panic("L1 Data SRAM Bank B Overflow\n");
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/* Copy _sdata_b_l1 to _ebss_b_l1 to L1 data bank B SRAM */
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/* Copy _sdata_b_l1 to _sbss_b_l1 to L1 data bank B SRAM */
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dma_memcpy(_sdata_b_l1, _l1_lma_start + l1_code_length +
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l1_data_a_length, l1_data_b_length);
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if (L2_LENGTH != 0) {
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l2_length = _ebss_l2 - _stext_l2;
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l2_length = _sbss_l2 - _stext_l2;
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if (l2_length > L2_LENGTH)
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panic("L2 SRAM Overflow\n");
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@ -827,7 +827,7 @@ void __init setup_arch(char **cmdline_p)
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printk(KERN_ERR "Warning: Compiled for Rev %d, but running on Rev %d\n",
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bfin_compiled_revid(), bfin_revid());
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}
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if (bfin_revid() <= CONFIG_BF_REV_MIN || bfin_revid() > CONFIG_BF_REV_MAX)
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if (bfin_revid() < CONFIG_BF_REV_MIN || bfin_revid() > CONFIG_BF_REV_MAX)
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printk(KERN_ERR "Warning: Unsupported Chip Revision ADSP-%s Rev 0.%d detected\n",
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CPU, bfin_revid());
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}
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@ -59,7 +59,7 @@
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#endif
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#ifdef CONFIG_VERBOSE_DEBUG
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#ifdef CONFIG_DEBUG_VERBOSE
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#define verbose_printk(fmt, arg...) \
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printk(fmt, ##arg)
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#else
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@ -147,9 +147,12 @@ static void decode_address(char *buf, unsigned long address)
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char *name = p->comm;
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struct file *file = vma->vm_file;
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if (file)
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name = d_path(&file->f_path, _tmpbuf,
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if (file) {
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char *d_name = d_path(&file->f_path, _tmpbuf,
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sizeof(_tmpbuf));
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if (!IS_ERR(d_name))
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name = d_name;
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}
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/* FLAT does not have its text aligned to the start of
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* the map while FDPIC ELF does ...
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@ -571,7 +574,7 @@ asmlinkage void trap_c(struct pt_regs *fp)
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#endif
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panic("Kernel exception");
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} else {
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#ifdef CONFIG_VERBOSE_DEBUG
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#ifdef CONFIG_DEBUG_VERBOSE
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unsigned long *stack;
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/* Dump the user space stack */
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stack = (unsigned long *)rdusp();
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@ -25,9 +25,13 @@
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*/
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.macro do_flush flushins:req optflushins optnopins label
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R2 = -L1_CACHE_BYTES;
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/* start = (start & -L1_CACHE_BYTES) */
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R0 = R0 & R2;
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/* end = ((end - 1) & -L1_CACHE_BYTES) + L1_CACHE_BYTES; */
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R1 += -1;
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R2 = -L1_CACHE_BYTES;
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R1 = R1 & R2;
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R1 += L1_CACHE_BYTES;
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@ -63,7 +67,7 @@ ENDPROC(_blackfin_icache_flush_range)
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/* Flush all cache lines assocoiated with this area of memory. */
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ENTRY(_blackfin_icache_dcache_flush_range)
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do_flush IFLUSH, FLUSH
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do_flush FLUSH, IFLUSH
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ENDPROC(_blackfin_icache_dcache_flush_range)
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/* Throw away all D-cached data in specified region without any obligation to
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@ -72,13 +72,13 @@ unsigned int __bfin_cycles_mod;
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/**************************************************************************/
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static unsigned int bfin_getfreq(unsigned int cpu)
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static unsigned int bfin_getfreq_khz(unsigned int cpu)
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{
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/* The driver only support single cpu */
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if (cpu != 0)
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return -1;
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return get_cclk();
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return get_cclk() / 1000;
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}
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@ -96,7 +96,7 @@ static int bfin_target(struct cpufreq_policy *policy,
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cclk_hz = bfin_freq_table[index].frequency;
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freqs.old = bfin_getfreq(0);
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freqs.old = bfin_getfreq_khz(0);
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freqs.new = cclk_hz;
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freqs.cpu = 0;
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@ -137,8 +137,8 @@ static int __init __bfin_cpu_init(struct cpufreq_policy *policy)
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if (policy->cpu != 0)
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return -EINVAL;
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cclk = get_cclk();
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sclk = get_sclk();
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cclk = get_cclk() / 1000;
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sclk = get_sclk() / 1000;
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#if ANOMALY_05000273 || (!defined(CONFIG_BF54x) && defined(CONFIG_BFIN_DCACHE))
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min_cclk = sclk * 2;
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@ -152,7 +152,7 @@ static int __init __bfin_cpu_init(struct cpufreq_policy *policy)
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dpm_state_table[index].csel = csel << 4; /* Shift now into PLL_DIV bitpos */
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dpm_state_table[index].tscale = (TIME_SCALE / (1 << csel)) - 1;
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pr_debug("cpufreq: freq:%d csel:%d tscale:%d\n",
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pr_debug("cpufreq: freq:%d csel:0x%x tscale:%d\n",
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bfin_freq_table[index].frequency,
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dpm_state_table[index].csel,
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dpm_state_table[index].tscale);
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@ -173,7 +173,7 @@ static struct freq_attr *bfin_freq_attr[] = {
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static struct cpufreq_driver bfin_driver = {
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.verify = bfin_verify_speed,
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.target = bfin_target,
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.get = bfin_getfreq,
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.get = bfin_getfreq_khz,
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.init = __bfin_cpu_init,
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.name = "bfin cpufreq",
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.owner = THIS_MODULE,
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@ -277,7 +277,7 @@ ENTRY(_bfin_return_from_exception)
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p5.h = hi(ILAT);
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r6 = [p5];
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r7 = 0x20; /* Did I just cause anther HW error? */
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r7 = r7 & r1;
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r6 = r7 & r6;
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CC = R7 == R6;
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if CC JUMP _double_fault;
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#endif
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@ -183,10 +183,10 @@ static void __init l2_sram_init(void)
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return;
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}
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free_l2_sram_head.next->paddr = (void *)L2_START +
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(_etext_l2 - _stext_l2) + (_edata_l2 - _sdata_l2);
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free_l2_sram_head.next->size = L2_LENGTH -
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(_etext_l2 - _stext_l2) + (_edata_l2 - _sdata_l2);
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free_l2_sram_head.next->paddr =
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(void *)L2_START + (_ebss_l2 - _stext_l2);
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free_l2_sram_head.next->size =
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L2_LENGTH - (_ebss_l2 - _stext_l2);
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free_l2_sram_head.next->pid = 0;
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free_l2_sram_head.next->next = NULL;
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