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ARM: tegra: ventana: Support CPU thermal throttling

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Enable CPU thermal throttling on Tegra20 Ventana board.

Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
This commit is contained in:
Dmitry Osipenko 2021-03-02 15:09:51 +03:00 committed by Thierry Reding
parent 82d3d45995
commit 3744c7d88c
1 changed files with 39 additions and 2 deletions
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41
arch/arm/boot/dts/tegra20-ventana.dts
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@ -2,6 +2,7 @@
/dts-v1/; /dts-v1/;
#include <dt-bindings/input/input.h> #include <dt-bindings/input/input.h>
#include <dt-bindings/thermal/thermal.h>
#include "tegra20.dtsi" #include "tegra20.dtsi"
#include "tegra20-cpu-opp.dtsi" #include "tegra20-cpu-opp.dtsi"
#include "tegra20-cpu-opp-microvolt.dtsi" #include "tegra20-cpu-opp-microvolt.dtsi"
@ -528,9 +529,10 @@
}; };
}; };
temperature-sensor@4c { nct1008: temperature-sensor@4c {
compatible = "onnn,nct1008"; compatible = "onnn,nct1008";
reg = <0x4c>; reg = <0x4c>;
#thermal-sensor-cells = <1>;
}; };
}; };
@ -614,11 +616,13 @@
cpu0: cpu@0 { cpu0: cpu@0 {
cpu-supply = <&vdd_cpu>; cpu-supply = <&vdd_cpu>;
operating-points-v2 = <&cpu0_opp_table>; operating-points-v2 = <&cpu0_opp_table>;
#cooling-cells = <2>;
}; };
cpu@1 { cpu1: cpu@1 {
cpu-supply = <&vdd_cpu>; cpu-supply = <&vdd_cpu>;
operating-points-v2 = <&cpu0_opp_table>; operating-points-v2 = <&cpu0_opp_table>;
#cooling-cells = <2>;
}; };
}; };
@ -716,4 +720,37 @@
<&tegra_car TEGRA20_CLK_CDEV1>; <&tegra_car TEGRA20_CLK_CDEV1>;
clock-names = "pll_a", "pll_a_out0", "mclk"; clock-names = "pll_a", "pll_a_out0", "mclk";
}; };
thermal-zones {
cpu-thermal {
polling-delay-passive = <1000>; /* milliseconds */
polling-delay = <5000>; /* milliseconds */
thermal-sensors = <&nct1008 1>;
trips {
trip0: cpu-alert0 {
/* start throttling at 50C */
temperature = <50000>;
hysteresis = <200>;
type = "passive";
};
trip1: cpu-crit {
/* shut down at 60C */
temperature = <60000>;
hysteresis = <2000>;
type = "critical";
};
};
cooling-maps {
map0 {
trip = <&trip0>;
cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
<&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
};
};
};
};
}; };