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scsi: hisi_sas: Fix phyup timeout on FPGA

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The OOB interrupt and phyup interrupt handlers may run out-of-order in high
CPU usage scenarios. Since the hisi_sas_phy.timer is added in
hisi_sas_phy_oob_ready() and disarmed in phy_up_v3_hw(), this out-of-order
execution will cause hisi_sas_phy.timer timeout to trigger.

To solve, protect hisi_sas_phy.timer and .attached with a lock, and ensure
that the timer won't be added after phyup handler completes.

Link: https://lore.kernel.org/r/1639579061-179473-8-git-send-email-john.garry@huawei.com
Signed-off-by: Qi Liu <liuqi115@huawei.com>
Signed-off-by: John Garry <john.garry@huawei.com>
Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
This commit is contained in:
Qi Liu 2021-12-15 22:37:40 +08:00 committed by Martin K. Petersen
parent 16775db613
commit 37310bad7f
2 changed files with 21 additions and 7 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

18
drivers/scsi/hisi_sas/hisi_sas_main.c
View File

@ -909,10 +909,14 @@ void hisi_sas_phy_oob_ready(struct hisi_hba *hisi_hba, int phy_no)
{
struct hisi_sas_phy *phy = &hisi_hba->phy[phy_no];
struct device *dev = hisi_hba->dev;
unsigned long flags;
dev_dbg(dev, "phy%d OOB ready\n", phy_no);
if (phy->phy_attached)
spin_lock_irqsave(&phy->lock, flags);
if (phy->phy_attached) {
spin_unlock_irqrestore(&phy->lock, flags);
return;
}
if (!timer_pending(&phy->timer)) {
if (phy->wait_phyup_cnt < HISI_SAS_WAIT_PHYUP_RETRIES) {
@ -920,13 +924,17 @@ void hisi_sas_phy_oob_ready(struct hisi_hba *hisi_hba, int phy_no)
phy->timer.expires = jiffies +
HISI_SAS_WAIT_PHYUP_TIMEOUT;
add_timer(&phy->timer);
} else {
dev_warn(dev, "phy%d failed to come up %d times, giving up\n",
phy_no, phy->wait_phyup_cnt);
phy->wait_phyup_cnt = 0;
spin_unlock_irqrestore(&phy->lock, flags);
return;
}
dev_warn(dev, "phy%d failed to come up %d times, giving up\n",
phy_no, phy->wait_phyup_cnt);
phy->wait_phyup_cnt = 0;
}
spin_unlock_irqrestore(&phy->lock, flags);
}
EXPORT_SYMBOL_GPL(hisi_sas_phy_oob_ready);
static void hisi_sas_phy_init(struct hisi_hba *hisi_hba, int phy_no)

10
drivers/scsi/hisi_sas/hisi_sas_v3_hw.c
View File

@ -1484,7 +1484,6 @@ static irqreturn_t phy_up_v3_hw(int phy_no, struct hisi_hba *hisi_hba)
struct asd_sas_phy *sas_phy = &phy->sas_phy;
struct device *dev = hisi_hba->dev;
del_timer(&phy->timer);
hisi_sas_phy_write32(hisi_hba, phy_no, PHYCTRL_PHY_ENA_MSK, 1);
port_id = hisi_sas_read32(hisi_hba, PHY_PORT_NUM_MA);
@ -1561,9 +1560,16 @@ static irqreturn_t phy_up_v3_hw(int phy_no, struct hisi_hba *hisi_hba)
}
phy->port_id = port_id;
phy->phy_attached = 1;
hisi_sas_notify_phy_event(phy, HISI_PHYE_PHY_UP);
res = IRQ_HANDLED;
spin_lock(&phy->lock);
/* Delete timer and set phy_attached atomically */
del_timer(&phy->timer);
phy->phy_attached = 1;
spin_unlock(&phy->lock);
end:
if (phy->reset_completion)
complete(phy->reset_completion);