drm/tilcdc: Enable frame done irq and functionality for LCDC rev 1
We should wait for the last frame to complete before shutting things down also on LCDC rev 1. Signed-off-by: Jyri Sarha <jsarha@ti.com> Tested-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
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@@ -171,7 +171,7 @@ static void tilcdc_crtc_enable_irqs(struct drm_device *dev)
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if (priv->rev == 1) {
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if (priv->rev == 1) {
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tilcdc_set(dev, LCDC_RASTER_CTRL_REG,
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tilcdc_set(dev, LCDC_RASTER_CTRL_REG,
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LCDC_V1_SYNC_LOST_INT_ENA |
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LCDC_V1_SYNC_LOST_INT_ENA | LCDC_V1_FRAME_DONE_INT_ENA |
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LCDC_V1_UNDERFLOW_INT_ENA);
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LCDC_V1_UNDERFLOW_INT_ENA);
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tilcdc_set(dev, LCDC_DMA_CTRL_REG,
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tilcdc_set(dev, LCDC_DMA_CTRL_REG,
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LCDC_V1_END_OF_FRAME_INT_ENA);
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LCDC_V1_END_OF_FRAME_INT_ENA);
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@@ -190,7 +190,7 @@ static void tilcdc_crtc_disable_irqs(struct drm_device *dev)
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/* disable irqs that we might have enabled: */
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/* disable irqs that we might have enabled: */
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if (priv->rev == 1) {
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if (priv->rev == 1) {
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tilcdc_clear(dev, LCDC_RASTER_CTRL_REG,
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tilcdc_clear(dev, LCDC_RASTER_CTRL_REG,
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LCDC_V1_SYNC_LOST_INT_ENA |
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LCDC_V1_SYNC_LOST_INT_ENA | LCDC_V1_FRAME_DONE_INT_ENA |
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LCDC_V1_UNDERFLOW_INT_ENA | LCDC_V1_PL_INT_ENA);
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LCDC_V1_UNDERFLOW_INT_ENA | LCDC_V1_PL_INT_ENA);
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tilcdc_clear(dev, LCDC_DMA_CTRL_REG,
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tilcdc_clear(dev, LCDC_DMA_CTRL_REG,
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LCDC_V1_END_OF_FRAME_INT_ENA);
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LCDC_V1_END_OF_FRAME_INT_ENA);
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@@ -935,13 +935,17 @@ irqreturn_t tilcdc_crtc_irq(struct drm_crtc *crtc)
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}
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}
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}
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}
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/* For revision 2 only */
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if (priv->rev == 2) {
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if (stat & LCDC_FRAME_DONE) {
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if (stat & LCDC_FRAME_DONE) {
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tilcdc_crtc->frame_done = true;
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tilcdc_crtc->frame_done = true;
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wake_up(&tilcdc_crtc->frame_done_wq);
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wake_up(&tilcdc_crtc->frame_done_wq);
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/* rev 1 lcdc appears to hang if irq is not disbaled here */
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if (priv->rev == 1)
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tilcdc_clear(dev, LCDC_RASTER_CTRL_REG,
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LCDC_V1_FRAME_DONE_INT_ENA);
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}
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}
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/* For revision 2 only */
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if (priv->rev == 2) {
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/* Indicate to LCDC that the interrupt service routine has
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/* Indicate to LCDC that the interrupt service routine has
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* completed, see 13.3.6.1.6 in AM335x TRM.
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* completed, see 13.3.6.1.6 in AM335x TRM.
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*/
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*/
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@@ -67,6 +67,7 @@
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#define LCDC_V1_PL_INT_ENA BIT(4)
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#define LCDC_V1_PL_INT_ENA BIT(4)
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#define LCDC_V2_PL_INT_ENA BIT(6)
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#define LCDC_V2_PL_INT_ENA BIT(6)
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#define LCDC_V1_SYNC_LOST_INT_ENA BIT(5)
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#define LCDC_V1_SYNC_LOST_INT_ENA BIT(5)
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#define LCDC_V1_FRAME_DONE_INT_ENA BIT(3)
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#define LCDC_MONOCHROME_MODE BIT(1)
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#define LCDC_MONOCHROME_MODE BIT(1)
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#define LCDC_RASTER_ENABLE BIT(0)
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#define LCDC_RASTER_ENABLE BIT(0)
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#define LCDC_TFT_ALT_ENABLE BIT(23)
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#define LCDC_TFT_ALT_ENABLE BIT(23)
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