drm/i915/icl: Wa_1406680159
Disable GWL clock gating to prevent an issue that might cause hangs. v2: Rebased on top of the WA refactoring v3: Wa_2201832410 officially merged with Wa_1406680159 v4: Added References (Mika) v5: - Rebased - C, not lisp (Chris) - Add reference where WA is better explained (Rodrigo) - Add reference to WA that got merged with this References: HSDES#1406681710 References: HSDES#1406680159 References: HSDES#2201832410 Signed-off-by: Oscar Mateo <oscar.mateo@intel.com> Cc: Mika Kuoppala <mika.kuoppala@linux.intel.com> Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com> Signed-off-by: Mika Kuoppala <mika.kuoppala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/1525814984-20039-11-git-send-email-oscar.mateo@intel.com
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@ -745,6 +745,11 @@ static void icl_gt_workarounds_apply(struct drm_i915_private *dev_priv)
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I915_WRITE(SLICE_UNIT_LEVEL_CLKGATE,
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I915_READ(SLICE_UNIT_LEVEL_CLKGATE) |
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MSCUNIT_CLKGATE_DIS);
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/* Wa_1406680159:icl */
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I915_WRITE(SUBSLICE_UNIT_LEVEL_CLKGATE,
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I915_READ(SUBSLICE_UNIT_LEVEL_CLKGATE) |
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GWUNIT_CLKGATE_DIS);
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}
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void intel_gt_workarounds_apply(struct drm_i915_private *dev_priv)
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