forked from Minki/linux
ASoC: fsl_sai: Update to modern clocking terminology
As part of moving to remove the old style defines for the bus clocks update the fsl_sai driver to use more modern terminology for clocking. Signed-off-by: Mark Brown <broonie@kernel.org> Reviewed-by: Fabio Estevam <festevam@gmail.com> Link: https://lore.kernel.org/r/20210921213542.31688-6-broonie@kernel.org Signed-off-by: Mark Brown <broonie@kernel.org>
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@ -297,23 +297,23 @@ static int fsl_sai_set_dai_fmt_tr(struct snd_soc_dai *cpu_dai,
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return -EINVAL;
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}
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/* DAI clock master masks */
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switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
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case SND_SOC_DAIFMT_CBS_CFS:
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/* DAI clock provider masks */
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switch (fmt & SND_SOC_DAIFMT_CLOCK_PROVIDER_MASK) {
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case SND_SOC_DAIFMT_CBC_CFC:
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val_cr2 |= FSL_SAI_CR2_BCD_MSTR;
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val_cr4 |= FSL_SAI_CR4_FSD_MSTR;
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sai->is_slave_mode = false;
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sai->is_consumer_mode = false;
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break;
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case SND_SOC_DAIFMT_CBM_CFM:
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sai->is_slave_mode = true;
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case SND_SOC_DAIFMT_CBP_CFP:
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sai->is_consumer_mode = true;
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break;
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case SND_SOC_DAIFMT_CBS_CFM:
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case SND_SOC_DAIFMT_CBC_CFP:
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val_cr2 |= FSL_SAI_CR2_BCD_MSTR;
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sai->is_slave_mode = false;
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sai->is_consumer_mode = false;
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break;
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case SND_SOC_DAIFMT_CBM_CFS:
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case SND_SOC_DAIFMT_CBP_CFC:
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val_cr4 |= FSL_SAI_CR4_FSD_MSTR;
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sai->is_slave_mode = true;
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sai->is_consumer_mode = true;
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break;
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default:
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return -EINVAL;
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@ -356,8 +356,8 @@ static int fsl_sai_set_bclk(struct snd_soc_dai *dai, bool tx, u32 freq)
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u32 id;
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int ret = 0;
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/* Don't apply to slave mode */
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if (sai->is_slave_mode)
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/* Don't apply to consumer mode */
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if (sai->is_consumer_mode)
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return 0;
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/*
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@ -462,7 +462,7 @@ static int fsl_sai_hw_params(struct snd_pcm_substream *substream,
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pins = DIV_ROUND_UP(channels, slots);
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if (!sai->is_slave_mode) {
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if (!sai->is_consumer_mode) {
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if (sai->bclk_ratio)
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ret = fsl_sai_set_bclk(cpu_dai, tx,
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sai->bclk_ratio *
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@ -502,12 +502,12 @@ static int fsl_sai_hw_params(struct snd_pcm_substream *substream,
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val_cr4 |= FSL_SAI_CR4_CHMOD;
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/*
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* For SAI master mode, when Tx(Rx) sync with Rx(Tx) clock, Rx(Tx) will
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* For SAI provider mode, when Tx(Rx) sync with Rx(Tx) clock, Rx(Tx) will
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* generate bclk and frame clock for Tx(Rx), we should set RCR4(TCR4),
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* RCR5(TCR5) for playback(capture), or there will be sync error.
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*/
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if (!sai->is_slave_mode && fsl_sai_dir_is_synced(sai, adir)) {
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if (!sai->is_consumer_mode && fsl_sai_dir_is_synced(sai, adir)) {
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regmap_update_bits(sai->regmap, FSL_SAI_xCR4(!tx, ofs),
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FSL_SAI_CR4_SYWD_MASK | FSL_SAI_CR4_FRSZ_MASK |
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FSL_SAI_CR4_CHMOD_MASK,
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@ -543,7 +543,7 @@ static int fsl_sai_hw_free(struct snd_pcm_substream *substream,
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regmap_update_bits(sai->regmap, FSL_SAI_xCR3(tx, ofs),
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FSL_SAI_CR3_TRCE_MASK, 0);
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if (!sai->is_slave_mode &&
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if (!sai->is_consumer_mode &&
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sai->mclk_streams & BIT(substream->stream)) {
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clk_disable_unprepare(sai->mclk_clk[sai->mclk_id[tx]]);
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sai->mclk_streams &= ~BIT(substream->stream);
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@ -577,7 +577,7 @@ static void fsl_sai_config_disable(struct fsl_sai *sai, int dir)
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* This is a hardware bug, and will be fix in the
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* next sai version.
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*/
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if (!sai->is_slave_mode) {
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if (!sai->is_consumer_mode) {
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/* Software Reset */
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regmap_write(sai->regmap, FSL_SAI_xCSR(tx, ofs), FSL_SAI_CSR_SR);
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/* Clear SR bit to finish the reset */
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@ -259,7 +259,7 @@ struct fsl_sai {
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struct clk *bus_clk;
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struct clk *mclk_clk[FSL_SAI_MCLK_MAX];
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bool is_slave_mode;
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bool is_consumer_mode;
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bool is_lsb_first;
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bool is_dsp_mode;
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bool synchronous[2];
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