forked from Minki/linux
Renesas ARM based SoC updates for v3.14
* Rename ARCH_SHMOBILE to ARCH_SHMOBILE_LEGACY * r8a7791 SoC (R-Car M2) - Add thermal platform device - Add DU and LVDS clocks - GPIO platform device support - PFC platform device support - Select IRQC * r8a7790 SoC (R-Car H2) - Tidyup clock table order - Fixup I2C clock source - Correct EXTAL divider settings - Add clocks for thermal devices and SSI * r8a7779 SoC (R-Car H1) - Add I2C clock for DT * r8a7778 SoC (R-Car M1) - Add HSPI clocks for DT - Add I2C clock for DT - Add HPBIFx DMAEngine support * r8a7740 SoC (R-Mobile A1) - Add FSI clocks for DT * emev2 SoC (Emma Mobile) - Move to Multi-platform - Remove legacy board code * r7s72100 SoC (RZ/A1H) - Select GPIO * r8a73a4 SoC (R-Mobile APE6) - Don't used named IRC for DMAEngine -----BEGIN PGP SIGNATURE----- Version: GnuPG v1.4.15 (GNU/Linux) iQIcBAABAgAGBQJSql6aAAoJENfPZGlqN0++BXsP/3RT3nzRb0FeQCYybFOM41tQ upz8rtjRp2hKUuOHOxL41rE40m52PQJ+5WY9LHLEmSXeApAzUj5CPELUeHmYf3Qw 13aIG41xttTsQwaitkQFBXILaktlNAZSVnb1w3n+Je0dAf+K2Buvcl8fXxshppXQ IfL4QuBFdeAmcTjmyUVCxm8xGT3hmquFQF7i7lR0LhmqP4y45SaLTdaaCxuNzg9M q8noODZF+pCJezsD0d6YSuar9RW4r/TqT13vqKJGQh3MNl88SZU5h6fslFyLNgP5 GIZD6+8w/SA9h2m0D4x2aW0wWDbNnweXhfn/0VmI4gszQyd4ny78UaOo1Ws/w+O4 v215383ziIauCFOjKpXrucwD7BWpRq3qPrSN1Z4saYwDueQMAC3DyCSHfQ9z0Nc6 eo2yMujo20Am6sO0uKEcVfEMWol9+Ixvn7fbzXWJPLQz9OB0RM0dkI9J8j1HFcjZ YR5zd4QHn7kXQuerTVPlDm95pNPj35gb7qcnanX6tDBqz9PBKiLz6g15Vv0F/vyW LWJ/YMki5fylWVJJRW2M3uEJ7rFCwoDqKMWVg12eIDKZO7RWBYIt3N1c+6bDE3Yl eyO1hRdi8uG38I2h1/z/H2kXwFsBlAkBeQJOnlWeAGykPu3bPhsW7dQZYTy4wuEK T0c6AagNvlbS+xBgFe8c =DXJ4 -----END PGP SIGNATURE----- Merge tag 'renesas-soc-for-v3.14' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/soc From Simon Horman: Renesas ARM based SoC updates for v3.14 * Rename ARCH_SHMOBILE to ARCH_SHMOBILE_LEGACY * r8a7791 SoC (R-Car M2) - Add thermal platform device - Add DU and LVDS clocks - GPIO platform device support - PFC platform device support - Select IRQC * r8a7790 SoC (R-Car H2) - Tidyup clock table order - Fixup I2C clock source - Correct EXTAL divider settings - Add clocks for thermal devices and SSI * r8a7779 SoC (R-Car H1) - Add I2C clock for DT * r8a7778 SoC (R-Car M1) - Add HSPI clocks for DT - Add I2C clock for DT - Add HPBIFx DMAEngine support * r8a7740 SoC (R-Mobile A1) - Add FSI clocks for DT * emev2 SoC (Emma Mobile) - Move to Multi-platform - Remove legacy board code * r7s72100 SoC (RZ/A1H) - Select GPIO * r8a73a4 SoC (R-Mobile APE6) - Don't used named IRC for DMAEngine * tag 'renesas-soc-for-v3.14' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas: (33 commits) ARM: shmobile: r8a7779: add HSPI clock support for DT ARM: shmobile: r8a7740: add FSI clock support for DT ARM: shmobile: r8a7790: add SSI MSTP clocks ARM: shmobile: r8a7778: add HPBIFx DMAEngine support ARM: shmobile: Select AUTO_ZRELADDR for EMEV2 ARM: shmobile: r8a7790: tidyup clock table order ARM: shmobile: r8a7790: fixup I2C clock source ARM: shmobile: r8a7790: care EXTAL divider settings ARM: shmobile: Add r8a7791 clocks for thermal devices ARM: shmobile: Add r8a7791 thermal platform device ARM: shmobile: Add r8a7790 clocks for thermal devices ARM: Rename ARCH_SHMOBILE to ARCH_SHMOBILE_LEGACY ARM: shmobile: r8a7791: Add DU and LVDS clocks ARM: shmobile: Select USE_OF on EMEV2 ARM: shmobile: r8a7778: add HSPI clock support for DT ARM: shmobile: Remove legacy platform devices from EMEV2 SoC code ARM: shmobile: Remove legacy KZM9D board code ARM: shmobile: Use ->init_late() in shared EMEV2 case ARM: shmobile: Add shared EMEV2 code for ->init_machine() ARM: shmobile: Enable MTU2 on r7s72100 ... Signed-off-by: Kevin Hilman <khilman@linaro.org>
This commit is contained in:
commit
345bc449e7
@ -664,8 +664,9 @@ config ARCH_MSM
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stack and controls some vital subsystems
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(clock and power control, etc).
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config ARCH_SHMOBILE
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bool "Renesas SH-Mobile / R-Mobile"
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config ARCH_SHMOBILE_LEGACY
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bool "Renesas SH-Mobile / R-Mobile (non-multiplatform)"
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select ARCH_SHMOBILE
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select ARM_PATCH_PHYS_VIRT
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select CLKDEV_LOOKUP
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select GENERIC_CLOCKEVENTS
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@ -680,7 +681,8 @@ config ARCH_SHMOBILE
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select PM_GENERIC_DOMAINS if PM
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select SPARSE_IRQ
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help
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Support for Renesas's SH-Mobile and R-Mobile ARM platforms.
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Support for Renesas's SH-Mobile and R-Mobile ARM platforms using
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a non-multiplatform kernel.
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config ARCH_RPC
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bool "RiscPC"
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@ -1633,7 +1635,7 @@ config HZ_FIXED
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default 200 if ARCH_EBSA110 || ARCH_S3C24XX || ARCH_S5P64X0 || \
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ARCH_S5PV210 || ARCH_EXYNOS4
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default AT91_TIMER_HZ if ARCH_AT91
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default SHMOBILE_TIMER_HZ if ARCH_SHMOBILE
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default SHMOBILE_TIMER_HZ if ARCH_SHMOBILE_LEGACY
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default 0
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choice
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@ -1818,8 +1820,8 @@ config ARCH_WANT_GENERAL_HUGETLB
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source "mm/Kconfig"
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config FORCE_MAX_ZONEORDER
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int "Maximum zone order" if ARCH_SHMOBILE
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range 11 64 if ARCH_SHMOBILE
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int "Maximum zone order" if ARCH_SHMOBILE_LEGACY
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range 11 64 if ARCH_SHMOBILE_LEGACY
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default "12" if SOC_AM33XX
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default "9" if SA1111 || ARCH_EFM32
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default "11"
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@ -192,7 +192,6 @@ machine-$(CONFIG_ARCH_S5PC100) += s5pc100
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machine-$(CONFIG_ARCH_S5PV210) += s5pv210
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machine-$(CONFIG_ARCH_SA1100) += sa1100
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machine-$(CONFIG_ARCH_SHMOBILE) += shmobile
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machine-$(CONFIG_ARCH_SHMOBILE_MULTI) += shmobile
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machine-$(CONFIG_ARCH_SIRF) += prima2
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machine-$(CONFIG_ARCH_SOCFPGA) += socfpga
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machine-$(CONFIG_ARCH_STI) += sti
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@ -64,7 +64,7 @@ else
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endif
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endif
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ifeq ($(CONFIG_ARCH_SHMOBILE),y)
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ifeq ($(CONFIG_ARCH_SHMOBILE_LEGACY),y)
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OBJS += head-shmobile.o
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endif
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@ -220,7 +220,7 @@ dtb-$(CONFIG_ARCH_U8500) += ste-snowball.dtb \
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dtb-$(CONFIG_ARCH_S3C24XX) += s3c2416-smdk2416.dtb
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dtb-$(CONFIG_ARCH_S3C64XX) += s3c6410-mini6410.dtb \
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s3c6410-smdk6410.dtb
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dtb-$(CONFIG_ARCH_SHMOBILE) += emev2-kzm9d.dtb \
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dtb-$(CONFIG_ARCH_SHMOBILE_LEGACY) += emev2-kzm9d.dtb \
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r7s72100-genmai.dtb \
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r8a7740-armadillo800eva.dtb \
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r8a7778-bockw.dtb \
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@ -13,7 +13,7 @@ CONFIG_EMBEDDED=y
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CONFIG_PERF_EVENTS=y
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CONFIG_SLAB=y
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# CONFIG_BLOCK is not set
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CONFIG_ARCH_SHMOBILE=y
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CONFIG_ARCH_SHMOBILE_LEGACY=y
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CONFIG_ARCH_R8A73A4=y
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CONFIG_MACH_APE6EVM=y
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# CONFIG_ARM_THUMB is not set
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@ -15,7 +15,7 @@ CONFIG_MODULE_FORCE_UNLOAD=y
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# CONFIG_BLK_DEV_BSG is not set
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# CONFIG_IOSCHED_DEADLINE is not set
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# CONFIG_IOSCHED_CFQ is not set
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CONFIG_ARCH_SHMOBILE=y
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CONFIG_ARCH_SHMOBILE_LEGACY=y
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CONFIG_ARCH_R8A7740=y
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CONFIG_MACH_ARMADILLO800EVA=y
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# CONFIG_SH_TIMER_TMU is not set
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@ -8,7 +8,7 @@ CONFIG_SYSCTL_SYSCALL=y
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CONFIG_EMBEDDED=y
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CONFIG_SLAB=y
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# CONFIG_IOSCHED_CFQ is not set
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CONFIG_ARCH_SHMOBILE=y
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CONFIG_ARCH_SHMOBILE_LEGACY=y
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CONFIG_ARCH_R8A7778=y
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CONFIG_MACH_BOCKW=y
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CONFIG_MEMORY_START=0x60000000
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@ -9,7 +9,7 @@ CONFIG_EMBEDDED=y
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CONFIG_PERF_EVENTS=y
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CONFIG_SLAB=y
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# CONFIG_BLOCK is not set
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CONFIG_ARCH_SHMOBILE=y
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CONFIG_ARCH_SHMOBILE_LEGACY=y
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CONFIG_ARCH_R8A7791=y
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CONFIG_MACH_KOELSCH=y
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# CONFIG_SWP_EMULATE is not set
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@ -13,7 +13,7 @@ CONFIG_SLAB=y
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# CONFIG_BLK_DEV_BSG is not set
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# CONFIG_IOSCHED_DEADLINE is not set
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# CONFIG_IOSCHED_CFQ is not set
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CONFIG_ARCH_SHMOBILE=y
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CONFIG_ARCH_SHMOBILE_LEGACY=y
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CONFIG_ARCH_EMEV2=y
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CONFIG_MACH_KZM9D=y
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CONFIG_MEMORY_START=0x40000000
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@ -22,7 +22,7 @@ CONFIG_MODULE_UNLOAD=y
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# CONFIG_BLK_DEV_BSG is not set
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# CONFIG_IOSCHED_DEADLINE is not set
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# CONFIG_IOSCHED_CFQ is not set
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CONFIG_ARCH_SHMOBILE=y
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CONFIG_ARCH_SHMOBILE_LEGACY=y
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CONFIG_ARCH_SH73A0=y
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CONFIG_MACH_KZM9G=y
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CONFIG_MEMORY_START=0x41000000
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@ -12,7 +12,7 @@ CONFIG_SLAB=y
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# CONFIG_BLK_DEV_BSG is not set
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# CONFIG_IOSCHED_DEADLINE is not set
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# CONFIG_IOSCHED_CFQ is not set
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CONFIG_ARCH_SHMOBILE=y
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CONFIG_ARCH_SHMOBILE_LEGACY=y
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CONFIG_ARCH_R8A7790=y
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CONFIG_MACH_LAGER=y
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# CONFIG_SH_TIMER_TMU is not set
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@ -14,7 +14,7 @@ CONFIG_MODULE_UNLOAD=y
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# CONFIG_BLK_DEV_BSG is not set
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# CONFIG_IOSCHED_DEADLINE is not set
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# CONFIG_IOSCHED_CFQ is not set
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CONFIG_ARCH_SHMOBILE=y
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CONFIG_ARCH_SHMOBILE_LEGACY=y
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CONFIG_ARCH_SH7372=y
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CONFIG_MACH_MACKEREL=y
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CONFIG_MEMORY_SIZE=0x10000000
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@ -9,7 +9,7 @@ CONFIG_SYSCTL_SYSCALL=y
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CONFIG_EMBEDDED=y
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CONFIG_SLAB=y
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# CONFIG_IOSCHED_CFQ is not set
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CONFIG_ARCH_SHMOBILE=y
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CONFIG_ARCH_SHMOBILE_LEGACY=y
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CONFIG_ARCH_R8A7779=y
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CONFIG_MACH_MARZEN=y
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CONFIG_MEMORY_START=0x60000000
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@ -1,6 +1,10 @@
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config ARCH_SHMOBILE
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bool
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config ARCH_SHMOBILE_MULTI
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bool "SH-Mobile Series" if ARCH_MULTI_V7
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depends on MMU
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select ARCH_SHMOBILE
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select CPU_V7
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select GENERIC_CLOCKEVENTS
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select HAVE_ARM_SCU if SMP
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@ -30,7 +34,7 @@ config MACH_KZM9D
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comment "SH-Mobile System Configuration"
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endif
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if ARCH_SHMOBILE
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if ARCH_SHMOBILE_LEGACY
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comment "SH-Mobile System Type"
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@ -97,18 +101,23 @@ config ARCH_R8A7790
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config ARCH_R8A7791
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bool "R-Car M2 (R8A77910)"
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select ARCH_WANT_OPTIONAL_GPIOLIB
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select ARM_GIC
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select CPU_V7
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select SH_CLK_CPG
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select RENESAS_IRQC
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config ARCH_EMEV2
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bool "Emma Mobile EV2"
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select ARCH_WANT_OPTIONAL_GPIOLIB
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select ARM_GIC
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select CPU_V7
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select USE_OF
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select AUTO_ZRELADDR
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config ARCH_R7S72100
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bool "RZ/A1H (R7S72100)"
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select ARCH_WANT_OPTIONAL_GPIOLIB
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select ARM_GIC
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select CPU_V7
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select SH_CLK_CPG
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@ -231,12 +240,6 @@ config MACH_KOELSCH
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depends on ARCH_R8A7791
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select USE_OF
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config MACH_KZM9D
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bool "KZM9D board"
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depends on ARCH_EMEV2
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select REGULATOR_FIXED_VOLTAGE if REGULATOR
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select USE_OF
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config MACH_KZM9G
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bool "KZM-A9-GT board"
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depends on ARCH_SH73A0
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@ -274,7 +277,7 @@ source "drivers/sh/Kconfig"
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endif
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if ARCH_SHMOBILE || ARCH_SHMOBILE_MULTI
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if ARCH_SHMOBILE
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menu "Timer and clock configuration"
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@ -71,7 +71,6 @@ obj-$(CONFIG_MACH_LAGER_REFERENCE) += board-lager-reference.o
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obj-$(CONFIG_MACH_ARMADILLO800EVA) += board-armadillo800eva.o
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obj-$(CONFIG_MACH_ARMADILLO800EVA_REFERENCE) += board-armadillo800eva-reference.o
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obj-$(CONFIG_MACH_KOELSCH) += board-koelsch.o
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obj-$(CONFIG_MACH_KZM9D) += board-kzm9d.o
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obj-$(CONFIG_MACH_KZM9G) += board-kzm9g.o
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obj-$(CONFIG_MACH_KZM9G_REFERENCE) += board-kzm9g-reference.o
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endif
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@ -8,7 +8,6 @@ loadaddr-$(CONFIG_MACH_BOCKW) += 0x60008000
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loadaddr-$(CONFIG_MACH_BOCKW_REFERENCE) += 0x60008000
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loadaddr-$(CONFIG_MACH_GENMAI) += 0x8008000
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loadaddr-$(CONFIG_MACH_KOELSCH) += 0x40008000
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loadaddr-$(CONFIG_MACH_KZM9D) += 0x40008000
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loadaddr-$(CONFIG_MACH_KZM9G) += 0x41008000
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loadaddr-$(CONFIG_MACH_KZM9G_REFERENCE) += 0x41008000
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loadaddr-$(CONFIG_MACH_LAGER) += 0x40008000
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@ -1,92 +0,0 @@
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/*
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* kzm9d board support
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*
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* Copyright (C) 2012 Renesas Solutions Corp.
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* Copyright (C) 2012 Magnus Damm
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
|
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* the Free Software Foundation; version 2 of the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
|
||||
*/
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|
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#include <linux/kernel.h>
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#include <linux/interrupt.h>
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#include <linux/platform_device.h>
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#include <linux/regulator/fixed.h>
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#include <linux/regulator/machine.h>
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#include <linux/smsc911x.h>
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#include <mach/common.h>
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#include <mach/emev2.h>
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#include <asm/mach-types.h>
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#include <asm/mach/arch.h>
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/* Dummy supplies, where voltage doesn't matter */
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static struct regulator_consumer_supply dummy_supplies[] = {
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REGULATOR_SUPPLY("vddvario", "smsc911x"),
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REGULATOR_SUPPLY("vdd33a", "smsc911x"),
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};
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/* Ether */
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static struct resource smsc911x_resources[] = {
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[0] = {
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.start = 0x20000000,
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.end = 0x2000ffff,
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.flags = IORESOURCE_MEM,
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},
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[1] = {
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.start = EMEV2_GPIO_IRQ(1),
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||||
.flags = IORESOURCE_IRQ | IRQF_TRIGGER_HIGH,
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},
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};
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|
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static struct smsc911x_platform_config smsc911x_platdata = {
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.flags = SMSC911X_USE_32BIT,
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.irq_type = SMSC911X_IRQ_TYPE_PUSH_PULL,
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.irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_HIGH,
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||||
};
|
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|
||||
static struct platform_device smsc91x_device = {
|
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.name = "smsc911x",
|
||||
.id = -1,
|
||||
.dev = {
|
||||
.platform_data = &smsc911x_platdata,
|
||||
},
|
||||
.num_resources = ARRAY_SIZE(smsc911x_resources),
|
||||
.resource = smsc911x_resources,
|
||||
};
|
||||
|
||||
static struct platform_device *kzm9d_devices[] __initdata = {
|
||||
&smsc91x_device,
|
||||
};
|
||||
|
||||
void __init kzm9d_add_standard_devices(void)
|
||||
{
|
||||
regulator_register_fixed(0, dummy_supplies, ARRAY_SIZE(dummy_supplies));
|
||||
|
||||
emev2_add_standard_devices();
|
||||
|
||||
platform_add_devices(kzm9d_devices, ARRAY_SIZE(kzm9d_devices));
|
||||
}
|
||||
|
||||
static const char *kzm9d_boards_compat_dt[] __initdata = {
|
||||
"renesas,kzm9d",
|
||||
NULL,
|
||||
};
|
||||
|
||||
DT_MACHINE_START(KZM9D_DT, "kzm9d")
|
||||
.smp = smp_ops(emev2_smp_ops),
|
||||
.map_io = emev2_map_io,
|
||||
.init_early = emev2_init_delay,
|
||||
.init_machine = kzm9d_add_standard_devices,
|
||||
.init_late = shmobile_init_late,
|
||||
.dt_compat = kzm9d_boards_compat_dt,
|
||||
MACHINE_END
|
@ -178,6 +178,7 @@ static struct clk_lookup lookups[] = {
|
||||
CLKDEV_ICK_ID("sci_fck", "sh-sci.5", &mstp_clks[MSTP42]),
|
||||
CLKDEV_ICK_ID("sci_fck", "sh-sci.6", &mstp_clks[MSTP41]),
|
||||
CLKDEV_ICK_ID("sci_fck", "sh-sci.7", &mstp_clks[MSTP40]),
|
||||
CLKDEV_CON_ID("mtu2_fck", &mstp_clks[MSTP33]),
|
||||
};
|
||||
|
||||
void __init r7s72100_clock_init(void)
|
||||
|
@ -585,6 +585,7 @@ static struct clk_lookup lookups[] = {
|
||||
|
||||
CLKDEV_DEV_ID("sh_cmt.10", &mstp_clks[MSTP329]),
|
||||
CLKDEV_DEV_ID("sh_fsi2", &mstp_clks[MSTP328]),
|
||||
CLKDEV_DEV_ID("fe1f0000.sound", &mstp_clks[MSTP328]),
|
||||
CLKDEV_DEV_ID("i2c-sh_mobile.1", &mstp_clks[MSTP323]),
|
||||
CLKDEV_DEV_ID("e6c20000.i2c", &mstp_clks[MSTP323]),
|
||||
CLKDEV_DEV_ID("renesas_usbhs", &mstp_clks[MSTP320]),
|
||||
|
@ -173,9 +173,13 @@ static struct clk_lookup lookups[] = {
|
||||
|
||||
/* MSTP32 clocks */
|
||||
CLKDEV_DEV_ID("sh_mmcif", &mstp_clks[MSTP331]), /* MMC */
|
||||
CLKDEV_DEV_ID("ffe4e000.mmcif", &mstp_clks[MSTP331]), /* MMC */
|
||||
CLKDEV_DEV_ID("sh_mobile_sdhi.0", &mstp_clks[MSTP323]), /* SDHI0 */
|
||||
CLKDEV_DEV_ID("ffe4c000.sdhi", &mstp_clks[MSTP323]), /* SDHI0 */
|
||||
CLKDEV_DEV_ID("sh_mobile_sdhi.1", &mstp_clks[MSTP322]), /* SDHI1 */
|
||||
CLKDEV_DEV_ID("ffe4d000.sdhi", &mstp_clks[MSTP322]), /* SDHI1 */
|
||||
CLKDEV_DEV_ID("sh_mobile_sdhi.2", &mstp_clks[MSTP321]), /* SDHI2 */
|
||||
CLKDEV_DEV_ID("ffe4f000.sdhi", &mstp_clks[MSTP321]), /* SDHI2 */
|
||||
CLKDEV_DEV_ID("r8a777x-ether", &mstp_clks[MSTP114]), /* Ether */
|
||||
CLKDEV_DEV_ID("r8a7778-vin.0", &mstp_clks[MSTP110]), /* VIN0 */
|
||||
CLKDEV_DEV_ID("r8a7778-vin.1", &mstp_clks[MSTP109]), /* VIN1 */
|
||||
@ -183,9 +187,13 @@ static struct clk_lookup lookups[] = {
|
||||
CLKDEV_DEV_ID("ohci-platform", &mstp_clks[MSTP100]), /* USB OHCI port0/1 */
|
||||
CLKDEV_DEV_ID("renesas_usbhs", &mstp_clks[MSTP100]), /* USB FUNC */
|
||||
CLKDEV_DEV_ID("i2c-rcar.0", &mstp_clks[MSTP030]), /* I2C0 */
|
||||
CLKDEV_DEV_ID("ffc70000.i2c", &mstp_clks[MSTP030]), /* I2C0 */
|
||||
CLKDEV_DEV_ID("i2c-rcar.1", &mstp_clks[MSTP029]), /* I2C1 */
|
||||
CLKDEV_DEV_ID("ffc71000.i2c", &mstp_clks[MSTP029]), /* I2C1 */
|
||||
CLKDEV_DEV_ID("i2c-rcar.2", &mstp_clks[MSTP028]), /* I2C2 */
|
||||
CLKDEV_DEV_ID("ffc72000.i2c", &mstp_clks[MSTP028]), /* I2C2 */
|
||||
CLKDEV_DEV_ID("i2c-rcar.3", &mstp_clks[MSTP027]), /* I2C3 */
|
||||
CLKDEV_DEV_ID("ffc73000.i2c", &mstp_clks[MSTP027]), /* I2C3 */
|
||||
CLKDEV_DEV_ID("sh-sci.0", &mstp_clks[MSTP026]), /* SCIF0 */
|
||||
CLKDEV_DEV_ID("sh-sci.1", &mstp_clks[MSTP025]), /* SCIF1 */
|
||||
CLKDEV_DEV_ID("sh-sci.2", &mstp_clks[MSTP024]), /* SCIF2 */
|
||||
@ -195,8 +203,11 @@ static struct clk_lookup lookups[] = {
|
||||
CLKDEV_DEV_ID("sh_tmu.0", &mstp_clks[MSTP016]), /* TMU00 */
|
||||
CLKDEV_DEV_ID("sh_tmu.1", &mstp_clks[MSTP015]), /* TMU01 */
|
||||
CLKDEV_DEV_ID("sh-hspi.0", &mstp_clks[MSTP007]), /* HSPI0 */
|
||||
CLKDEV_DEV_ID("fffc7000.spi", &mstp_clks[MSTP007]), /* HSPI0 */
|
||||
CLKDEV_DEV_ID("sh-hspi.1", &mstp_clks[MSTP007]), /* HSPI1 */
|
||||
CLKDEV_DEV_ID("fffc8000.spi", &mstp_clks[MSTP007]), /* HSPI1 */
|
||||
CLKDEV_DEV_ID("sh-hspi.2", &mstp_clks[MSTP007]), /* HSPI2 */
|
||||
CLKDEV_DEV_ID("fffc6000.spi", &mstp_clks[MSTP007]), /* HSPI2 */
|
||||
CLKDEV_DEV_ID("rcar_sound", &mstp_clks[MSTP008]), /* SRU */
|
||||
|
||||
CLKDEV_ICK_ID("ssi.0", "rcar_sound", &mstp_clks[MSTP012]),
|
||||
|
@ -184,9 +184,13 @@ static struct clk_lookup lookups[] = {
|
||||
CLKDEV_DEV_ID("sh_tmu.1", &mstp_clks[MSTP016]), /* TMU01 */
|
||||
CLKDEV_DEV_ID("sh_tmu.2", &mstp_clks[MSTP016]), /* TMU02 */
|
||||
CLKDEV_DEV_ID("i2c-rcar.0", &mstp_clks[MSTP030]), /* I2C0 */
|
||||
CLKDEV_DEV_ID("ffc70000.i2c", &mstp_clks[MSTP030]), /* I2C0 */
|
||||
CLKDEV_DEV_ID("i2c-rcar.1", &mstp_clks[MSTP029]), /* I2C1 */
|
||||
CLKDEV_DEV_ID("ffc71000.i2c", &mstp_clks[MSTP029]), /* I2C1 */
|
||||
CLKDEV_DEV_ID("i2c-rcar.2", &mstp_clks[MSTP028]), /* I2C2 */
|
||||
CLKDEV_DEV_ID("ffc72000.i2c", &mstp_clks[MSTP028]), /* I2C2 */
|
||||
CLKDEV_DEV_ID("i2c-rcar.3", &mstp_clks[MSTP027]), /* I2C3 */
|
||||
CLKDEV_DEV_ID("ffc73000.i2c", &mstp_clks[MSTP027]), /* I2C3 */
|
||||
CLKDEV_DEV_ID("sh-sci.0", &mstp_clks[MSTP026]), /* SCIF0 */
|
||||
CLKDEV_DEV_ID("sh-sci.1", &mstp_clks[MSTP025]), /* SCIF1 */
|
||||
CLKDEV_DEV_ID("sh-sci.2", &mstp_clks[MSTP024]), /* SCIF2 */
|
||||
@ -194,12 +198,19 @@ static struct clk_lookup lookups[] = {
|
||||
CLKDEV_DEV_ID("sh-sci.4", &mstp_clks[MSTP022]), /* SCIF4 */
|
||||
CLKDEV_DEV_ID("sh-sci.5", &mstp_clks[MSTP021]), /* SCIF6 */
|
||||
CLKDEV_DEV_ID("sh-hspi.0", &mstp_clks[MSTP007]), /* HSPI0 */
|
||||
CLKDEV_DEV_ID("fffc7000.spi", &mstp_clks[MSTP007]), /* HSPI0 */
|
||||
CLKDEV_DEV_ID("sh-hspi.1", &mstp_clks[MSTP007]), /* HSPI1 */
|
||||
CLKDEV_DEV_ID("fffc8000.spi", &mstp_clks[MSTP007]), /* HSPI1 */
|
||||
CLKDEV_DEV_ID("sh-hspi.2", &mstp_clks[MSTP007]), /* HSPI2 */
|
||||
CLKDEV_DEV_ID("fffc6000.spi", &mstp_clks[MSTP007]), /* HSPI2 */
|
||||
CLKDEV_DEV_ID("sh_mobile_sdhi.0", &mstp_clks[MSTP323]), /* SDHI0 */
|
||||
CLKDEV_DEV_ID("ffe4c000.sdhi", &mstp_clks[MSTP323]), /* SDHI0 */
|
||||
CLKDEV_DEV_ID("sh_mobile_sdhi.1", &mstp_clks[MSTP322]), /* SDHI1 */
|
||||
CLKDEV_DEV_ID("ffe4d000.sdhi", &mstp_clks[MSTP322]), /* SDHI1 */
|
||||
CLKDEV_DEV_ID("sh_mobile_sdhi.2", &mstp_clks[MSTP321]), /* SDHI2 */
|
||||
CLKDEV_DEV_ID("ffe4e000.sdhi", &mstp_clks[MSTP321]), /* SDHI2 */
|
||||
CLKDEV_DEV_ID("sh_mobile_sdhi.3", &mstp_clks[MSTP320]), /* SDHI3 */
|
||||
CLKDEV_DEV_ID("ffe4f000.sdhi", &mstp_clks[MSTP320]), /* SDHI3 */
|
||||
CLKDEV_DEV_ID("rcar-du-r8a7779", &mstp_clks[MSTP103]), /* DU */
|
||||
};
|
||||
|
||||
|
@ -53,6 +53,7 @@
|
||||
#define SMSTPCR7 0xe615014c
|
||||
#define SMSTPCR8 0xe6150990
|
||||
#define SMSTPCR9 0xe6150994
|
||||
#define SMSTPCR10 0xe6150998
|
||||
|
||||
#define SDCKCR 0xE6150074
|
||||
#define SD2CKCR 0xE6150078
|
||||
@ -182,10 +183,14 @@ static struct clk div6_clks[DIV6_NR] = {
|
||||
|
||||
/* MSTP */
|
||||
enum {
|
||||
MSTP1015, MSTP1014, MSTP1013, MSTP1012, MSTP1011, MSTP1010,
|
||||
MSTP1009, MSTP1008, MSTP1007, MSTP1006, MSTP1005,
|
||||
MSTP931, MSTP930, MSTP929, MSTP928,
|
||||
MSTP917,
|
||||
MSTP813,
|
||||
MSTP726, MSTP725, MSTP724, MSTP723, MSTP722, MSTP721, MSTP720,
|
||||
MSTP717, MSTP716,
|
||||
MSTP704,
|
||||
MSTP522,
|
||||
MSTP315, MSTP314, MSTP313, MSTP312, MSTP311, MSTP305, MSTP304,
|
||||
MSTP216, MSTP207, MSTP206, MSTP204, MSTP203, MSTP202,
|
||||
@ -194,10 +199,22 @@ enum {
|
||||
};
|
||||
|
||||
static struct clk mstp_clks[MSTP_NR] = {
|
||||
[MSTP931] = SH_CLK_MSTP32(&hp_clk, SMSTPCR9, 31, 0), /* I2C0 */
|
||||
[MSTP930] = SH_CLK_MSTP32(&hp_clk, SMSTPCR9, 30, 0), /* I2C1 */
|
||||
[MSTP929] = SH_CLK_MSTP32(&hp_clk, SMSTPCR9, 29, 0), /* I2C2 */
|
||||
[MSTP928] = SH_CLK_MSTP32(&hp_clk, SMSTPCR9, 28, 0), /* I2C3 */
|
||||
[MSTP1015] = SH_CLK_MSTP32(&p_clk, SMSTPCR10, 15, 0), /* SSI0 */
|
||||
[MSTP1014] = SH_CLK_MSTP32(&p_clk, SMSTPCR10, 14, 0), /* SSI1 */
|
||||
[MSTP1013] = SH_CLK_MSTP32(&p_clk, SMSTPCR10, 13, 0), /* SSI2 */
|
||||
[MSTP1012] = SH_CLK_MSTP32(&p_clk, SMSTPCR10, 12, 0), /* SSI3 */
|
||||
[MSTP1011] = SH_CLK_MSTP32(&p_clk, SMSTPCR10, 11, 0), /* SSI4 */
|
||||
[MSTP1010] = SH_CLK_MSTP32(&p_clk, SMSTPCR10, 10, 0), /* SSI5 */
|
||||
[MSTP1009] = SH_CLK_MSTP32(&p_clk, SMSTPCR10, 9, 0), /* SSI6 */
|
||||
[MSTP1008] = SH_CLK_MSTP32(&p_clk, SMSTPCR10, 8, 0), /* SSI7 */
|
||||
[MSTP1007] = SH_CLK_MSTP32(&p_clk, SMSTPCR10, 7, 0), /* SSI8 */
|
||||
[MSTP1006] = SH_CLK_MSTP32(&p_clk, SMSTPCR10, 6, 0), /* SSI9 */
|
||||
[MSTP1005] = SH_CLK_MSTP32(&p_clk, SMSTPCR10, 5, 0), /* SSI ALL */
|
||||
[MSTP931] = SH_CLK_MSTP32(&p_clk, SMSTPCR9, 31, 0), /* I2C0 */
|
||||
[MSTP930] = SH_CLK_MSTP32(&p_clk, SMSTPCR9, 30, 0), /* I2C1 */
|
||||
[MSTP929] = SH_CLK_MSTP32(&p_clk, SMSTPCR9, 29, 0), /* I2C2 */
|
||||
[MSTP928] = SH_CLK_MSTP32(&p_clk, SMSTPCR9, 28, 0), /* I2C3 */
|
||||
[MSTP917] = SH_CLK_MSTP32(&qspi_clk, SMSTPCR9, 17, 0), /* QSPI */
|
||||
[MSTP813] = SH_CLK_MSTP32(&p_clk, SMSTPCR8, 13, 0), /* Ether */
|
||||
[MSTP726] = SH_CLK_MSTP32(&zx_clk, SMSTPCR7, 26, 0), /* LVDS0 */
|
||||
[MSTP725] = SH_CLK_MSTP32(&zx_clk, SMSTPCR7, 25, 0), /* LVDS1 */
|
||||
@ -208,6 +225,7 @@ static struct clk mstp_clks[MSTP_NR] = {
|
||||
[MSTP720] = SH_CLK_MSTP32(&p_clk, SMSTPCR7, 20, 0), /* SCIF1 */
|
||||
[MSTP717] = SH_CLK_MSTP32(&zs_clk, SMSTPCR7, 17, 0), /* HSCIF0 */
|
||||
[MSTP716] = SH_CLK_MSTP32(&zs_clk, SMSTPCR7, 16, 0), /* HSCIF1 */
|
||||
[MSTP704] = SH_CLK_MSTP32(&mp_clk, SMSTPCR7, 4, 0), /* HSUSB */
|
||||
[MSTP522] = SH_CLK_MSTP32(&extal_clk, SMSTPCR5, 22, 0), /* Thermal */
|
||||
[MSTP315] = SH_CLK_MSTP32(&div6_clks[DIV6_MMC0], SMSTPCR3, 15, 0), /* MMC0 */
|
||||
[MSTP314] = SH_CLK_MSTP32(&div4_clks[DIV4_SD0], SMSTPCR3, 14, 0), /* SDHI0 */
|
||||
@ -262,11 +280,7 @@ static struct clk_lookup lookups[] = {
|
||||
CLKDEV_CON_ID("ssprs", &div6_clks[DIV6_SSPRS]),
|
||||
|
||||
/* MSTP */
|
||||
CLKDEV_ICK_ID("lvds.0", "rcar-du-r8a7790", &mstp_clks[MSTP726]),
|
||||
CLKDEV_ICK_ID("lvds.1", "rcar-du-r8a7790", &mstp_clks[MSTP725]),
|
||||
CLKDEV_ICK_ID("du.0", "rcar-du-r8a7790", &mstp_clks[MSTP724]),
|
||||
CLKDEV_ICK_ID("du.1", "rcar-du-r8a7790", &mstp_clks[MSTP723]),
|
||||
CLKDEV_ICK_ID("du.2", "rcar-du-r8a7790", &mstp_clks[MSTP722]),
|
||||
CLKDEV_DEV_ID("rcar_sound", &mstp_clks[MSTP1005]),
|
||||
CLKDEV_DEV_ID("sh-sci.0", &mstp_clks[MSTP204]),
|
||||
CLKDEV_DEV_ID("sh-sci.1", &mstp_clks[MSTP203]),
|
||||
CLKDEV_DEV_ID("sh-sci.2", &mstp_clks[MSTP206]),
|
||||
@ -282,6 +296,7 @@ static struct clk_lookup lookups[] = {
|
||||
CLKDEV_DEV_ID("e6530000.i2c", &mstp_clks[MSTP929]),
|
||||
CLKDEV_DEV_ID("e6540000.i2c", &mstp_clks[MSTP928]),
|
||||
CLKDEV_DEV_ID("r8a7790-ether", &mstp_clks[MSTP813]),
|
||||
CLKDEV_DEV_ID("e61f0000.thermal", &mstp_clks[MSTP522]),
|
||||
CLKDEV_DEV_ID("rcar_thermal", &mstp_clks[MSTP522]),
|
||||
CLKDEV_DEV_ID("ee200000.mmcif", &mstp_clks[MSTP315]),
|
||||
CLKDEV_DEV_ID("sh_mmcif.0", &mstp_clks[MSTP315]),
|
||||
@ -296,6 +311,27 @@ static struct clk_lookup lookups[] = {
|
||||
CLKDEV_DEV_ID("ee220000.mmcif", &mstp_clks[MSTP305]),
|
||||
CLKDEV_DEV_ID("sh_mmcif.1", &mstp_clks[MSTP305]),
|
||||
CLKDEV_DEV_ID("sh_cmt.0", &mstp_clks[MSTP124]),
|
||||
CLKDEV_DEV_ID("qspi.0", &mstp_clks[MSTP917]),
|
||||
CLKDEV_DEV_ID("renesas_usbhs", &mstp_clks[MSTP704]),
|
||||
|
||||
/* ICK */
|
||||
CLKDEV_ICK_ID("usbhs", "usb_phy_rcar_gen2", &mstp_clks[MSTP704]),
|
||||
CLKDEV_ICK_ID("lvds.0", "rcar-du-r8a7790", &mstp_clks[MSTP726]),
|
||||
CLKDEV_ICK_ID("lvds.1", "rcar-du-r8a7790", &mstp_clks[MSTP725]),
|
||||
CLKDEV_ICK_ID("du.0", "rcar-du-r8a7790", &mstp_clks[MSTP724]),
|
||||
CLKDEV_ICK_ID("du.1", "rcar-du-r8a7790", &mstp_clks[MSTP723]),
|
||||
CLKDEV_ICK_ID("du.2", "rcar-du-r8a7790", &mstp_clks[MSTP722]),
|
||||
CLKDEV_ICK_ID("ssi.0", "rcar_sound", &mstp_clks[MSTP1015]),
|
||||
CLKDEV_ICK_ID("ssi.1", "rcar_sound", &mstp_clks[MSTP1014]),
|
||||
CLKDEV_ICK_ID("ssi.2", "rcar_sound", &mstp_clks[MSTP1013]),
|
||||
CLKDEV_ICK_ID("ssi.3", "rcar_sound", &mstp_clks[MSTP1012]),
|
||||
CLKDEV_ICK_ID("ssi.4", "rcar_sound", &mstp_clks[MSTP1011]),
|
||||
CLKDEV_ICK_ID("ssi.5", "rcar_sound", &mstp_clks[MSTP1010]),
|
||||
CLKDEV_ICK_ID("ssi.6", "rcar_sound", &mstp_clks[MSTP1009]),
|
||||
CLKDEV_ICK_ID("ssi.7", "rcar_sound", &mstp_clks[MSTP1008]),
|
||||
CLKDEV_ICK_ID("ssi.8", "rcar_sound", &mstp_clks[MSTP1007]),
|
||||
CLKDEV_ICK_ID("ssi.9", "rcar_sound", &mstp_clks[MSTP1006]),
|
||||
|
||||
};
|
||||
|
||||
#define R8A7790_CLOCK_ROOT(e, m, p0, p1, p30, p31) \
|
||||
@ -321,10 +357,10 @@ void __init r8a7790_clock_init(void)
|
||||
R8A7790_CLOCK_ROOT(20, &extal_clk, 130, 156, 80, 66);
|
||||
break;
|
||||
case MD(14):
|
||||
R8A7790_CLOCK_ROOT(26, &extal_div2_clk, 200, 240, 122, 102);
|
||||
R8A7790_CLOCK_ROOT(26 / 2, &extal_div2_clk, 200, 240, 122, 102);
|
||||
break;
|
||||
case MD(13) | MD(14):
|
||||
R8A7790_CLOCK_ROOT(30, &extal_div2_clk, 172, 208, 106, 88);
|
||||
R8A7790_CLOCK_ROOT(30 / 2, &extal_div2_clk, 172, 208, 106, 88);
|
||||
break;
|
||||
}
|
||||
|
||||
|
@ -103,6 +103,7 @@ SH_FIXED_RATIO_CLK_SET(hp_clk, pll1_clk, 1, 12);
|
||||
SH_FIXED_RATIO_CLK_SET(p_clk, pll1_clk, 1, 24);
|
||||
SH_FIXED_RATIO_CLK_SET(rclk_clk, pll1_clk, 1, (48 * 1024));
|
||||
SH_FIXED_RATIO_CLK_SET(mp_clk, pll1_div2_clk, 1, 15);
|
||||
SH_FIXED_RATIO_CLK_SET(zx_clk, pll1_clk, 1, 3);
|
||||
|
||||
static struct clk *main_clks[] = {
|
||||
&extal_clk,
|
||||
@ -116,12 +117,14 @@ static struct clk *main_clks[] = {
|
||||
&rclk_clk,
|
||||
&mp_clk,
|
||||
&cp_clk,
|
||||
&zx_clk,
|
||||
};
|
||||
|
||||
/* MSTP */
|
||||
enum {
|
||||
MSTP721, MSTP720,
|
||||
MSTP726, MSTP724, MSTP723, MSTP721, MSTP720,
|
||||
MSTP719, MSTP718, MSTP715, MSTP714,
|
||||
MSTP522,
|
||||
MSTP216, MSTP207, MSTP206,
|
||||
MSTP204, MSTP203, MSTP202, MSTP1105, MSTP1106, MSTP1107,
|
||||
MSTP124,
|
||||
@ -129,12 +132,16 @@ enum {
|
||||
};
|
||||
|
||||
static struct clk mstp_clks[MSTP_NR] = {
|
||||
[MSTP726] = SH_CLK_MSTP32(&zx_clk, SMSTPCR7, 26, 0), /* LVDS0 */
|
||||
[MSTP724] = SH_CLK_MSTP32(&zx_clk, SMSTPCR7, 24, 0), /* DU0 */
|
||||
[MSTP723] = SH_CLK_MSTP32(&zx_clk, SMSTPCR7, 23, 0), /* DU1 */
|
||||
[MSTP721] = SH_CLK_MSTP32(&p_clk, SMSTPCR7, 21, 0), /* SCIF0 */
|
||||
[MSTP720] = SH_CLK_MSTP32(&p_clk, SMSTPCR7, 20, 0), /* SCIF1 */
|
||||
[MSTP719] = SH_CLK_MSTP32(&p_clk, SMSTPCR7, 19, 0), /* SCIF2 */
|
||||
[MSTP718] = SH_CLK_MSTP32(&p_clk, SMSTPCR7, 18, 0), /* SCIF3 */
|
||||
[MSTP715] = SH_CLK_MSTP32(&p_clk, SMSTPCR7, 15, 0), /* SCIF4 */
|
||||
[MSTP714] = SH_CLK_MSTP32(&p_clk, SMSTPCR7, 14, 0), /* SCIF5 */
|
||||
[MSTP522] = SH_CLK_MSTP32(&extal_clk, SMSTPCR5, 22, 0), /* Thermal */
|
||||
[MSTP216] = SH_CLK_MSTP32(&mp_clk, SMSTPCR2, 16, 0), /* SCIFB2 */
|
||||
[MSTP207] = SH_CLK_MSTP32(&mp_clk, SMSTPCR2, 7, 0), /* SCIFB1 */
|
||||
[MSTP206] = SH_CLK_MSTP32(&mp_clk, SMSTPCR2, 6, 0), /* SCIFB0 */
|
||||
@ -164,6 +171,9 @@ static struct clk_lookup lookups[] = {
|
||||
CLKDEV_CON_ID("peripheral_clk", &hp_clk),
|
||||
|
||||
/* MSTP */
|
||||
CLKDEV_ICK_ID("lvds.0", "rcar-du-r8a7791", &mstp_clks[MSTP726]),
|
||||
CLKDEV_ICK_ID("du.0", "rcar-du-r8a7791", &mstp_clks[MSTP724]),
|
||||
CLKDEV_ICK_ID("du.1", "rcar-du-r8a7791", &mstp_clks[MSTP723]),
|
||||
CLKDEV_DEV_ID("sh-sci.0", &mstp_clks[MSTP204]), /* SCIFA0 */
|
||||
CLKDEV_DEV_ID("sh-sci.1", &mstp_clks[MSTP203]), /* SCIFA1 */
|
||||
CLKDEV_DEV_ID("sh-sci.2", &mstp_clks[MSTP206]), /* SCIFB0 */
|
||||
@ -180,6 +190,8 @@ static struct clk_lookup lookups[] = {
|
||||
CLKDEV_DEV_ID("sh-sci.13", &mstp_clks[MSTP1106]), /* SCIFA4 */
|
||||
CLKDEV_DEV_ID("sh-sci.14", &mstp_clks[MSTP1107]), /* SCIFA5 */
|
||||
CLKDEV_DEV_ID("sh_cmt.0", &mstp_clks[MSTP124]),
|
||||
CLKDEV_DEV_ID("e61f0000.thermal", &mstp_clks[MSTP522]),
|
||||
CLKDEV_DEV_ID("rcar_thermal", &mstp_clks[MSTP522]),
|
||||
};
|
||||
|
||||
#define R8A7791_CLOCK_ROOT(e, m, p0, p1, p30, p31) \
|
||||
|
@ -3,12 +3,7 @@
|
||||
|
||||
extern void emev2_map_io(void);
|
||||
extern void emev2_init_delay(void);
|
||||
extern void emev2_add_standard_devices(void);
|
||||
extern void emev2_clock_init(void);
|
||||
|
||||
#define EMEV2_GPIO_BASE 200
|
||||
#define EMEV2_GPIO_IRQ(n) (EMEV2_GPIO_BASE + (n))
|
||||
|
||||
extern struct smp_operations emev2_smp_ops;
|
||||
|
||||
#endif /* __ASM_EMEV2_H__ */
|
||||
|
@ -27,6 +27,24 @@ enum {
|
||||
HPBDMA_SLAVE_DUMMY,
|
||||
HPBDMA_SLAVE_SDHI0_TX,
|
||||
HPBDMA_SLAVE_SDHI0_RX,
|
||||
HPBDMA_SLAVE_HPBIF0_TX,
|
||||
HPBDMA_SLAVE_HPBIF0_RX,
|
||||
HPBDMA_SLAVE_HPBIF1_TX,
|
||||
HPBDMA_SLAVE_HPBIF1_RX,
|
||||
HPBDMA_SLAVE_HPBIF2_TX,
|
||||
HPBDMA_SLAVE_HPBIF2_RX,
|
||||
HPBDMA_SLAVE_HPBIF3_TX,
|
||||
HPBDMA_SLAVE_HPBIF3_RX,
|
||||
HPBDMA_SLAVE_HPBIF4_TX,
|
||||
HPBDMA_SLAVE_HPBIF4_RX,
|
||||
HPBDMA_SLAVE_HPBIF5_TX,
|
||||
HPBDMA_SLAVE_HPBIF5_RX,
|
||||
HPBDMA_SLAVE_HPBIF6_TX,
|
||||
HPBDMA_SLAVE_HPBIF6_RX,
|
||||
HPBDMA_SLAVE_HPBIF7_TX,
|
||||
HPBDMA_SLAVE_HPBIF7_RX,
|
||||
HPBDMA_SLAVE_HPBIF8_TX,
|
||||
HPBDMA_SLAVE_HPBIF8_RX,
|
||||
};
|
||||
|
||||
extern void r8a7778_add_standard_devices(void);
|
||||
|
@ -4,6 +4,7 @@
|
||||
void r8a7791_add_standard_devices(void);
|
||||
void r8a7791_add_dt_devices(void);
|
||||
void r8a7791_clock_init(void);
|
||||
void r8a7791_pinmux_init(void);
|
||||
void r8a7791_init_early(void);
|
||||
extern struct smp_operations r8a7791_smp_ops;
|
||||
|
||||
|
@ -16,24 +16,15 @@
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
|
||||
*/
|
||||
#include <linux/clk-provider.h>
|
||||
#include <linux/kernel.h>
|
||||
#include <linux/init.h>
|
||||
#include <linux/interrupt.h>
|
||||
#include <linux/irq.h>
|
||||
#include <linux/platform_device.h>
|
||||
#include <linux/platform_data/gpio-em.h>
|
||||
#include <linux/of_platform.h>
|
||||
#include <linux/delay.h>
|
||||
#include <linux/input.h>
|
||||
#include <linux/io.h>
|
||||
#include <linux/irqchip/arm-gic.h>
|
||||
#include <mach/common.h>
|
||||
#include <mach/emev2.h>
|
||||
#include <mach/irqs.h>
|
||||
#include <asm/mach-types.h>
|
||||
#include <asm/mach/arch.h>
|
||||
#include <asm/mach/map.h>
|
||||
#include <asm/mach/time.h>
|
||||
|
||||
static struct map_desc emev2_io_desc[] __initdata = {
|
||||
#ifdef CONFIG_SMP
|
||||
@ -52,150 +43,20 @@ void __init emev2_map_io(void)
|
||||
iotable_init(emev2_io_desc, ARRAY_SIZE(emev2_io_desc));
|
||||
}
|
||||
|
||||
/* UART */
|
||||
static struct resource uart0_resources[] = {
|
||||
DEFINE_RES_MEM(0xe1020000, 0x38),
|
||||
DEFINE_RES_IRQ(40),
|
||||
};
|
||||
|
||||
static struct resource uart1_resources[] = {
|
||||
DEFINE_RES_MEM(0xe1030000, 0x38),
|
||||
DEFINE_RES_IRQ(41),
|
||||
};
|
||||
|
||||
static struct resource uart2_resources[] = {
|
||||
DEFINE_RES_MEM(0xe1040000, 0x38),
|
||||
DEFINE_RES_IRQ(42),
|
||||
};
|
||||
|
||||
static struct resource uart3_resources[] = {
|
||||
DEFINE_RES_MEM(0xe1050000, 0x38),
|
||||
DEFINE_RES_IRQ(43),
|
||||
};
|
||||
|
||||
#define emev2_register_uart(idx) \
|
||||
platform_device_register_simple("serial8250-em", idx, \
|
||||
uart##idx##_resources, \
|
||||
ARRAY_SIZE(uart##idx##_resources))
|
||||
|
||||
/* STI */
|
||||
static struct resource sti_resources[] = {
|
||||
DEFINE_RES_MEM(0xe0180000, 0x54),
|
||||
DEFINE_RES_IRQ(157),
|
||||
};
|
||||
|
||||
#define emev2_register_sti() \
|
||||
platform_device_register_simple("em_sti", 0, \
|
||||
sti_resources, \
|
||||
ARRAY_SIZE(sti_resources))
|
||||
|
||||
/* GIO */
|
||||
static struct gpio_em_config gio0_config = {
|
||||
.gpio_base = 0,
|
||||
.irq_base = EMEV2_GPIO_IRQ(0),
|
||||
.number_of_pins = 32,
|
||||
};
|
||||
|
||||
static struct resource gio0_resources[] = {
|
||||
DEFINE_RES_MEM(0xe0050000, 0x2c),
|
||||
DEFINE_RES_MEM(0xe0050040, 0x20),
|
||||
DEFINE_RES_IRQ(99),
|
||||
DEFINE_RES_IRQ(100),
|
||||
};
|
||||
|
||||
static struct gpio_em_config gio1_config = {
|
||||
.gpio_base = 32,
|
||||
.irq_base = EMEV2_GPIO_IRQ(32),
|
||||
.number_of_pins = 32,
|
||||
};
|
||||
|
||||
static struct resource gio1_resources[] = {
|
||||
DEFINE_RES_MEM(0xe0050080, 0x2c),
|
||||
DEFINE_RES_MEM(0xe00500c0, 0x20),
|
||||
DEFINE_RES_IRQ(101),
|
||||
DEFINE_RES_IRQ(102),
|
||||
};
|
||||
|
||||
static struct gpio_em_config gio2_config = {
|
||||
.gpio_base = 64,
|
||||
.irq_base = EMEV2_GPIO_IRQ(64),
|
||||
.number_of_pins = 32,
|
||||
};
|
||||
|
||||
static struct resource gio2_resources[] = {
|
||||
DEFINE_RES_MEM(0xe0050100, 0x2c),
|
||||
DEFINE_RES_MEM(0xe0050140, 0x20),
|
||||
DEFINE_RES_IRQ(103),
|
||||
DEFINE_RES_IRQ(104),
|
||||
};
|
||||
|
||||
static struct gpio_em_config gio3_config = {
|
||||
.gpio_base = 96,
|
||||
.irq_base = EMEV2_GPIO_IRQ(96),
|
||||
.number_of_pins = 32,
|
||||
};
|
||||
|
||||
static struct resource gio3_resources[] = {
|
||||
DEFINE_RES_MEM(0xe0050180, 0x2c),
|
||||
DEFINE_RES_MEM(0xe00501c0, 0x20),
|
||||
DEFINE_RES_IRQ(105),
|
||||
DEFINE_RES_IRQ(106),
|
||||
};
|
||||
|
||||
static struct gpio_em_config gio4_config = {
|
||||
.gpio_base = 128,
|
||||
.irq_base = EMEV2_GPIO_IRQ(128),
|
||||
.number_of_pins = 31,
|
||||
};
|
||||
|
||||
static struct resource gio4_resources[] = {
|
||||
DEFINE_RES_MEM(0xe0050200, 0x2c),
|
||||
DEFINE_RES_MEM(0xe0050240, 0x20),
|
||||
DEFINE_RES_IRQ(107),
|
||||
DEFINE_RES_IRQ(108),
|
||||
};
|
||||
|
||||
#define emev2_register_gio(idx) \
|
||||
platform_device_register_resndata(&platform_bus, "em_gio", \
|
||||
idx, gio##idx##_resources, \
|
||||
ARRAY_SIZE(gio##idx##_resources), \
|
||||
&gio##idx##_config, \
|
||||
sizeof(struct gpio_em_config))
|
||||
|
||||
static struct resource pmu_resources[] = {
|
||||
DEFINE_RES_IRQ(152),
|
||||
DEFINE_RES_IRQ(153),
|
||||
};
|
||||
|
||||
#define emev2_register_pmu() \
|
||||
platform_device_register_simple("arm-pmu", -1, \
|
||||
pmu_resources, \
|
||||
ARRAY_SIZE(pmu_resources))
|
||||
|
||||
void __init emev2_add_standard_devices(void)
|
||||
{
|
||||
if (!IS_ENABLED(CONFIG_COMMON_CLK))
|
||||
emev2_clock_init();
|
||||
|
||||
emev2_register_uart(0);
|
||||
emev2_register_uart(1);
|
||||
emev2_register_uart(2);
|
||||
emev2_register_uart(3);
|
||||
emev2_register_sti();
|
||||
emev2_register_gio(0);
|
||||
emev2_register_gio(1);
|
||||
emev2_register_gio(2);
|
||||
emev2_register_gio(3);
|
||||
emev2_register_gio(4);
|
||||
emev2_register_pmu();
|
||||
}
|
||||
|
||||
void __init emev2_init_delay(void)
|
||||
{
|
||||
shmobile_setup_delay(533, 1, 3); /* Cortex-A9 @ 533MHz */
|
||||
}
|
||||
|
||||
#ifdef CONFIG_USE_OF
|
||||
static void __init emev2_add_standard_devices_dt(void)
|
||||
{
|
||||
#ifdef CONFIG_COMMON_CLK
|
||||
of_clk_init(NULL);
|
||||
#else
|
||||
emev2_clock_init();
|
||||
#endif
|
||||
of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
|
||||
}
|
||||
|
||||
static const char *emev2_boards_compat_dt[] __initdata = {
|
||||
"renesas,emev2",
|
||||
@ -206,7 +67,7 @@ DT_MACHINE_START(EMEV2_DT, "Generic Emma Mobile EV2 (Flattened Device Tree)")
|
||||
.smp = smp_ops(emev2_smp_ops),
|
||||
.map_io = emev2_map_io,
|
||||
.init_early = emev2_init_delay,
|
||||
.init_machine = emev2_add_standard_devices_dt,
|
||||
.init_late = shmobile_init_late,
|
||||
.dt_compat = emev2_boards_compat_dt,
|
||||
MACHINE_END
|
||||
|
||||
#endif /* CONFIG_USE_OF */
|
||||
|
@ -22,6 +22,7 @@
|
||||
#include <linux/kernel.h>
|
||||
#include <linux/of_platform.h>
|
||||
#include <linux/serial_sci.h>
|
||||
#include <linux/sh_timer.h>
|
||||
#include <mach/common.h>
|
||||
#include <mach/irqs.h>
|
||||
#include <mach/r7s72100.h>
|
||||
@ -58,6 +59,26 @@ static inline void r7s72100_register_scif(int idx)
|
||||
sizeof(struct plat_sci_port));
|
||||
}
|
||||
|
||||
|
||||
static struct sh_timer_config mtu2_0_platform_data __initdata = {
|
||||
.name = "MTU2_0",
|
||||
.timer_bit = 0,
|
||||
.channel_offset = -0x80,
|
||||
.clockevent_rating = 200,
|
||||
};
|
||||
|
||||
static struct resource mtu2_0_resources[] __initdata = {
|
||||
DEFINE_RES_MEM(0xfcff0300, 0x27),
|
||||
DEFINE_RES_IRQ(gic_iid(139)), /* MTU2 TGI0A */
|
||||
};
|
||||
|
||||
#define r7s72100_register_mtu2(idx) \
|
||||
platform_device_register_resndata(&platform_bus, "sh_mtu2", \
|
||||
idx, mtu2_##idx##_resources, \
|
||||
ARRAY_SIZE(mtu2_##idx##_resources), \
|
||||
&mtu2_##idx##_platform_data, \
|
||||
sizeof(struct sh_timer_config))
|
||||
|
||||
void __init r7s72100_add_dt_devices(void)
|
||||
{
|
||||
r7s72100_register_scif(SCIF0);
|
||||
@ -68,6 +89,7 @@ void __init r7s72100_add_dt_devices(void)
|
||||
r7s72100_register_scif(SCIF5);
|
||||
r7s72100_register_scif(SCIF6);
|
||||
r7s72100_register_scif(SCIF7);
|
||||
r7s72100_register_mtu2(0);
|
||||
}
|
||||
|
||||
void __init r7s72100_init_early(void)
|
||||
|
@ -275,7 +275,7 @@ static const struct sh_dmae_pdata dma_pdata = {
|
||||
|
||||
static struct resource dma_resources[] = {
|
||||
DEFINE_RES_MEM(0xe6700020, 0x89e0),
|
||||
DEFINE_RES_IRQ_NAMED(gic_spi(220), "error_irq"),
|
||||
DEFINE_RES_IRQ(gic_spi(220)),
|
||||
{
|
||||
/* IRQ for channels 0-19 */
|
||||
.start = gic_spi(200),
|
||||
|
@ -319,6 +319,29 @@ void __init r8a7778_add_dt_devices(void)
|
||||
#define HPB_DMAE_ASYNCMDR_ASMD21_SINGLE BIT(1) /* SDHI0 */
|
||||
#define HPB_DMAE_ASYNCMDR_ASMD21_MULTI 0 /* SDHI0 */
|
||||
|
||||
#define HPBDMA_HPBIF(_id) \
|
||||
{ \
|
||||
.id = HPBDMA_SLAVE_HPBIF## _id ##_TX, \
|
||||
.addr = 0xffda0000 + (_id * 0x1000), \
|
||||
.dcr = HPB_DMAE_DCR_CT | \
|
||||
HPB_DMAE_DCR_DIP | \
|
||||
HPB_DMAE_DCR_SPDS_32BIT | \
|
||||
HPB_DMAE_DCR_DMDL | \
|
||||
HPB_DMAE_DCR_DPDS_32BIT, \
|
||||
.port = 0x1111, \
|
||||
.dma_ch = (28 + _id), \
|
||||
}, { \
|
||||
.id = HPBDMA_SLAVE_HPBIF## _id ##_RX, \
|
||||
.addr = 0xffda0000 + (_id * 0x1000), \
|
||||
.dcr = HPB_DMAE_DCR_CT | \
|
||||
HPB_DMAE_DCR_DIP | \
|
||||
HPB_DMAE_DCR_SMDL | \
|
||||
HPB_DMAE_DCR_SPDS_32BIT | \
|
||||
HPB_DMAE_DCR_DPDS_32BIT, \
|
||||
.port = 0x1111, \
|
||||
.dma_ch = (28 + _id), \
|
||||
}
|
||||
|
||||
static const struct hpb_dmae_slave_config hpb_dmae_slaves[] = {
|
||||
{
|
||||
.id = HPBDMA_SLAVE_SDHI0_TX,
|
||||
@ -349,11 +372,39 @@ static const struct hpb_dmae_slave_config hpb_dmae_slaves[] = {
|
||||
.flags = HPB_DMAE_SET_ASYNC_RESET | HPB_DMAE_SET_ASYNC_MODE,
|
||||
.dma_ch = 22,
|
||||
},
|
||||
|
||||
HPBDMA_HPBIF(0),
|
||||
HPBDMA_HPBIF(1),
|
||||
HPBDMA_HPBIF(2),
|
||||
HPBDMA_HPBIF(3),
|
||||
HPBDMA_HPBIF(4),
|
||||
HPBDMA_HPBIF(5),
|
||||
HPBDMA_HPBIF(6),
|
||||
HPBDMA_HPBIF(7),
|
||||
HPBDMA_HPBIF(8),
|
||||
};
|
||||
|
||||
static const struct hpb_dmae_channel hpb_dmae_channels[] = {
|
||||
HPB_DMAE_CHANNEL(0x7e, HPBDMA_SLAVE_SDHI0_TX), /* ch. 21 */
|
||||
HPB_DMAE_CHANNEL(0x7e, HPBDMA_SLAVE_SDHI0_RX), /* ch. 22 */
|
||||
HPB_DMAE_CHANNEL(0x7f, HPBDMA_SLAVE_HPBIF0_TX), /* ch. 28 */
|
||||
HPB_DMAE_CHANNEL(0x7f, HPBDMA_SLAVE_HPBIF0_RX), /* ch. 28 */
|
||||
HPB_DMAE_CHANNEL(0x7f, HPBDMA_SLAVE_HPBIF1_TX), /* ch. 29 */
|
||||
HPB_DMAE_CHANNEL(0x7f, HPBDMA_SLAVE_HPBIF1_RX), /* ch. 29 */
|
||||
HPB_DMAE_CHANNEL(0x7f, HPBDMA_SLAVE_HPBIF2_TX), /* ch. 30 */
|
||||
HPB_DMAE_CHANNEL(0x7f, HPBDMA_SLAVE_HPBIF2_RX), /* ch. 30 */
|
||||
HPB_DMAE_CHANNEL(0x7f, HPBDMA_SLAVE_HPBIF3_TX), /* ch. 31 */
|
||||
HPB_DMAE_CHANNEL(0x7f, HPBDMA_SLAVE_HPBIF3_RX), /* ch. 31 */
|
||||
HPB_DMAE_CHANNEL(0x7f, HPBDMA_SLAVE_HPBIF4_TX), /* ch. 32 */
|
||||
HPB_DMAE_CHANNEL(0x7f, HPBDMA_SLAVE_HPBIF4_RX), /* ch. 32 */
|
||||
HPB_DMAE_CHANNEL(0x7f, HPBDMA_SLAVE_HPBIF5_TX), /* ch. 33 */
|
||||
HPB_DMAE_CHANNEL(0x7f, HPBDMA_SLAVE_HPBIF5_RX), /* ch. 33 */
|
||||
HPB_DMAE_CHANNEL(0x7f, HPBDMA_SLAVE_HPBIF6_TX), /* ch. 34 */
|
||||
HPB_DMAE_CHANNEL(0x7f, HPBDMA_SLAVE_HPBIF6_RX), /* ch. 34 */
|
||||
HPB_DMAE_CHANNEL(0x7f, HPBDMA_SLAVE_HPBIF7_TX), /* ch. 35 */
|
||||
HPB_DMAE_CHANNEL(0x7f, HPBDMA_SLAVE_HPBIF7_RX), /* ch. 35 */
|
||||
HPB_DMAE_CHANNEL(0x7f, HPBDMA_SLAVE_HPBIF8_TX), /* ch. 36 */
|
||||
HPB_DMAE_CHANNEL(0x7f, HPBDMA_SLAVE_HPBIF8_RX), /* ch. 36 */
|
||||
};
|
||||
|
||||
static struct hpb_dmae_pdata dma_platform_data __initdata = {
|
||||
|
@ -22,6 +22,7 @@
|
||||
#include <linux/irq.h>
|
||||
#include <linux/kernel.h>
|
||||
#include <linux/of_platform.h>
|
||||
#include <linux/platform_data/gpio-rcar.h>
|
||||
#include <linux/platform_data/irq-renesas-irqc.h>
|
||||
#include <linux/serial_sci.h>
|
||||
#include <linux/sh_timer.h>
|
||||
@ -31,6 +32,58 @@
|
||||
#include <mach/rcar-gen2.h>
|
||||
#include <asm/mach/arch.h>
|
||||
|
||||
static const struct resource pfc_resources[] __initconst = {
|
||||
DEFINE_RES_MEM(0xe6060000, 0x250),
|
||||
};
|
||||
|
||||
#define r8a7791_register_pfc() \
|
||||
platform_device_register_simple("pfc-r8a7791", -1, pfc_resources, \
|
||||
ARRAY_SIZE(pfc_resources))
|
||||
|
||||
#define R8A7791_GPIO(idx, base, nr) \
|
||||
static const struct resource r8a7791_gpio##idx##_resources[] __initconst = { \
|
||||
DEFINE_RES_MEM((base), 0x50), \
|
||||
DEFINE_RES_IRQ(gic_spi(4 + (idx))), \
|
||||
}; \
|
||||
\
|
||||
static const struct gpio_rcar_config \
|
||||
r8a7791_gpio##idx##_platform_data __initconst = { \
|
||||
.gpio_base = 32 * (idx), \
|
||||
.irq_base = 0, \
|
||||
.number_of_pins = (nr), \
|
||||
.pctl_name = "pfc-r8a7791", \
|
||||
.has_both_edge_trigger = 1, \
|
||||
}; \
|
||||
|
||||
R8A7791_GPIO(0, 0xe6050000, 32);
|
||||
R8A7791_GPIO(1, 0xe6051000, 32);
|
||||
R8A7791_GPIO(2, 0xe6052000, 32);
|
||||
R8A7791_GPIO(3, 0xe6053000, 32);
|
||||
R8A7791_GPIO(4, 0xe6054000, 32);
|
||||
R8A7791_GPIO(5, 0xe6055000, 32);
|
||||
R8A7791_GPIO(6, 0xe6055400, 32);
|
||||
R8A7791_GPIO(7, 0xe6055800, 26);
|
||||
|
||||
#define r8a7791_register_gpio(idx) \
|
||||
platform_device_register_resndata(&platform_bus, "gpio_rcar", idx, \
|
||||
r8a7791_gpio##idx##_resources, \
|
||||
ARRAY_SIZE(r8a7791_gpio##idx##_resources), \
|
||||
&r8a7791_gpio##idx##_platform_data, \
|
||||
sizeof(r8a7791_gpio##idx##_platform_data))
|
||||
|
||||
void __init r8a7791_pinmux_init(void)
|
||||
{
|
||||
r8a7791_register_pfc();
|
||||
r8a7791_register_gpio(0);
|
||||
r8a7791_register_gpio(1);
|
||||
r8a7791_register_gpio(2);
|
||||
r8a7791_register_gpio(3);
|
||||
r8a7791_register_gpio(4);
|
||||
r8a7791_register_gpio(5);
|
||||
r8a7791_register_gpio(6);
|
||||
r8a7791_register_gpio(7);
|
||||
}
|
||||
|
||||
#define SCIF_COMMON(scif_type, baseaddr, irq) \
|
||||
.type = scif_type, \
|
||||
.mapbase = baseaddr, \
|
||||
@ -136,6 +189,17 @@ static struct resource irqc0_resources[] = {
|
||||
&irqc##idx##_data, \
|
||||
sizeof(struct renesas_irqc_config))
|
||||
|
||||
static const struct resource thermal_resources[] __initconst = {
|
||||
DEFINE_RES_MEM(0xe61f0000, 0x14),
|
||||
DEFINE_RES_MEM(0xe61f0100, 0x38),
|
||||
DEFINE_RES_IRQ(gic_spi(69)),
|
||||
};
|
||||
|
||||
#define r8a7791_register_thermal() \
|
||||
platform_device_register_simple("rcar_thermal", -1, \
|
||||
thermal_resources, \
|
||||
ARRAY_SIZE(thermal_resources))
|
||||
|
||||
void __init r8a7791_add_dt_devices(void)
|
||||
{
|
||||
r8a7791_register_scif(SCIFA0);
|
||||
@ -160,6 +224,7 @@ void __init r8a7791_add_standard_devices(void)
|
||||
{
|
||||
r8a7791_add_dt_devices();
|
||||
r8a7791_register_irqc(0);
|
||||
r8a7791_register_thermal();
|
||||
}
|
||||
|
||||
void __init r8a7791_init_early(void)
|
||||
|
@ -118,7 +118,7 @@ obj-$(CONFIG_SGI_SN) += sn/
|
||||
obj-y += firmware/
|
||||
obj-$(CONFIG_CRYPTO) += crypto/
|
||||
obj-$(CONFIG_SUPERH) += sh/
|
||||
obj-$(CONFIG_ARCH_SHMOBILE) += sh/
|
||||
obj-$(CONFIG_ARCH_SHMOBILE_LEGACY) += sh/
|
||||
ifndef CONFIG_ARCH_USES_GETTIMEOFFSET
|
||||
obj-y += clocksource/
|
||||
endif
|
||||
|
Loading…
Reference in New Issue
Block a user