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perf/x86/intel/lbr: Create kmem_cache for the LBR context data

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A new kmem_cache method is introduced to allocate the PMU specific data
task_ctx_data, which requires the PMU specific code to create a
kmem_cache.

Currently, the task_ctx_data is only used by the Intel LBR call stack
feature, which is introduced since Haswell. The kmem_cache should be
only created for Haswell and later platforms. There is no alignment
requirement for the existing platforms.

Signed-off-by: Kan Liang <kan.liang@linux.intel.com>
Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Link: https://lkml.kernel.org/r/1593780569-62993-18-git-send-email-kan.liang@linux.intel.com
This commit is contained in:
Kan Liang 2020-07-03 05:49:23 -07:00 committed by Peter Zijlstra
parent 217c2a633e
commit 33cad28449
1 changed files with 19 additions and 2 deletions
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21
arch/x86/events/intel/lbr.c
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@ -1531,9 +1531,17 @@ void __init intel_pmu_lbr_init_snb(void)
*/
}
static inline struct kmem_cache *
create_lbr_kmem_cache(size_t size, size_t align)
{
return kmem_cache_create("x86_lbr", size, align, 0, NULL);
}
/* haswell */
void intel_pmu_lbr_init_hsw(void)
{
size_t size = sizeof(struct x86_perf_task_context);
x86_pmu.lbr_nr = 16;
x86_pmu.lbr_tos = MSR_LBR_TOS;
x86_pmu.lbr_from = MSR_LBR_NHM_FROM;
@ -1542,6 +1550,8 @@ void intel_pmu_lbr_init_hsw(void)
x86_pmu.lbr_sel_mask = LBR_SEL_MASK;
x86_pmu.lbr_sel_map = hsw_lbr_sel_map;
x86_get_pmu()->task_ctx_cache = create_lbr_kmem_cache(size, 0);
if (lbr_from_signext_quirk_needed())
static_branch_enable(&lbr_from_quirk_key);
}
@ -1549,6 +1559,8 @@ void intel_pmu_lbr_init_hsw(void)
/* skylake */
__init void intel_pmu_lbr_init_skl(void)
{
size_t size = sizeof(struct x86_perf_task_context);
x86_pmu.lbr_nr = 32;
x86_pmu.lbr_tos = MSR_LBR_TOS;
x86_pmu.lbr_from = MSR_LBR_NHM_FROM;
@ -1558,6 +1570,8 @@ __init void intel_pmu_lbr_init_skl(void)
x86_pmu.lbr_sel_mask = LBR_SEL_MASK;
x86_pmu.lbr_sel_map = hsw_lbr_sel_map;
x86_get_pmu()->task_ctx_cache = create_lbr_kmem_cache(size, 0);
/*
* SW branch filter usage:
* - support syscall, sysret capture.
@ -1631,6 +1645,7 @@ void __init intel_pmu_arch_lbr_init(void)
union cpuid28_ebx ebx;
union cpuid28_ecx ecx;
unsigned int unused_edx;
size_t size;
u64 lbr_nr;
/* Arch LBR Capabilities */
@ -1655,8 +1670,10 @@ void __init intel_pmu_arch_lbr_init(void)
x86_pmu.lbr_br_type = ecx.split.lbr_br_type;
x86_pmu.lbr_nr = lbr_nr;
x86_get_pmu()->task_ctx_size = sizeof(struct x86_perf_task_context_arch_lbr) +
lbr_nr * sizeof(struct lbr_entry);
size = sizeof(struct x86_perf_task_context_arch_lbr) +
lbr_nr * sizeof(struct lbr_entry);
x86_get_pmu()->task_ctx_size = size;
x86_get_pmu()->task_ctx_cache = create_lbr_kmem_cache(size, 0);
x86_pmu.lbr_from = MSR_ARCH_LBR_FROM_0;
x86_pmu.lbr_to = MSR_ARCH_LBR_TO_0;